1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // aw88395_device.h -- AW88395 function for ALSA Audio Driver 4 // 5 // Copyright (c) 2022-2023 AWINIC Technology CO., LTD 6 // 7 // Author: Bruce zhao <zhaolei@awinic.com> 8 // 9 10 #ifndef __AW88395_DEVICE_FILE_H__ 11 #define __AW88395_DEVICE_FILE_H__ 12 13 #include "aw88395.h" 14 #include "aw88395_data_type.h" 15 #include "aw88395_lib.h" 16 17 #define AW88395_DEV_DEFAULT_CH (0) 18 #define AW88395_DEV_DSP_CHECK_MAX (5) 19 #define AW88395_DSP_I2C_WRITES 20 #define AW88395_MAX_RAM_WRITE_BYTE_SIZE (128) 21 #define AW88395_DSP_ODD_NUM_BIT_TEST (0x5555) 22 #define AW88395_DSP_EVEN_NUM_BIT_TEST (0xAAAA) 23 #define AW88395_DSP_ST_CHECK_MAX (2) 24 #define AW88395_FADE_IN_OUT_DEFAULT (0) 25 #define AW88395_CALI_RE_MAX (15000) 26 #define AW88395_CALI_RE_MIN (4000) 27 #define AW88395_CALI_DELAY_CACL(value) ((value * 32) / 48) 28 29 #define AW88395_DSP_RE_TO_SHOW_RE(re, shift) (((re) * (1000)) >> (shift)) 30 #define AW88395_SHOW_RE_TO_DSP_RE(re, shift) (((re) << shift) / (1000)) 31 32 #define AW88395_ACF_FILE "aw88395_acf.bin" 33 #define AW88395_DEV_SYSST_CHECK_MAX (10) 34 35 enum { 36 AW88395_DEV_VDSEL_DAC = 0, 37 AW88395_DEV_VDSEL_VSENSE = 1, 38 }; 39 40 enum { 41 AW88395_DSP_CRC_NA = 0, 42 AW88395_DSP_CRC_OK = 1, 43 }; 44 45 enum { 46 AW88395_DSP_FW_UPDATE_OFF = 0, 47 AW88395_DSP_FW_UPDATE_ON = 1, 48 }; 49 50 enum { 51 AW88395_FORCE_UPDATE_OFF = 0, 52 AW88395_FORCE_UPDATE_ON = 1, 53 }; 54 55 enum { 56 AW88395_1000_US = 1000, 57 AW88395_2000_US = 2000, 58 AW88395_3000_US = 3000, 59 AW88395_4000_US = 4000, 60 AW88395_5000_US = 5000, 61 AW88395_10000_US = 10000, 62 AW88395_100000_US = 100000, 63 }; 64 65 enum { 66 AW88395_DEV_TYPE_OK = 0, 67 AW88395_DEV_TYPE_NONE = 1, 68 }; 69 70 71 enum AW88395_DEV_STATUS { 72 AW88395_DEV_PW_OFF = 0, 73 AW88395_DEV_PW_ON, 74 }; 75 76 enum AW88395_DEV_FW_STATUS { 77 AW88395_DEV_FW_FAILED = 0, 78 AW88395_DEV_FW_OK, 79 }; 80 81 enum AW88395_DEV_MEMCLK { 82 AW88395_DEV_MEMCLK_OSC = 0, 83 AW88395_DEV_MEMCLK_PLL = 1, 84 }; 85 86 enum AW88395_DEV_DSP_CFG { 87 AW88395_DEV_DSP_WORK = 0, 88 AW88395_DEV_DSP_BYPASS = 1, 89 }; 90 91 enum { 92 AW88395_DSP_16_DATA = 0, 93 AW88395_DSP_32_DATA = 1, 94 }; 95 96 enum { 97 AW88395_NOT_RCV_MODE = 0, 98 AW88395_RCV_MODE = 1, 99 }; 100 101 struct aw_profctrl_desc { 102 unsigned int cur_mode; 103 }; 104 105 enum { 106 CALI_RESULT_NORMAL, 107 CALI_RESULT_ERROR, 108 }; 109 110 struct aw_volume_desc { 111 unsigned int init_volume; 112 unsigned int mute_volume; 113 unsigned int ctl_volume; 114 unsigned int max_volume; 115 }; 116 117 struct aw_dsp_mem_desc { 118 unsigned int dsp_madd_reg; 119 unsigned int dsp_mdat_reg; 120 unsigned int dsp_fw_base_addr; 121 unsigned int dsp_cfg_base_addr; 122 }; 123 124 struct aw_vmax_desc { 125 unsigned int init_vmax; 126 }; 127 128 struct aw_cali_delay_desc { 129 unsigned int delay; 130 }; 131 132 #define AW_CALI_CFG_NUM (4) 133 struct cali_cfg { 134 uint32_t data[AW_CALI_CFG_NUM]; 135 }; 136 137 struct aw_cali_backup_desc { 138 unsigned int dsp_ng_cfg; 139 unsigned int dsp_lp_cfg; 140 }; 141 142 struct aw_cali_desc { 143 u32 cali_re; 144 u32 ra; 145 bool cali_switch; 146 bool cali_running; 147 uint16_t cali_result; 148 uint16_t store_vol; 149 struct cali_cfg cali_cfg; 150 struct aw_cali_backup_desc backup_info; 151 }; 152 153 struct aw_container { 154 int len; 155 u8 data[]; 156 }; 157 158 struct aw_device { 159 int status; 160 struct mutex dsp_lock; 161 162 unsigned char prof_cur; 163 unsigned char prof_index; 164 unsigned char dsp_crc_st; 165 unsigned char dsp_cfg; 166 u16 chip_id; 167 168 unsigned int channel; 169 unsigned int fade_step; 170 unsigned int prof_data_type; 171 172 struct i2c_client *i2c; 173 struct device *dev; 174 struct regmap *regmap; 175 char *acf; 176 177 u32 dsp_fw_len; 178 u32 dsp_cfg_len; 179 u8 platform; 180 u8 fw_status; 181 182 unsigned int fade_in_time; 183 unsigned int fade_out_time; 184 185 struct aw_prof_info prof_info; 186 struct aw_sec_data_desc crc_dsp_cfg; 187 struct aw_profctrl_desc profctrl_desc; 188 struct aw_volume_desc volume_desc; 189 struct aw_dsp_mem_desc dsp_mem_desc; 190 struct aw_vmax_desc vmax_desc; 191 192 struct aw_cali_delay_desc cali_delay_desc; 193 struct aw_cali_desc cali_desc; 194 195 }; 196 197 int aw88395_init(struct aw_device **aw_dev, struct i2c_client *i2c, struct regmap *regmap); 198 int aw88395_dev_init(struct aw_device *aw_dev, struct aw_container *aw_cfg); 199 int aw88395_dev_start(struct aw_device *aw_dev); 200 int aw88395_dev_stop(struct aw_device *aw_dev); 201 int aw88395_dev_fw_update(struct aw_device *aw_dev, bool up_dsp_fw_en, bool force_up_en); 202 203 void aw88395_dev_set_volume(struct aw_device *aw_dev, unsigned short set_vol); 204 int aw88395_dev_get_prof_data(struct aw_device *aw_dev, int index, 205 struct aw_prof_desc **prof_desc); 206 int aw88395_dev_get_prof_name(struct aw_device *aw_dev, int index, char **prof_name); 207 int aw88395_dev_set_profile_index(struct aw_device *aw_dev, int index); 208 int aw88395_dev_get_profile_index(struct aw_device *aw_dev); 209 int aw88395_dev_get_profile_count(struct aw_device *aw_dev); 210 int aw88395_dev_load_acf_check(struct aw_device *aw_dev, struct aw_container *aw_cfg); 211 int aw88395_dev_cfg_load(struct aw_device *aw_dev, struct aw_container *aw_cfg); 212 void aw88395_dev_mute(struct aw_device *aw_dev, bool is_mute); 213 214 #endif 215