xref: /linux/drivers/net/wireless/ath/ath11k/core.h (revision 1a9239bb4253f9076b5b4b2a1a4e8d7defd77a95)
1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4  * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
5  */
6 
7 #ifndef ATH11K_CORE_H
8 #define ATH11K_CORE_H
9 
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/bitfield.h>
14 #include <linux/dmi.h>
15 #include <linux/ctype.h>
16 #include <linux/rhashtable.h>
17 #include <linux/average.h>
18 #include <linux/firmware.h>
19 
20 #include "qmi.h"
21 #include "htc.h"
22 #include "wmi.h"
23 #include "hal.h"
24 #include "dp.h"
25 #include "ce.h"
26 #include "mac.h"
27 #include "hw.h"
28 #include "hal_rx.h"
29 #include "reg.h"
30 #include "thermal.h"
31 #include "dbring.h"
32 #include "spectral.h"
33 #include "wow.h"
34 #include "fw.h"
35 #include "coredump.h"
36 
37 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
38 
39 #define ATH11K_TX_MGMT_NUM_PENDING_MAX	512
40 
41 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
42 
43 /* Pending management packets threshold for dropping probe responses */
44 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
45 
46 #define ATH11K_INVALID_HW_MAC_ID	0xFF
47 #define ATH11K_CONNECTION_LOSS_HZ	(3 * HZ)
48 
49 /* SMBIOS type containing Board Data File Name Extension */
50 #define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8
51 
52 /* SMBIOS type structure length (excluding strings-set) */
53 #define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9
54 
55 /* The magic used by QCA spec */
56 #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_"
57 
58 extern unsigned int ath11k_frame_mode;
59 extern bool ath11k_ftm_mode;
60 
61 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ)
62 
63 #define ATH11K_MON_TIMER_INTERVAL  10
64 #define ATH11K_RESET_TIMEOUT_HZ (20 * HZ)
65 #define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3
66 #define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5
67 #define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
68 #define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
69 #define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
70 
71 enum ath11k_supported_bw {
72 	ATH11K_BW_20	= 0,
73 	ATH11K_BW_40	= 1,
74 	ATH11K_BW_80	= 2,
75 	ATH11K_BW_160	= 3,
76 };
77 
78 enum ath11k_bdf_search {
79 	ATH11K_BDF_SEARCH_DEFAULT,
80 	ATH11K_BDF_SEARCH_BUS_AND_BOARD,
81 };
82 
83 enum wme_ac {
84 	WME_AC_BE,
85 	WME_AC_BK,
86 	WME_AC_VI,
87 	WME_AC_VO,
88 	WME_NUM_AC
89 };
90 
91 #define ATH11K_HT_MCS_MAX	7
92 #define ATH11K_VHT_MCS_MAX	9
93 #define ATH11K_HE_MCS_MAX	11
94 
95 enum ath11k_crypt_mode {
96 	/* Only use hardware crypto engine */
97 	ATH11K_CRYPT_MODE_HW,
98 	/* Only use software crypto */
99 	ATH11K_CRYPT_MODE_SW,
100 };
101 
ath11k_tid_to_ac(u32 tid)102 static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
103 {
104 	return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
105 		((tid == 1) || (tid == 2)) ? WME_AC_BK :
106 		((tid == 4) || (tid == 5)) ? WME_AC_VI :
107 		WME_AC_VO);
108 }
109 
110 enum ath11k_skb_flags {
111 	ATH11K_SKB_HW_80211_ENCAP = BIT(0),
112 	ATH11K_SKB_CIPHER_SET = BIT(1),
113 };
114 
115 struct ath11k_skb_cb {
116 	dma_addr_t paddr;
117 	u8 eid;
118 	u8 flags;
119 	u32 cipher;
120 	struct ath11k *ar;
121 	struct ieee80211_vif *vif;
122 } __packed;
123 
124 struct ath11k_skb_rxcb {
125 	dma_addr_t paddr;
126 	bool is_first_msdu;
127 	bool is_last_msdu;
128 	bool is_continuation;
129 	bool is_mcbc;
130 	bool is_eapol;
131 	struct hal_rx_desc *rx_desc;
132 	u8 err_rel_src;
133 	u8 err_code;
134 	u8 mac_id;
135 	u8 unmapped;
136 	u8 is_frag;
137 	u8 tid;
138 	u16 peer_id;
139 	u16 seq_no;
140 };
141 
142 enum ath11k_hw_rev {
143 	ATH11K_HW_IPQ8074,
144 	ATH11K_HW_QCA6390_HW20,
145 	ATH11K_HW_IPQ6018_HW10,
146 	ATH11K_HW_QCN9074_HW10,
147 	ATH11K_HW_WCN6855_HW20,
148 	ATH11K_HW_WCN6855_HW21,
149 	ATH11K_HW_WCN6750_HW10,
150 	ATH11K_HW_IPQ5018_HW10,
151 	ATH11K_HW_QCA2066_HW21,
152 	ATH11K_HW_QCA6698AQ_HW21,
153 };
154 
155 enum ath11k_firmware_mode {
156 	/* the default mode, standard 802.11 functionality */
157 	ATH11K_FIRMWARE_MODE_NORMAL,
158 
159 	/* factory tests etc */
160 	ATH11K_FIRMWARE_MODE_FTM,
161 
162 	/* Cold boot calibration */
163 	ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
164 };
165 
166 extern bool ath11k_cold_boot_cal;
167 
168 #define ATH11K_IRQ_NUM_MAX 52
169 #define ATH11K_EXT_IRQ_NUM_MAX	16
170 
171 struct ath11k_ext_irq_grp {
172 	struct ath11k_base *ab;
173 	u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
174 	u32 num_irq;
175 	u32 grp_id;
176 	u64 timestamp;
177 	bool napi_enabled;
178 	struct napi_struct napi;
179 	struct net_device *napi_ndev;
180 };
181 
182 enum ath11k_smbios_cc_type {
183 	/* disable country code setting from SMBIOS */
184 	ATH11K_SMBIOS_CC_DISABLE = 0,
185 
186 	/* set country code by ANSI country name, based on ISO3166-1 alpha2 */
187 	ATH11K_SMBIOS_CC_ISO = 1,
188 
189 	/* worldwide regdomain */
190 	ATH11K_SMBIOS_CC_WW = 2,
191 };
192 
193 struct ath11k_smbios_bdf {
194 	struct dmi_header hdr;
195 
196 	u8 features_disabled;
197 
198 	/* enum ath11k_smbios_cc_type */
199 	u8 country_code_flag;
200 
201 	/* To set specific country, you need to set country code
202 	 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United
203 	 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'=
204 	 * 0x53). To set country to INDONESIA, then country code value =
205 	 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag =
206 	 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory
207 	 * setting.
208 	 */
209 	u16 cc_code;
210 
211 	u8 bdf_enabled;
212 	u8 bdf_ext[];
213 } __packed;
214 
215 #define HEHANDLE_CAP_PHYINFO_SIZE       3
216 #define HECAP_PHYINFO_SIZE              9
217 #define HECAP_MACINFO_SIZE              5
218 #define HECAP_TXRX_MCS_NSS_SIZE         2
219 #define HECAP_PPET16_PPET8_MAX_SIZE     25
220 
221 #define HE_PPET16_PPET8_SIZE            8
222 
223 /* 802.11ax PPE (PPDU packet Extension) threshold */
224 struct he_ppe_threshold {
225 	u32 numss_m1;
226 	u32 ru_mask;
227 	u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
228 };
229 
230 struct ath11k_he {
231 	u8 hecap_macinfo[HECAP_MACINFO_SIZE];
232 	u32 hecap_rxmcsnssmap;
233 	u32 hecap_txmcsnssmap;
234 	u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
235 	struct he_ppe_threshold   hecap_ppet;
236 	u32 heop_param;
237 };
238 
239 #define MAX_RADIOS 3
240 
241 /* ipq5018 hw param macros */
242 #define MAX_RADIOS_5018	1
243 #define CE_CNT_5018	6
244 #define TARGET_CE_CNT_5018	9
245 #define SVC_CE_MAP_LEN_5018	17
246 #define RXDMA_PER_PDEV_5018	1
247 
248 enum {
249 	WMI_HOST_TP_SCALE_MAX   = 0,
250 	WMI_HOST_TP_SCALE_50    = 1,
251 	WMI_HOST_TP_SCALE_25    = 2,
252 	WMI_HOST_TP_SCALE_12    = 3,
253 	WMI_HOST_TP_SCALE_MIN   = 4,
254 	WMI_HOST_TP_SCALE_SIZE   = 5,
255 };
256 
257 enum ath11k_scan_state {
258 	ATH11K_SCAN_IDLE,
259 	ATH11K_SCAN_STARTING,
260 	ATH11K_SCAN_RUNNING,
261 	ATH11K_SCAN_ABORTING,
262 };
263 
264 enum ath11k_11d_state {
265 	ATH11K_11D_IDLE,
266 	ATH11K_11D_PREPARING,
267 	ATH11K_11D_RUNNING,
268 };
269 
270 enum ath11k_dev_flags {
271 	ATH11K_CAC_RUNNING,
272 	ATH11K_FLAG_CORE_REGISTERED,
273 	ATH11K_FLAG_CRASH_FLUSH,
274 	ATH11K_FLAG_RAW_MODE,
275 	ATH11K_FLAG_HW_CRYPTO_DISABLED,
276 	ATH11K_FLAG_BTCOEX,
277 	ATH11K_FLAG_RECOVERY,
278 	ATH11K_FLAG_UNREGISTERING,
279 	ATH11K_FLAG_REGISTERED,
280 	ATH11K_FLAG_QMI_FAIL,
281 	ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
282 	ATH11K_FLAG_CE_IRQ_ENABLED,
283 	ATH11K_FLAG_EXT_IRQ_ENABLED,
284 	ATH11K_FLAG_FIXED_MEM_RGN,
285 	ATH11K_FLAG_DEVICE_INIT_DONE,
286 	ATH11K_FLAG_MULTI_MSI_VECTORS,
287 	ATH11K_FLAG_FTM_SEGMENTED,
288 };
289 
290 enum ath11k_monitor_flags {
291 	ATH11K_FLAG_MONITOR_CONF_ENABLED,
292 	ATH11K_FLAG_MONITOR_STARTED,
293 	ATH11K_FLAG_MONITOR_VDEV_CREATED,
294 };
295 
296 #define ATH11K_IPV6_UC_TYPE     0
297 #define ATH11K_IPV6_AC_TYPE     1
298 
299 #define ATH11K_IPV6_MAX_COUNT   16
300 #define ATH11K_IPV4_MAX_COUNT   2
301 
302 struct ath11k_arp_ns_offload {
303 	u8  ipv4_addr[ATH11K_IPV4_MAX_COUNT][4];
304 	u32 ipv4_count;
305 	u32 ipv6_count;
306 	u8  ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
307 	u8  self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
308 	u8  ipv6_type[ATH11K_IPV6_MAX_COUNT];
309 	bool ipv6_valid[ATH11K_IPV6_MAX_COUNT];
310 	u8  mac_addr[ETH_ALEN];
311 };
312 
313 struct ath11k_rekey_data {
314 	u8 kck[NL80211_KCK_LEN];
315 	u8 kek[NL80211_KCK_LEN];
316 	u64 replay_ctr;
317 	bool enable_offload;
318 };
319 
320 /**
321  * struct ath11k_chan_power_info - TPE containing power info per channel chunk
322  * @chan_cfreq: channel center freq (MHz)
323  * e.g.
324  * channel 37/20 MHz,  it is 6135
325  * channel 37/40 MHz,  it is 6125
326  * channel 37/80 MHz,  it is 6145
327  * channel 37/160 MHz, it is 6185
328  * @tx_power: transmit power (dBm)
329  */
330 struct ath11k_chan_power_info {
331 	u16 chan_cfreq;
332 	s8 tx_power;
333 };
334 
335 /* ath11k only deals with 160 MHz, so 8 subchannels */
336 #define ATH11K_NUM_PWR_LEVELS	8
337 
338 /**
339  * struct ath11k_reg_tpc_power_info - regulatory TPC power info
340  * @is_psd_power: is PSD power or not
341  * @eirp_power: Maximum EIRP power (dBm), valid only if power is PSD
342  * @ap_power_type: type of power (SP/LPI/VLP)
343  * @num_pwr_levels: number of power levels
344  * @reg_max: Array of maximum TX power (dBm) per PSD value
345  * @tpe: TPE values processed from TPE IE
346  * @chan_power_info: power info to send to firmware
347  */
348 struct ath11k_reg_tpc_power_info {
349 	bool is_psd_power;
350 	u8 eirp_power;
351 	enum wmi_reg_6ghz_ap_type ap_power_type;
352 	u8 num_pwr_levels;
353 	u8 reg_max[ATH11K_NUM_PWR_LEVELS];
354 	s8 tpe[ATH11K_NUM_PWR_LEVELS];
355 	struct ath11k_chan_power_info chan_power_info[ATH11K_NUM_PWR_LEVELS];
356 };
357 
358 struct ath11k_vif {
359 	u32 vdev_id;
360 	enum wmi_vdev_type vdev_type;
361 	enum wmi_vdev_subtype vdev_subtype;
362 	u32 beacon_interval;
363 	u32 dtim_period;
364 	u16 ast_hash;
365 	u16 ast_idx;
366 	u16 tcl_metadata;
367 	u8 hal_addr_search_flags;
368 	u8 search_type;
369 
370 	struct ath11k *ar;
371 	struct ieee80211_vif *vif;
372 
373 	struct wmi_wmm_params_all_arg wmm_params;
374 	struct wmi_wmm_params_all_arg muedca_params;
375 	struct list_head list;
376 	union {
377 		struct {
378 			u32 uapsd;
379 		} sta;
380 		struct {
381 			/* 127 stations; wmi limit */
382 			u8 tim_bitmap[16];
383 			u8 tim_len;
384 			u32 ssid_len;
385 			u8 ssid[IEEE80211_MAX_SSID_LEN];
386 			bool hidden_ssid;
387 			/* P2P_IE with NoA attribute for P2P_GO case */
388 			u32 noa_len;
389 			u8 *noa_data;
390 		} ap;
391 	} u;
392 
393 	bool is_started;
394 	bool is_up;
395 	bool ftm_responder;
396 	bool spectral_enabled;
397 	bool ps;
398 	u32 aid;
399 	u8 bssid[ETH_ALEN];
400 	struct cfg80211_bitrate_mask bitrate_mask;
401 	struct delayed_work connection_loss_work;
402 	struct work_struct bcn_tx_work;
403 	int num_legacy_stations;
404 	int rtscts_prot_mode;
405 	int txpower;
406 	bool rsnie_present;
407 	bool wpaie_present;
408 	bool bcca_zero_sent;
409 	bool do_not_send_tmpl;
410 	struct ath11k_arp_ns_offload arp_ns_offload;
411 	struct ath11k_rekey_data rekey_data;
412 
413 	struct ath11k_reg_tpc_power_info reg_tpc_info;
414 
415 	/* Must be last - ends in a flexible-array member.
416 	 *
417 	 * FIXME: Driver should not copy struct ieee80211_chanctx_conf,
418 	 * especially because it has a flexible array. Find a better way.
419 	 */
420 	struct ieee80211_chanctx_conf chanctx;
421 };
422 
423 struct ath11k_vif_iter {
424 	u32 vdev_id;
425 	struct ath11k_vif *arvif;
426 };
427 
428 struct ath11k_rx_peer_stats {
429 	u64 num_msdu;
430 	u64 num_mpdu_fcs_ok;
431 	u64 num_mpdu_fcs_err;
432 	u64 tcp_msdu_count;
433 	u64 udp_msdu_count;
434 	u64 other_msdu_count;
435 	u64 ampdu_msdu_count;
436 	u64 non_ampdu_msdu_count;
437 	u64 stbc_count;
438 	u64 beamformed_count;
439 	u64 mcs_count[HAL_RX_MAX_MCS + 1];
440 	u64 nss_count[HAL_RX_MAX_NSS];
441 	u64 bw_count[HAL_RX_BW_MAX];
442 	u64 gi_count[HAL_RX_GI_MAX];
443 	u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
444 	u64 tid_count[IEEE80211_NUM_TIDS + 1];
445 	u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
446 	u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
447 	u64 rx_duration;
448 	u64 dcm_count;
449 	u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
450 };
451 
452 #define ATH11K_HE_MCS_NUM       12
453 #define ATH11K_VHT_MCS_NUM      10
454 #define ATH11K_BW_NUM           4
455 #define ATH11K_NSS_NUM          4
456 #define ATH11K_LEGACY_NUM       12
457 #define ATH11K_GI_NUM           4
458 #define ATH11K_HT_MCS_NUM       32
459 
460 enum ath11k_pkt_rx_err {
461 	ATH11K_PKT_RX_ERR_FCS,
462 	ATH11K_PKT_RX_ERR_TKIP,
463 	ATH11K_PKT_RX_ERR_CRYPT,
464 	ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
465 	ATH11K_PKT_RX_ERR_MAX,
466 };
467 
468 enum ath11k_ampdu_subfrm_num {
469 	ATH11K_AMPDU_SUBFRM_NUM_10,
470 	ATH11K_AMPDU_SUBFRM_NUM_20,
471 	ATH11K_AMPDU_SUBFRM_NUM_30,
472 	ATH11K_AMPDU_SUBFRM_NUM_40,
473 	ATH11K_AMPDU_SUBFRM_NUM_50,
474 	ATH11K_AMPDU_SUBFRM_NUM_60,
475 	ATH11K_AMPDU_SUBFRM_NUM_MORE,
476 	ATH11K_AMPDU_SUBFRM_NUM_MAX,
477 };
478 
479 enum ath11k_amsdu_subfrm_num {
480 	ATH11K_AMSDU_SUBFRM_NUM_1,
481 	ATH11K_AMSDU_SUBFRM_NUM_2,
482 	ATH11K_AMSDU_SUBFRM_NUM_3,
483 	ATH11K_AMSDU_SUBFRM_NUM_4,
484 	ATH11K_AMSDU_SUBFRM_NUM_MORE,
485 	ATH11K_AMSDU_SUBFRM_NUM_MAX,
486 };
487 
488 enum ath11k_counter_type {
489 	ATH11K_COUNTER_TYPE_BYTES,
490 	ATH11K_COUNTER_TYPE_PKTS,
491 	ATH11K_COUNTER_TYPE_MAX,
492 };
493 
494 enum ath11k_stats_type {
495 	ATH11K_STATS_TYPE_SUCC,
496 	ATH11K_STATS_TYPE_FAIL,
497 	ATH11K_STATS_TYPE_RETRY,
498 	ATH11K_STATS_TYPE_AMPDU,
499 	ATH11K_STATS_TYPE_MAX,
500 };
501 
502 struct ath11k_htt_data_stats {
503 	u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
504 	u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
505 	u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
506 	u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
507 	u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
508 	u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
509 	u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
510 };
511 
512 struct ath11k_htt_tx_stats {
513 	struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
514 	u64 tx_duration;
515 	u64 ba_fails;
516 	u64 ack_fails;
517 };
518 
519 struct ath11k_per_ppdu_tx_stats {
520 	u16 succ_pkts;
521 	u16 failed_pkts;
522 	u16 retry_pkts;
523 	u32 succ_bytes;
524 	u32 failed_bytes;
525 	u32 retry_bytes;
526 };
527 
528 DECLARE_EWMA(avg_rssi, 10, 8)
529 
530 struct ath11k_sta {
531 	struct ath11k_vif *arvif;
532 
533 	/* the following are protected by ar->data_lock */
534 	u32 changed; /* IEEE80211_RC_* */
535 	u32 bw;
536 	u32 nss;
537 	u32 smps;
538 	enum hal_pn_type pn_type;
539 
540 	struct work_struct update_wk;
541 	struct work_struct set_4addr_wk;
542 	struct rate_info txrate;
543 	u32 peer_nss;
544 	struct rate_info last_txrate;
545 	u64 rx_duration;
546 	u64 tx_duration;
547 	u8 rssi_comb;
548 	struct ewma_avg_rssi avg_rssi;
549 	s8 rssi_beacon;
550 	s8 chain_signal[IEEE80211_MAX_CHAINS];
551 	struct ath11k_htt_tx_stats *tx_stats;
552 	struct ath11k_rx_peer_stats *rx_stats;
553 
554 #ifdef CONFIG_MAC80211_DEBUGFS
555 	/* protected by conf_mutex */
556 	bool aggr_mode;
557 #endif
558 
559 	bool use_4addr_set;
560 	u16 tcl_metadata;
561 
562 	/* Protected with ar->data_lock */
563 	enum ath11k_wmi_peer_ps_state peer_ps_state;
564 	u64 ps_start_time;
565 	u64 ps_start_jiffies;
566 	u64 ps_total_duration;
567 	bool peer_current_ps_valid;
568 
569 	u32 bw_prev;
570 };
571 
572 #define ATH11K_MIN_5G_FREQ 4150
573 #define ATH11K_MIN_6G_FREQ 5925
574 #define ATH11K_MAX_6G_FREQ 7115
575 #define ATH11K_NUM_CHANS 102
576 #define ATH11K_MAX_5G_CHAN 177
577 
578 enum ath11k_state {
579 	ATH11K_STATE_OFF,
580 	ATH11K_STATE_ON,
581 	ATH11K_STATE_RESTARTING,
582 	ATH11K_STATE_RESTARTED,
583 	ATH11K_STATE_WEDGED,
584 	ATH11K_STATE_FTM,
585 	/* Add other states as required */
586 };
587 
588 /* Antenna noise floor */
589 #define ATH11K_DEFAULT_NOISE_FLOOR -95
590 
591 #define ATH11K_INVALID_RSSI_FULL -1
592 
593 #define ATH11K_INVALID_RSSI_EMPTY -128
594 
595 struct ath11k_fw_stats {
596 	struct dentry *debugfs_fwstats;
597 	u32 pdev_id;
598 	u32 stats_id;
599 	struct list_head pdevs;
600 	struct list_head vdevs;
601 	struct list_head bcn;
602 };
603 
604 struct ath11k_dbg_htt_stats {
605 	u8 type;
606 	u8 reset;
607 	struct debug_htt_stats_req *stats_req;
608 	/* protects shared stats req buffer */
609 	spinlock_t lock;
610 };
611 
612 #define MAX_MODULE_ID_BITMAP_WORDS	16
613 
614 struct ath11k_debug {
615 	struct dentry *debugfs_pdev;
616 	struct ath11k_dbg_htt_stats htt_stats;
617 	u32 extd_tx_stats;
618 	u32 extd_rx_stats;
619 	u32 pktlog_filter;
620 	u32 pktlog_mode;
621 	u32 pktlog_peer_valid;
622 	u8 pktlog_peer_addr[ETH_ALEN];
623 	u32 rx_filter;
624 	u32 mem_offset;
625 	u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS];
626 	struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX];
627 };
628 
629 struct ath11k_per_peer_tx_stats {
630 	u32 succ_bytes;
631 	u32 retry_bytes;
632 	u32 failed_bytes;
633 	u16 succ_pkts;
634 	u16 retry_pkts;
635 	u16 failed_pkts;
636 	u32 duration;
637 	u8 ba_fails;
638 	bool is_ampdu;
639 };
640 
641 #define ATH11K_FLUSH_TIMEOUT (5 * HZ)
642 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
643 
644 struct ath11k {
645 	struct ath11k_base *ab;
646 	struct ath11k_pdev *pdev;
647 	struct ieee80211_hw *hw;
648 	struct ath11k_pdev_wmi *wmi;
649 	struct ath11k_pdev_dp dp;
650 	u8 mac_addr[ETH_ALEN];
651 	struct ath11k_he ar_he;
652 	enum ath11k_state state;
653 	bool supports_6ghz;
654 	struct {
655 		struct completion started;
656 		struct completion completed;
657 		struct completion on_channel;
658 		struct delayed_work timeout;
659 		enum ath11k_scan_state state;
660 		bool is_roc;
661 		int vdev_id;
662 		int roc_freq;
663 		bool roc_notify;
664 	} scan;
665 
666 	struct {
667 		struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
668 		struct ieee80211_sband_iftype_data
669 			iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
670 	} mac;
671 
672 	unsigned long dev_flags;
673 	unsigned int filter_flags;
674 	unsigned long monitor_flags;
675 	u32 min_tx_power;
676 	u32 max_tx_power;
677 	u32 txpower_limit_2g;
678 	u32 txpower_limit_5g;
679 	u32 txpower_scale;
680 	u32 power_scale;
681 	u32 chan_tx_pwr;
682 	u32 num_stations;
683 	u32 max_num_stations;
684 	/* To synchronize concurrent synchronous mac80211 callback operations,
685 	 * concurrent debugfs configuration and concurrent FW statistics events.
686 	 */
687 	struct mutex conf_mutex;
688 	/* protects the radio specific data like debug stats, ppdu_stats_info stats,
689 	 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
690 	 * channel context data, survey info, test mode data, channel_update_queue.
691 	 */
692 	spinlock_t data_lock;
693 
694 	struct list_head arvifs;
695 	/* should never be NULL; needed for regular htt rx */
696 	struct ieee80211_channel *rx_channel;
697 
698 	/* valid during scan; needed for mgmt rx during scan */
699 	struct ieee80211_channel *scan_channel;
700 
701 	u8 cfg_tx_chainmask;
702 	u8 cfg_rx_chainmask;
703 	u8 num_rx_chains;
704 	u8 num_tx_chains;
705 	/* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
706 	u8 pdev_idx;
707 	u8 lmac_id;
708 
709 	struct completion peer_assoc_done;
710 	struct completion peer_delete_done;
711 
712 	int install_key_status;
713 	struct completion install_key_done;
714 
715 	int last_wmi_vdev_start_status;
716 	struct completion vdev_setup_done;
717 	struct completion vdev_delete_done;
718 
719 	int num_peers;
720 	int max_num_peers;
721 	u32 num_started_vdevs;
722 	u32 num_created_vdevs;
723 	unsigned long long allocated_vdev_map;
724 
725 	struct idr txmgmt_idr;
726 	/* protects txmgmt_idr data */
727 	spinlock_t txmgmt_idr_lock;
728 	atomic_t num_pending_mgmt_tx;
729 	wait_queue_head_t txmgmt_empty_waitq;
730 
731 	/* cycle count is reported twice for each visited channel during scan.
732 	 * access protected by data_lock
733 	 */
734 	u32 survey_last_rx_clear_count;
735 	u32 survey_last_cycle_count;
736 
737 	/* Channel info events are expected to come in pairs without and with
738 	 * COMPLETE flag set respectively for each channel visit during scan.
739 	 *
740 	 * However there are deviations from this rule. This flag is used to
741 	 * avoid reporting garbage data.
742 	 */
743 	bool ch_info_can_report_survey;
744 	struct survey_info survey[ATH11K_NUM_CHANS];
745 	struct completion bss_survey_done;
746 
747 	struct work_struct regd_update_work;
748 	struct work_struct channel_update_work;
749 	/* protected with data_lock */
750 	struct list_head channel_update_queue;
751 
752 	struct work_struct wmi_mgmt_tx_work;
753 	struct sk_buff_head wmi_mgmt_tx_queue;
754 
755 	struct ath11k_wow wow;
756 	struct completion target_suspend;
757 	bool target_suspend_ack;
758 	struct ath11k_per_peer_tx_stats peer_tx_stats;
759 	struct list_head ppdu_stats_info;
760 	u32 ppdu_stat_list_depth;
761 
762 	struct ath11k_per_peer_tx_stats cached_stats;
763 	u32 last_ppdu_id;
764 	u32 cached_ppdu_id;
765 	int monitor_vdev_id;
766 	struct completion fw_mode_reset;
767 	u8 ftm_msgref;
768 #ifdef CONFIG_ATH11K_DEBUGFS
769 	struct ath11k_debug debug;
770 #endif
771 #ifdef CONFIG_ATH11K_SPECTRAL
772 	struct ath11k_spectral spectral;
773 #endif
774 	bool dfs_block_radar_events;
775 	struct ath11k_thermal thermal;
776 	u32 vdev_id_11d_scan;
777 	struct completion completed_11d_scan;
778 	enum ath11k_11d_state state_11d;
779 	bool regdom_set_by_user;
780 	int hw_rate_code;
781 	u8 twt_enabled;
782 	bool nlo_enabled;
783 	u8 alpha2[REG_ALPHA2_LEN + 1];
784 	struct ath11k_fw_stats fw_stats;
785 	struct completion fw_stats_complete;
786 	bool fw_stats_done;
787 
788 	/* protected by conf_mutex */
789 	bool ps_state_enable;
790 	bool ps_timekeeper_enable;
791 	s8 max_allowed_tx_power;
792 };
793 
794 struct ath11k_band_cap {
795 	u32 phy_id;
796 	u32 max_bw_supported;
797 	u32 ht_cap_info;
798 	u32 he_cap_info[2];
799 	u32 he_mcs;
800 	u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
801 	struct ath11k_ppe_threshold he_ppet;
802 	u16 he_6ghz_capa;
803 };
804 
805 struct ath11k_pdev_cap {
806 	u32 supported_bands;
807 	u32 ampdu_density;
808 	u32 vht_cap;
809 	u32 vht_mcs;
810 	u32 he_mcs;
811 	u32 tx_chain_mask;
812 	u32 rx_chain_mask;
813 	u32 tx_chain_mask_shift;
814 	u32 rx_chain_mask_shift;
815 	struct ath11k_band_cap band[NUM_NL80211_BANDS];
816 	bool nss_ratio_enabled;
817 	u8 nss_ratio_info;
818 };
819 
820 struct ath11k_pdev {
821 	struct ath11k *ar;
822 	u32 pdev_id;
823 	struct ath11k_pdev_cap cap;
824 	u8 mac_addr[ETH_ALEN];
825 };
826 
827 struct ath11k_board_data {
828 	const struct firmware *fw;
829 	const void *data;
830 	size_t len;
831 };
832 
833 struct ath11k_pci_ops {
834 	int (*wakeup)(struct ath11k_base *ab);
835 	void (*release)(struct ath11k_base *ab);
836 	int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector);
837 	void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value);
838 	u32 (*window_read32)(struct ath11k_base *ab, u32 offset);
839 };
840 
841 /* IPQ8074 HW channel counters frequency value in hertz */
842 #define IPQ8074_CC_FREQ_HERTZ 320000
843 
844 struct ath11k_bp_stats {
845 	/* Head Pointer reported by the last HTT Backpressure event for the ring */
846 	u16 hp;
847 
848 	/* Tail Pointer reported by the last HTT Backpressure event for the ring */
849 	u16 tp;
850 
851 	/* Number of Backpressure events received for the ring */
852 	u32 count;
853 
854 	/* Last recorded event timestamp */
855 	unsigned long jiffies;
856 };
857 
858 struct ath11k_dp_ring_bp_stats {
859 	struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
860 	struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
861 };
862 
863 struct ath11k_soc_dp_tx_err_stats {
864 	/* TCL Ring Descriptor unavailable */
865 	u32 desc_na[DP_TCL_NUM_RING_MAX];
866 	/* Other failures during dp_tx due to mem allocation failure
867 	 * idr unavailable etc.
868 	 */
869 	atomic_t misc_fail;
870 };
871 
872 struct ath11k_soc_dp_stats {
873 	u32 err_ring_pkts;
874 	u32 invalid_rbm;
875 	u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
876 	u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
877 	u32 hal_reo_error[DP_REO_DST_RING_MAX];
878 	struct ath11k_soc_dp_tx_err_stats tx_err;
879 	struct ath11k_dp_ring_bp_stats bp_stats;
880 };
881 
882 struct ath11k_msi_user {
883 	char *name;
884 	int num_vectors;
885 	u32 base_vector;
886 };
887 
888 struct ath11k_msi_config {
889 	int total_vectors;
890 	int total_users;
891 	struct ath11k_msi_user *users;
892 	u16 hw_rev;
893 };
894 
895 /* Master structure to hold the hw data which may be used in core module */
896 struct ath11k_base {
897 	enum ath11k_hw_rev hw_rev;
898 	enum ath11k_firmware_mode fw_mode;
899 	struct platform_device *pdev;
900 	struct device *dev;
901 	struct ath11k_qmi qmi;
902 	struct ath11k_wmi_base wmi_ab;
903 	struct completion fw_ready;
904 	int num_radios;
905 	/* HW channel counters frequency value in hertz common to all MACs */
906 	u32 cc_freq_hz;
907 
908 	struct ath11k_dump_file_data *dump_data;
909 	size_t ath11k_coredump_len;
910 	struct work_struct dump_work;
911 
912 	struct ath11k_htc htc;
913 
914 	struct ath11k_dp dp;
915 
916 	void __iomem *mem;
917 	void __iomem *mem_ce;
918 	unsigned long mem_len;
919 
920 	struct {
921 		enum ath11k_bus bus;
922 		const struct ath11k_hif_ops *ops;
923 	} hif;
924 
925 	struct {
926 		struct completion wakeup_completed;
927 	} wow;
928 
929 	struct ath11k_ce ce;
930 	struct timer_list rx_replenish_retry;
931 	struct ath11k_hal hal;
932 	/* To synchronize core_start/core_stop */
933 	struct mutex core_lock;
934 	/* Protects data like peers */
935 	spinlock_t base_lock;
936 	struct ath11k_pdev pdevs[MAX_RADIOS];
937 	struct {
938 		enum WMI_HOST_WLAN_BAND supported_bands;
939 		u32 pdev_id;
940 	} target_pdev_ids[MAX_RADIOS];
941 	u8 target_pdev_count;
942 	struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
943 	struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
944 	unsigned long long free_vdev_map;
945 
946 	/* To synchronize rhash tbl write operation */
947 	struct mutex tbl_mtx_lock;
948 
949 	/* The rhashtable containing struct ath11k_peer keyed by mac addr */
950 	struct rhashtable *rhead_peer_addr;
951 	struct rhashtable_params rhash_peer_addr_param;
952 
953 	/* The rhashtable containing struct ath11k_peer keyed by id  */
954 	struct rhashtable *rhead_peer_id;
955 	struct rhashtable_params rhash_peer_id_param;
956 
957 	struct list_head peers;
958 	wait_queue_head_t peer_mapping_wq;
959 	u8 mac_addr[ETH_ALEN];
960 	int irq_num[ATH11K_IRQ_NUM_MAX];
961 	struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
962 	struct ath11k_targ_cap target_caps;
963 	u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
964 	bool pdevs_macaddr_valid;
965 
966 	struct ath11k_hw_params hw_params;
967 
968 	const struct firmware *cal_file;
969 
970 	/* Below regd's are protected by ab->data_lock */
971 	/* This is the regd set for every radio
972 	 * by the firmware during initialization
973 	 */
974 	struct ieee80211_regdomain *default_regd[MAX_RADIOS];
975 	/* This regd is set during dynamic country setting
976 	 * This may or may not be used during the runtime
977 	 */
978 	struct ieee80211_regdomain *new_regd[MAX_RADIOS];
979 	struct cur_regulatory_info *reg_info_store;
980 
981 	/* Current DFS Regulatory */
982 	enum ath11k_dfs_region dfs_region;
983 #ifdef CONFIG_ATH11K_DEBUGFS
984 	struct dentry *debugfs_soc;
985 #endif
986 	struct ath11k_soc_dp_stats soc_stats;
987 
988 	unsigned long dev_flags;
989 	struct completion driver_recovery;
990 	struct workqueue_struct *workqueue;
991 	struct work_struct restart_work;
992 	struct work_struct update_11d_work;
993 	u8 new_alpha2[3];
994 	struct workqueue_struct *workqueue_aux;
995 	struct work_struct reset_work;
996 	atomic_t reset_count;
997 	atomic_t recovery_count;
998 	atomic_t recovery_start_count;
999 	bool is_reset;
1000 	struct completion reset_complete;
1001 	struct completion reconfigure_complete;
1002 	struct completion recovery_start;
1003 	/* continuous recovery fail count */
1004 	atomic_t fail_cont_count;
1005 	unsigned long reset_fail_timeout;
1006 	struct {
1007 		/* protected by data_lock */
1008 		u32 fw_crash_counter;
1009 	} stats;
1010 	u32 pktlog_defs_checksum;
1011 
1012 	struct ath11k_dbring_cap *db_caps;
1013 	u32 num_db_cap;
1014 
1015 	/* To synchronize 11d scan vdev id */
1016 	struct mutex vdev_id_11d_lock;
1017 	struct timer_list mon_reap_timer;
1018 
1019 	struct completion htc_suspend;
1020 
1021 	struct {
1022 		enum ath11k_bdf_search bdf_search;
1023 		u32 vendor;
1024 		u32 device;
1025 		u32 subsystem_vendor;
1026 		u32 subsystem_device;
1027 	} id;
1028 
1029 	struct {
1030 		struct {
1031 			const struct ath11k_msi_config *config;
1032 			u32 ep_base_data;
1033 			u32 irqs[32];
1034 			u32 addr_lo;
1035 			u32 addr_hi;
1036 		} msi;
1037 
1038 		const struct ath11k_pci_ops *ops;
1039 	} pci;
1040 
1041 	struct {
1042 		u32 api_version;
1043 
1044 		const struct firmware *fw;
1045 		const u8 *amss_data;
1046 		size_t amss_len;
1047 		const u8 *m3_data;
1048 		size_t m3_len;
1049 
1050 		DECLARE_BITMAP(fw_features, ATH11K_FW_FEATURE_COUNT);
1051 	} fw;
1052 
1053 #ifdef CONFIG_NL80211_TESTMODE
1054 	struct {
1055 		u32 data_pos;
1056 		u32 expected_seq;
1057 		u8 *eventdata;
1058 	} testmode;
1059 #endif
1060 
1061 	/* must be last */
1062 	u8 drv_priv[] __aligned(sizeof(void *));
1063 };
1064 
1065 struct ath11k_fw_stats_pdev {
1066 	struct list_head list;
1067 
1068 	/* PDEV stats */
1069 	s32 ch_noise_floor;
1070 	/* Cycles spent transmitting frames */
1071 	u32 tx_frame_count;
1072 	/* Cycles spent receiving frames */
1073 	u32 rx_frame_count;
1074 	/* Total channel busy time, evidently */
1075 	u32 rx_clear_count;
1076 	/* Total on-channel time */
1077 	u32 cycle_count;
1078 	u32 phy_err_count;
1079 	u32 chan_tx_power;
1080 	u32 ack_rx_bad;
1081 	u32 rts_bad;
1082 	u32 rts_good;
1083 	u32 fcs_bad;
1084 	u32 no_beacons;
1085 	u32 mib_int_count;
1086 
1087 	/* PDEV TX stats */
1088 	/* Num HTT cookies queued to dispatch list */
1089 	s32 comp_queued;
1090 	/* Num HTT cookies dispatched */
1091 	s32 comp_delivered;
1092 	/* Num MSDU queued to WAL */
1093 	s32 msdu_enqued;
1094 	/* Num MPDU queue to WAL */
1095 	s32 mpdu_enqued;
1096 	/* Num MSDUs dropped by WMM limit */
1097 	s32 wmm_drop;
1098 	/* Num Local frames queued */
1099 	s32 local_enqued;
1100 	/* Num Local frames done */
1101 	s32 local_freed;
1102 	/* Num queued to HW */
1103 	s32 hw_queued;
1104 	/* Num PPDU reaped from HW */
1105 	s32 hw_reaped;
1106 	/* Num underruns */
1107 	s32 underrun;
1108 	/* Num hw paused */
1109 	u32 hw_paused;
1110 	/* Num PPDUs cleaned up in TX abort */
1111 	s32 tx_abort;
1112 	/* Num MPDUs requeued by SW */
1113 	s32 mpdus_requeued;
1114 	/* excessive retries */
1115 	u32 tx_ko;
1116 	u32 tx_xretry;
1117 	/* data hw rate code */
1118 	u32 data_rc;
1119 	/* Scheduler self triggers */
1120 	u32 self_triggers;
1121 	/* frames dropped due to excessive sw retries */
1122 	u32 sw_retry_failure;
1123 	/* illegal rate phy errors	*/
1124 	u32 illgl_rate_phy_err;
1125 	/* wal pdev continuous xretry */
1126 	u32 pdev_cont_xretry;
1127 	/* wal pdev tx timeouts */
1128 	u32 pdev_tx_timeout;
1129 	/* wal pdev resets */
1130 	u32 pdev_resets;
1131 	/* frames dropped due to non-availability of stateless TIDs */
1132 	u32 stateless_tid_alloc_failure;
1133 	/* PhY/BB underrun */
1134 	u32 phy_underrun;
1135 	/* MPDU is more than txop limit */
1136 	u32 txop_ovf;
1137 	/* Num sequences posted */
1138 	u32 seq_posted;
1139 	/* Num sequences failed in queueing */
1140 	u32 seq_failed_queueing;
1141 	/* Num sequences completed */
1142 	u32 seq_completed;
1143 	/* Num sequences restarted */
1144 	u32 seq_restarted;
1145 	/* Num of MU sequences posted */
1146 	u32 mu_seq_posted;
1147 	/* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
1148 	 * (Reset,channel change)
1149 	 */
1150 	s32 mpdus_sw_flush;
1151 	/* Num MPDUs filtered by HW, all filter condition (TTL expired) */
1152 	s32 mpdus_hw_filter;
1153 	/* Num MPDUs truncated by PDG (TXOP, TBTT,
1154 	 * PPDU_duration based on rate, dyn_bw)
1155 	 */
1156 	s32 mpdus_truncated;
1157 	/* Num MPDUs that was tried but didn't receive ACK or BA */
1158 	s32 mpdus_ack_failed;
1159 	/* Num MPDUs that was dropped du to expiry. */
1160 	s32 mpdus_expired;
1161 
1162 	/* PDEV RX stats */
1163 	/* Cnts any change in ring routing mid-ppdu */
1164 	s32 mid_ppdu_route_change;
1165 	/* Total number of statuses processed */
1166 	s32 status_rcvd;
1167 	/* Extra frags on rings 0-3 */
1168 	s32 r0_frags;
1169 	s32 r1_frags;
1170 	s32 r2_frags;
1171 	s32 r3_frags;
1172 	/* MSDUs / MPDUs delivered to HTT */
1173 	s32 htt_msdus;
1174 	s32 htt_mpdus;
1175 	/* MSDUs / MPDUs delivered to local stack */
1176 	s32 loc_msdus;
1177 	s32 loc_mpdus;
1178 	/* AMSDUs that have more MSDUs than the status ring size */
1179 	s32 oversize_amsdu;
1180 	/* Number of PHY errors */
1181 	s32 phy_errs;
1182 	/* Number of PHY errors drops */
1183 	s32 phy_err_drop;
1184 	/* Number of mpdu errors - FCS, MIC, ENC etc. */
1185 	s32 mpdu_errs;
1186 	/* Num overflow errors */
1187 	s32 rx_ovfl_errs;
1188 };
1189 
1190 struct ath11k_fw_stats_vdev {
1191 	struct list_head list;
1192 
1193 	u32 vdev_id;
1194 	u32 beacon_snr;
1195 	u32 data_snr;
1196 	u32 num_tx_frames[WLAN_MAX_AC];
1197 	u32 num_rx_frames;
1198 	u32 num_tx_frames_retries[WLAN_MAX_AC];
1199 	u32 num_tx_frames_failures[WLAN_MAX_AC];
1200 	u32 num_rts_fail;
1201 	u32 num_rts_success;
1202 	u32 num_rx_err;
1203 	u32 num_rx_discard;
1204 	u32 num_tx_not_acked;
1205 	u32 tx_rate_history[MAX_TX_RATE_VALUES];
1206 	u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
1207 };
1208 
1209 struct ath11k_fw_stats_bcn {
1210 	struct list_head list;
1211 
1212 	u32 vdev_id;
1213 	u32 tx_bcn_succ_cnt;
1214 	u32 tx_bcn_outage_cnt;
1215 };
1216 
1217 void ath11k_fw_stats_init(struct ath11k *ar);
1218 void ath11k_fw_stats_pdevs_free(struct list_head *head);
1219 void ath11k_fw_stats_vdevs_free(struct list_head *head);
1220 void ath11k_fw_stats_bcn_free(struct list_head *head);
1221 void ath11k_fw_stats_free(struct ath11k_fw_stats *stats);
1222 
1223 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
1224 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
1225 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
1226 
1227 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
1228 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
1229 
1230 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[];
1231 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[];
1232 
1233 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
1234 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
1235 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
1236 int ath11k_core_pre_init(struct ath11k_base *ab);
1237 int ath11k_core_init(struct ath11k_base *ath11k);
1238 void ath11k_core_deinit(struct ath11k_base *ath11k);
1239 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
1240 				      enum ath11k_bus bus);
1241 void ath11k_core_free(struct ath11k_base *ath11k);
1242 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
1243 			  struct ath11k_board_data *bd);
1244 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd);
1245 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
1246 				       struct ath11k_board_data *bd,
1247 				       const char *name);
1248 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
1249 int ath11k_core_check_dt(struct ath11k_base *ath11k);
1250 int ath11k_core_check_smbios(struct ath11k_base *ab);
1251 void ath11k_core_halt(struct ath11k *ar);
1252 int ath11k_core_resume(struct ath11k_base *ab);
1253 int ath11k_core_suspend(struct ath11k_base *ab);
1254 void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab);
1255 bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab);
1256 
1257 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
1258 						    const char *filename);
1259 
ath11k_scan_state_str(enum ath11k_scan_state state)1260 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
1261 {
1262 	switch (state) {
1263 	case ATH11K_SCAN_IDLE:
1264 		return "idle";
1265 	case ATH11K_SCAN_STARTING:
1266 		return "starting";
1267 	case ATH11K_SCAN_RUNNING:
1268 		return "running";
1269 	case ATH11K_SCAN_ABORTING:
1270 		return "aborting";
1271 	}
1272 
1273 	return "unknown";
1274 }
1275 
ATH11K_SKB_CB(struct sk_buff * skb)1276 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
1277 {
1278 	BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
1279 		     IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1280 	return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1281 }
1282 
ATH11K_SKB_RXCB(struct sk_buff * skb)1283 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
1284 {
1285 	BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
1286 	return (struct ath11k_skb_rxcb *)skb->cb;
1287 }
1288 
ath11k_vif_to_arvif(struct ieee80211_vif * vif)1289 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
1290 {
1291 	return (struct ath11k_vif *)vif->drv_priv;
1292 }
1293 
ath11k_sta_to_arsta(struct ieee80211_sta * sta)1294 static inline struct ath11k_sta *ath11k_sta_to_arsta(struct ieee80211_sta *sta)
1295 {
1296 	return (struct ath11k_sta *)sta->drv_priv;
1297 }
1298 
ath11k_ab_to_ar(struct ath11k_base * ab,int mac_id)1299 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
1300 					     int mac_id)
1301 {
1302 	return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
1303 }
1304 
ath11k_core_create_firmware_path(struct ath11k_base * ab,const char * filename,void * buf,size_t buf_len)1305 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
1306 						    const char *filename,
1307 						    void *buf, size_t buf_len)
1308 {
1309 	snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
1310 		 ab->hw_params.fw.dir, filename);
1311 }
1312 
ath11k_bus_str(enum ath11k_bus bus)1313 static inline const char *ath11k_bus_str(enum ath11k_bus bus)
1314 {
1315 	switch (bus) {
1316 	case ATH11K_BUS_PCI:
1317 		return "pci";
1318 	case ATH11K_BUS_AHB:
1319 		return "ahb";
1320 	}
1321 
1322 	return "unknown";
1323 }
1324 
1325 #endif /* _CORE_H_ */
1326