1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7 #ifndef ATH11K_CORE_H
8 #define ATH11K_CORE_H
9
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/bitfield.h>
14 #include <linux/dmi.h>
15 #include <linux/ctype.h>
16 #include <linux/rhashtable.h>
17 #include <linux/average.h>
18 #include <linux/firmware.h>
19 #include <linux/suspend.h>
20 #include <linux/of.h>
21
22 #include "qmi.h"
23 #include "htc.h"
24 #include "wmi.h"
25 #include "hal.h"
26 #include "dp.h"
27 #include "ce.h"
28 #include "mac.h"
29 #include "hw.h"
30 #include "hal_rx.h"
31 #include "reg.h"
32 #include "thermal.h"
33 #include "dbring.h"
34 #include "spectral.h"
35 #include "wow.h"
36 #include "fw.h"
37 #include "coredump.h"
38
39 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
40
41 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512
42
43 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
44
45 /* Pending management packets threshold for dropping probe responses */
46 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
47
48 #define ATH11K_INVALID_HW_MAC_ID 0xFF
49 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ)
50
51 /* SMBIOS type containing Board Data File Name Extension */
52 #define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8
53
54 /* SMBIOS type structure length (excluding strings-set) */
55 #define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9
56
57 /* The magic used by QCA spec */
58 #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_"
59
60 extern unsigned int ath11k_frame_mode;
61 extern bool ath11k_ftm_mode;
62
63 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ)
64
65 #define ATH11K_MON_TIMER_INTERVAL 10
66 #define ATH11K_RESET_TIMEOUT_HZ (20 * HZ)
67 #define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3
68 #define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5
69 #define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
70 #define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
71 #define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
72
73 enum ath11k_supported_bw {
74 ATH11K_BW_20 = 0,
75 ATH11K_BW_40 = 1,
76 ATH11K_BW_80 = 2,
77 ATH11K_BW_160 = 3,
78 };
79
80 enum ath11k_bdf_search {
81 ATH11K_BDF_SEARCH_DEFAULT,
82 ATH11K_BDF_SEARCH_BUS_AND_BOARD,
83 };
84
85 enum wme_ac {
86 WME_AC_BE,
87 WME_AC_BK,
88 WME_AC_VI,
89 WME_AC_VO,
90 WME_NUM_AC
91 };
92
93 #define ATH11K_HT_MCS_MAX 7
94 #define ATH11K_VHT_MCS_MAX 9
95 #define ATH11K_HE_MCS_MAX 11
96
97 enum ath11k_crypt_mode {
98 /* Only use hardware crypto engine */
99 ATH11K_CRYPT_MODE_HW,
100 /* Only use software crypto */
101 ATH11K_CRYPT_MODE_SW,
102 };
103
ath11k_tid_to_ac(u32 tid)104 static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
105 {
106 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
107 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
108 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
109 WME_AC_VO);
110 }
111
112 enum ath11k_skb_flags {
113 ATH11K_SKB_HW_80211_ENCAP = BIT(0),
114 ATH11K_SKB_CIPHER_SET = BIT(1),
115 };
116
117 struct ath11k_skb_cb {
118 dma_addr_t paddr;
119 u8 eid;
120 u8 flags;
121 u32 cipher;
122 struct ath11k *ar;
123 struct ieee80211_vif *vif;
124 } __packed;
125
126 struct ath11k_skb_rxcb {
127 dma_addr_t paddr;
128 bool is_first_msdu;
129 bool is_last_msdu;
130 bool is_continuation;
131 bool is_mcbc;
132 bool is_eapol;
133 struct hal_rx_desc *rx_desc;
134 u8 err_rel_src;
135 u8 err_code;
136 u8 mac_id;
137 u8 unmapped;
138 u8 is_frag;
139 u8 tid;
140 u16 peer_id;
141 u16 seq_no;
142 };
143
144 enum ath11k_hw_rev {
145 ATH11K_HW_IPQ8074,
146 ATH11K_HW_QCA6390_HW20,
147 ATH11K_HW_IPQ6018_HW10,
148 ATH11K_HW_QCN9074_HW10,
149 ATH11K_HW_WCN6855_HW20,
150 ATH11K_HW_WCN6855_HW21,
151 ATH11K_HW_WCN6750_HW10,
152 ATH11K_HW_IPQ5018_HW10,
153 ATH11K_HW_QCA2066_HW21,
154 ATH11K_HW_QCA6698AQ_HW21,
155 };
156
157 enum ath11k_firmware_mode {
158 /* the default mode, standard 802.11 functionality */
159 ATH11K_FIRMWARE_MODE_NORMAL,
160
161 /* factory tests etc */
162 ATH11K_FIRMWARE_MODE_FTM,
163
164 /* Cold boot calibration */
165 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
166 };
167
168 extern bool ath11k_cold_boot_cal;
169
170 #define ATH11K_IRQ_NUM_MAX 52
171 #define ATH11K_EXT_IRQ_NUM_MAX 16
172
173 struct ath11k_ext_irq_grp {
174 struct ath11k_base *ab;
175 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
176 u32 num_irq;
177 u32 grp_id;
178 u64 timestamp;
179 bool napi_enabled;
180 struct napi_struct napi;
181 struct net_device *napi_ndev;
182 };
183
184 enum ath11k_smbios_cc_type {
185 /* disable country code setting from SMBIOS */
186 ATH11K_SMBIOS_CC_DISABLE = 0,
187
188 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
189 ATH11K_SMBIOS_CC_ISO = 1,
190
191 /* worldwide regdomain */
192 ATH11K_SMBIOS_CC_WW = 2,
193 };
194
195 struct ath11k_smbios_bdf {
196 struct dmi_header hdr;
197
198 u8 features_disabled;
199
200 /* enum ath11k_smbios_cc_type */
201 u8 country_code_flag;
202
203 /* To set specific country, you need to set country code
204 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United
205 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'=
206 * 0x53). To set country to INDONESIA, then country code value =
207 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag =
208 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory
209 * setting.
210 */
211 u16 cc_code;
212
213 u8 bdf_enabled;
214 u8 bdf_ext[];
215 } __packed;
216
217 #define HEHANDLE_CAP_PHYINFO_SIZE 3
218 #define HECAP_PHYINFO_SIZE 9
219 #define HECAP_MACINFO_SIZE 5
220 #define HECAP_TXRX_MCS_NSS_SIZE 2
221 #define HECAP_PPET16_PPET8_MAX_SIZE 25
222
223 #define HE_PPET16_PPET8_SIZE 8
224
225 /* 802.11ax PPE (PPDU packet Extension) threshold */
226 struct he_ppe_threshold {
227 u32 numss_m1;
228 u32 ru_mask;
229 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
230 };
231
232 struct ath11k_he {
233 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
234 u32 hecap_rxmcsnssmap;
235 u32 hecap_txmcsnssmap;
236 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
237 struct he_ppe_threshold hecap_ppet;
238 u32 heop_param;
239 };
240
241 #define MAX_RADIOS 3
242
243 /* ipq5018 hw param macros */
244 #define MAX_RADIOS_5018 1
245 #define CE_CNT_5018 6
246 #define TARGET_CE_CNT_5018 9
247 #define SVC_CE_MAP_LEN_5018 17
248 #define RXDMA_PER_PDEV_5018 1
249
250 enum {
251 WMI_HOST_TP_SCALE_MAX = 0,
252 WMI_HOST_TP_SCALE_50 = 1,
253 WMI_HOST_TP_SCALE_25 = 2,
254 WMI_HOST_TP_SCALE_12 = 3,
255 WMI_HOST_TP_SCALE_MIN = 4,
256 WMI_HOST_TP_SCALE_SIZE = 5,
257 };
258
259 enum ath11k_scan_state {
260 ATH11K_SCAN_IDLE,
261 ATH11K_SCAN_STARTING,
262 ATH11K_SCAN_RUNNING,
263 ATH11K_SCAN_ABORTING,
264 };
265
266 enum ath11k_11d_state {
267 ATH11K_11D_IDLE,
268 ATH11K_11D_PREPARING,
269 ATH11K_11D_RUNNING,
270 };
271
272 enum ath11k_dev_flags {
273 ATH11K_CAC_RUNNING,
274 ATH11K_FLAG_CORE_REGISTERED,
275 ATH11K_FLAG_CRASH_FLUSH,
276 ATH11K_FLAG_RAW_MODE,
277 ATH11K_FLAG_HW_CRYPTO_DISABLED,
278 ATH11K_FLAG_BTCOEX,
279 ATH11K_FLAG_RECOVERY,
280 ATH11K_FLAG_UNREGISTERING,
281 ATH11K_FLAG_REGISTERED,
282 ATH11K_FLAG_QMI_FAIL,
283 ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
284 ATH11K_FLAG_CE_IRQ_ENABLED,
285 ATH11K_FLAG_EXT_IRQ_ENABLED,
286 ATH11K_FLAG_FIXED_MEM_RGN,
287 ATH11K_FLAG_DEVICE_INIT_DONE,
288 ATH11K_FLAG_MULTI_MSI_VECTORS,
289 ATH11K_FLAG_FTM_SEGMENTED,
290 };
291
292 enum ath11k_monitor_flags {
293 ATH11K_FLAG_MONITOR_CONF_ENABLED,
294 ATH11K_FLAG_MONITOR_STARTED,
295 ATH11K_FLAG_MONITOR_VDEV_CREATED,
296 };
297
298 #define ATH11K_IPV6_UC_TYPE 0
299 #define ATH11K_IPV6_AC_TYPE 1
300
301 #define ATH11K_IPV6_MAX_COUNT 16
302 #define ATH11K_IPV4_MAX_COUNT 2
303
304 struct ath11k_arp_ns_offload {
305 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4];
306 u32 ipv4_count;
307 u32 ipv6_count;
308 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
309 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
310 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT];
311 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT];
312 u8 mac_addr[ETH_ALEN];
313 };
314
315 struct ath11k_rekey_data {
316 u8 kck[NL80211_KCK_LEN];
317 u8 kek[NL80211_KCK_LEN];
318 u64 replay_ctr;
319 bool enable_offload;
320 };
321
322 /**
323 * struct ath11k_chan_power_info - TPE containing power info per channel chunk
324 * @chan_cfreq: channel center freq (MHz)
325 * e.g.
326 * channel 37/20 MHz, it is 6135
327 * channel 37/40 MHz, it is 6125
328 * channel 37/80 MHz, it is 6145
329 * channel 37/160 MHz, it is 6185
330 * @tx_power: transmit power (dBm)
331 */
332 struct ath11k_chan_power_info {
333 u16 chan_cfreq;
334 s8 tx_power;
335 };
336
337 /* ath11k only deals with 160 MHz, so 8 subchannels */
338 #define ATH11K_NUM_PWR_LEVELS 8
339
340 /**
341 * struct ath11k_reg_tpc_power_info - regulatory TPC power info
342 * @is_psd_power: is PSD power or not
343 * @eirp_power: Maximum EIRP power (dBm), valid only if power is PSD
344 * @ap_power_type: type of power (SP/LPI/VLP)
345 * @num_pwr_levels: number of power levels
346 * @reg_max: Array of maximum TX power (dBm) per PSD value
347 * @tpe: TPE values processed from TPE IE
348 * @chan_power_info: power info to send to firmware
349 */
350 struct ath11k_reg_tpc_power_info {
351 bool is_psd_power;
352 u8 eirp_power;
353 enum wmi_reg_6ghz_ap_type ap_power_type;
354 u8 num_pwr_levels;
355 u8 reg_max[ATH11K_NUM_PWR_LEVELS];
356 s8 tpe[ATH11K_NUM_PWR_LEVELS];
357 struct ath11k_chan_power_info chan_power_info[ATH11K_NUM_PWR_LEVELS];
358 };
359
360 struct ath11k_vif {
361 u32 vdev_id;
362 enum wmi_vdev_type vdev_type;
363 enum wmi_vdev_subtype vdev_subtype;
364 u32 beacon_interval;
365 u32 dtim_period;
366 u16 ast_hash;
367 u16 ast_idx;
368 u16 tcl_metadata;
369 u8 hal_addr_search_flags;
370 u8 search_type;
371
372 struct ath11k *ar;
373 struct ieee80211_vif *vif;
374
375 struct wmi_wmm_params_all_arg wmm_params;
376 struct wmi_wmm_params_all_arg muedca_params;
377 struct list_head list;
378 union {
379 struct {
380 u32 uapsd;
381 } sta;
382 struct {
383 /* 127 stations; wmi limit */
384 u8 tim_bitmap[16];
385 u8 tim_len;
386 u32 ssid_len;
387 u8 ssid[IEEE80211_MAX_SSID_LEN];
388 bool hidden_ssid;
389 /* P2P_IE with NoA attribute for P2P_GO case */
390 u32 noa_len;
391 u8 *noa_data;
392 } ap;
393 } u;
394
395 bool is_started;
396 bool is_up;
397 bool ftm_responder;
398 bool spectral_enabled;
399 bool ps;
400 u32 aid;
401 u8 bssid[ETH_ALEN];
402 struct cfg80211_bitrate_mask bitrate_mask;
403 struct delayed_work connection_loss_work;
404 struct work_struct bcn_tx_work;
405 int num_legacy_stations;
406 int rtscts_prot_mode;
407 int txpower;
408 bool rsnie_present;
409 bool wpaie_present;
410 bool bcca_zero_sent;
411 bool do_not_send_tmpl;
412 struct ath11k_arp_ns_offload arp_ns_offload;
413 struct ath11k_rekey_data rekey_data;
414
415 struct ath11k_reg_tpc_power_info reg_tpc_info;
416
417 /* Must be last - ends in a flexible-array member.
418 *
419 * FIXME: Driver should not copy struct ieee80211_chanctx_conf,
420 * especially because it has a flexible array. Find a better way.
421 */
422 struct ieee80211_chanctx_conf chanctx;
423 };
424
425 struct ath11k_vif_iter {
426 u32 vdev_id;
427 struct ath11k_vif *arvif;
428 };
429
430 struct ath11k_rx_peer_stats {
431 u64 num_msdu;
432 u64 num_mpdu_fcs_ok;
433 u64 num_mpdu_fcs_err;
434 u64 tcp_msdu_count;
435 u64 udp_msdu_count;
436 u64 other_msdu_count;
437 u64 ampdu_msdu_count;
438 u64 non_ampdu_msdu_count;
439 u64 stbc_count;
440 u64 beamformed_count;
441 u64 mcs_count[HAL_RX_MAX_MCS + 1];
442 u64 nss_count[HAL_RX_MAX_NSS];
443 u64 bw_count[HAL_RX_BW_MAX];
444 u64 gi_count[HAL_RX_GI_MAX];
445 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
446 u64 tid_count[IEEE80211_NUM_TIDS + 1];
447 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
448 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
449 u64 rx_duration;
450 u64 dcm_count;
451 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
452 };
453
454 #define ATH11K_HE_MCS_NUM 12
455 #define ATH11K_VHT_MCS_NUM 10
456 #define ATH11K_BW_NUM 4
457 #define ATH11K_NSS_NUM 4
458 #define ATH11K_LEGACY_NUM 12
459 #define ATH11K_GI_NUM 4
460 #define ATH11K_HT_MCS_NUM 32
461
462 enum ath11k_pkt_rx_err {
463 ATH11K_PKT_RX_ERR_FCS,
464 ATH11K_PKT_RX_ERR_TKIP,
465 ATH11K_PKT_RX_ERR_CRYPT,
466 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
467 ATH11K_PKT_RX_ERR_MAX,
468 };
469
470 enum ath11k_ampdu_subfrm_num {
471 ATH11K_AMPDU_SUBFRM_NUM_10,
472 ATH11K_AMPDU_SUBFRM_NUM_20,
473 ATH11K_AMPDU_SUBFRM_NUM_30,
474 ATH11K_AMPDU_SUBFRM_NUM_40,
475 ATH11K_AMPDU_SUBFRM_NUM_50,
476 ATH11K_AMPDU_SUBFRM_NUM_60,
477 ATH11K_AMPDU_SUBFRM_NUM_MORE,
478 ATH11K_AMPDU_SUBFRM_NUM_MAX,
479 };
480
481 enum ath11k_amsdu_subfrm_num {
482 ATH11K_AMSDU_SUBFRM_NUM_1,
483 ATH11K_AMSDU_SUBFRM_NUM_2,
484 ATH11K_AMSDU_SUBFRM_NUM_3,
485 ATH11K_AMSDU_SUBFRM_NUM_4,
486 ATH11K_AMSDU_SUBFRM_NUM_MORE,
487 ATH11K_AMSDU_SUBFRM_NUM_MAX,
488 };
489
490 enum ath11k_counter_type {
491 ATH11K_COUNTER_TYPE_BYTES,
492 ATH11K_COUNTER_TYPE_PKTS,
493 ATH11K_COUNTER_TYPE_MAX,
494 };
495
496 enum ath11k_stats_type {
497 ATH11K_STATS_TYPE_SUCC,
498 ATH11K_STATS_TYPE_FAIL,
499 ATH11K_STATS_TYPE_RETRY,
500 ATH11K_STATS_TYPE_AMPDU,
501 ATH11K_STATS_TYPE_MAX,
502 };
503
504 struct ath11k_htt_data_stats {
505 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
506 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
507 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
508 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
509 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
510 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
511 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
512 };
513
514 struct ath11k_htt_tx_stats {
515 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
516 u64 tx_duration;
517 u64 ba_fails;
518 u64 ack_fails;
519 };
520
521 struct ath11k_per_ppdu_tx_stats {
522 u16 succ_pkts;
523 u16 failed_pkts;
524 u16 retry_pkts;
525 u32 succ_bytes;
526 u32 failed_bytes;
527 u32 retry_bytes;
528 };
529
530 DECLARE_EWMA(avg_rssi, 10, 8)
531
532 struct ath11k_sta {
533 struct ath11k_vif *arvif;
534
535 /* the following are protected by ar->data_lock */
536 u32 changed; /* IEEE80211_RC_* */
537 u32 bw;
538 u32 nss;
539 u32 smps;
540 enum hal_pn_type pn_type;
541
542 struct work_struct update_wk;
543 struct work_struct set_4addr_wk;
544 struct rate_info txrate;
545 u32 peer_nss;
546 struct rate_info last_txrate;
547 u64 rx_duration;
548 u64 tx_duration;
549 u8 rssi_comb;
550 struct ewma_avg_rssi avg_rssi;
551 s8 rssi_beacon;
552 s8 chain_signal[IEEE80211_MAX_CHAINS];
553 struct ath11k_htt_tx_stats *tx_stats;
554 struct ath11k_rx_peer_stats *rx_stats;
555
556 #ifdef CONFIG_MAC80211_DEBUGFS
557 /* protected by conf_mutex */
558 bool aggr_mode;
559 #endif
560
561 bool use_4addr_set;
562 u16 tcl_metadata;
563
564 /* Protected with ar->data_lock */
565 enum ath11k_wmi_peer_ps_state peer_ps_state;
566 u64 ps_start_time;
567 u64 ps_start_jiffies;
568 u64 ps_total_duration;
569 bool peer_current_ps_valid;
570
571 u32 bw_prev;
572 };
573
574 #define ATH11K_MIN_5G_FREQ 4150
575 #define ATH11K_MIN_6G_FREQ 5925
576 #define ATH11K_MAX_6G_FREQ 7115
577 #define ATH11K_NUM_CHANS 102
578 #define ATH11K_MAX_5G_CHAN 177
579
580 enum ath11k_state {
581 ATH11K_STATE_OFF,
582 ATH11K_STATE_ON,
583 ATH11K_STATE_RESTARTING,
584 ATH11K_STATE_RESTARTED,
585 ATH11K_STATE_WEDGED,
586 ATH11K_STATE_FTM,
587 /* Add other states as required */
588 };
589
590 /* Antenna noise floor */
591 #define ATH11K_DEFAULT_NOISE_FLOOR -95
592
593 #define ATH11K_INVALID_RSSI_FULL -1
594
595 #define ATH11K_INVALID_RSSI_EMPTY -128
596
597 struct ath11k_fw_stats {
598 struct dentry *debugfs_fwstats;
599 u32 pdev_id;
600 u32 stats_id;
601 struct list_head pdevs;
602 struct list_head vdevs;
603 struct list_head bcn;
604 u32 num_vdev_recvd;
605 u32 num_bcn_recvd;
606 };
607
608 struct ath11k_dbg_htt_stats {
609 u8 type;
610 u8 reset;
611 struct debug_htt_stats_req *stats_req;
612 /* protects shared stats req buffer */
613 spinlock_t lock;
614 };
615
616 #define MAX_MODULE_ID_BITMAP_WORDS 16
617
618 struct ath11k_debug {
619 struct dentry *debugfs_pdev;
620 struct ath11k_dbg_htt_stats htt_stats;
621 u32 extd_tx_stats;
622 u32 extd_rx_stats;
623 u32 pktlog_filter;
624 u32 pktlog_mode;
625 u32 pktlog_peer_valid;
626 u8 pktlog_peer_addr[ETH_ALEN];
627 u32 rx_filter;
628 u32 mem_offset;
629 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS];
630 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX];
631 };
632
633 struct ath11k_per_peer_tx_stats {
634 u32 succ_bytes;
635 u32 retry_bytes;
636 u32 failed_bytes;
637 u16 succ_pkts;
638 u16 retry_pkts;
639 u16 failed_pkts;
640 u32 duration;
641 u8 ba_fails;
642 bool is_ampdu;
643 };
644
645 #define ATH11K_FLUSH_TIMEOUT (5 * HZ)
646 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
647
648 struct ath11k {
649 struct ath11k_base *ab;
650 struct ath11k_pdev *pdev;
651 struct ieee80211_hw *hw;
652 struct ath11k_pdev_wmi *wmi;
653 struct ath11k_pdev_dp dp;
654 u8 mac_addr[ETH_ALEN];
655 struct ath11k_he ar_he;
656 enum ath11k_state state;
657 bool supports_6ghz;
658 struct {
659 struct completion started;
660 struct completion completed;
661 struct completion on_channel;
662 struct delayed_work timeout;
663 enum ath11k_scan_state state;
664 bool is_roc;
665 int vdev_id;
666 int roc_freq;
667 bool roc_notify;
668 } scan;
669
670 struct {
671 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
672 struct ieee80211_sband_iftype_data
673 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
674 } mac;
675
676 unsigned long dev_flags;
677 unsigned int filter_flags;
678 unsigned long monitor_flags;
679 u32 min_tx_power;
680 u32 max_tx_power;
681 u32 txpower_limit_2g;
682 u32 txpower_limit_5g;
683 u32 txpower_scale;
684 u32 power_scale;
685 u32 chan_tx_pwr;
686 u32 num_stations;
687 u32 max_num_stations;
688 /* To synchronize concurrent synchronous mac80211 callback operations,
689 * concurrent debugfs configuration and concurrent FW statistics events.
690 */
691 struct mutex conf_mutex;
692 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
693 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
694 * channel context data, survey info, test mode data, channel_update_queue.
695 */
696 spinlock_t data_lock;
697
698 struct list_head arvifs;
699 /* should never be NULL; needed for regular htt rx */
700 struct ieee80211_channel *rx_channel;
701
702 /* valid during scan; needed for mgmt rx during scan */
703 struct ieee80211_channel *scan_channel;
704
705 u8 cfg_tx_chainmask;
706 u8 cfg_rx_chainmask;
707 u8 num_rx_chains;
708 u8 num_tx_chains;
709 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
710 u8 pdev_idx;
711 u8 lmac_id;
712
713 struct completion peer_assoc_done;
714 struct completion peer_delete_done;
715
716 int install_key_status;
717 struct completion install_key_done;
718
719 int last_wmi_vdev_start_status;
720 struct completion vdev_setup_done;
721 struct completion vdev_delete_done;
722
723 int num_peers;
724 int max_num_peers;
725 u32 num_started_vdevs;
726 u32 num_created_vdevs;
727 unsigned long long allocated_vdev_map;
728
729 struct idr txmgmt_idr;
730 /* protects txmgmt_idr data */
731 spinlock_t txmgmt_idr_lock;
732 atomic_t num_pending_mgmt_tx;
733 wait_queue_head_t txmgmt_empty_waitq;
734
735 /* cycle count is reported twice for each visited channel during scan.
736 * access protected by data_lock
737 */
738 u32 survey_last_rx_clear_count;
739 u32 survey_last_cycle_count;
740
741 /* Channel info events are expected to come in pairs without and with
742 * COMPLETE flag set respectively for each channel visit during scan.
743 *
744 * However there are deviations from this rule. This flag is used to
745 * avoid reporting garbage data.
746 */
747 bool ch_info_can_report_survey;
748 struct survey_info survey[ATH11K_NUM_CHANS];
749 struct completion bss_survey_done;
750
751 struct work_struct regd_update_work;
752 struct work_struct channel_update_work;
753 /* protected with data_lock */
754 struct list_head channel_update_queue;
755
756 struct work_struct wmi_mgmt_tx_work;
757 struct sk_buff_head wmi_mgmt_tx_queue;
758
759 struct ath11k_wow wow;
760 struct completion target_suspend;
761 bool target_suspend_ack;
762 struct ath11k_per_peer_tx_stats peer_tx_stats;
763 struct list_head ppdu_stats_info;
764 u32 ppdu_stat_list_depth;
765
766 struct ath11k_per_peer_tx_stats cached_stats;
767 u32 last_ppdu_id;
768 u32 cached_ppdu_id;
769 int monitor_vdev_id;
770 struct completion fw_mode_reset;
771 u8 ftm_msgref;
772 #ifdef CONFIG_ATH11K_DEBUGFS
773 struct ath11k_debug debug;
774 #endif
775 #ifdef CONFIG_ATH11K_SPECTRAL
776 struct ath11k_spectral spectral;
777 #endif
778 bool dfs_block_radar_events;
779 struct ath11k_thermal thermal;
780 u32 vdev_id_11d_scan;
781 struct completion completed_11d_scan;
782 enum ath11k_11d_state state_11d;
783 bool regdom_set_by_user;
784 int hw_rate_code;
785 u8 twt_enabled;
786 bool nlo_enabled;
787 u8 alpha2[REG_ALPHA2_LEN + 1];
788 struct ath11k_fw_stats fw_stats;
789 struct completion fw_stats_complete;
790 struct completion fw_stats_done;
791
792 /* protected by conf_mutex */
793 bool ps_state_enable;
794 bool ps_timekeeper_enable;
795 s8 max_allowed_tx_power;
796 };
797
798 struct ath11k_band_cap {
799 u32 phy_id;
800 u32 max_bw_supported;
801 u32 ht_cap_info;
802 u32 he_cap_info[2];
803 u32 he_mcs;
804 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
805 struct ath11k_ppe_threshold he_ppet;
806 u16 he_6ghz_capa;
807 };
808
809 struct ath11k_pdev_cap {
810 u32 supported_bands;
811 u32 ampdu_density;
812 u32 vht_cap;
813 u32 vht_mcs;
814 u32 he_mcs;
815 u32 tx_chain_mask;
816 u32 rx_chain_mask;
817 u32 tx_chain_mask_shift;
818 u32 rx_chain_mask_shift;
819 struct ath11k_band_cap band[NUM_NL80211_BANDS];
820 bool nss_ratio_enabled;
821 u8 nss_ratio_info;
822 };
823
824 struct ath11k_pdev {
825 struct ath11k *ar;
826 u32 pdev_id;
827 struct ath11k_pdev_cap cap;
828 u8 mac_addr[ETH_ALEN];
829 };
830
831 struct ath11k_board_data {
832 const struct firmware *fw;
833 const void *data;
834 size_t len;
835 };
836
837 struct ath11k_pci_ops {
838 int (*wakeup)(struct ath11k_base *ab);
839 void (*release)(struct ath11k_base *ab);
840 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector);
841 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value);
842 u32 (*window_read32)(struct ath11k_base *ab, u32 offset);
843 };
844
845 /* IPQ8074 HW channel counters frequency value in hertz */
846 #define IPQ8074_CC_FREQ_HERTZ 320000
847
848 struct ath11k_bp_stats {
849 /* Head Pointer reported by the last HTT Backpressure event for the ring */
850 u16 hp;
851
852 /* Tail Pointer reported by the last HTT Backpressure event for the ring */
853 u16 tp;
854
855 /* Number of Backpressure events received for the ring */
856 u32 count;
857
858 /* Last recorded event timestamp */
859 unsigned long jiffies;
860 };
861
862 struct ath11k_dp_ring_bp_stats {
863 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
864 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
865 };
866
867 struct ath11k_soc_dp_tx_err_stats {
868 /* TCL Ring Descriptor unavailable */
869 u32 desc_na[DP_TCL_NUM_RING_MAX];
870 /* Other failures during dp_tx due to mem allocation failure
871 * idr unavailable etc.
872 */
873 atomic_t misc_fail;
874 };
875
876 struct ath11k_soc_dp_stats {
877 u32 err_ring_pkts;
878 u32 invalid_rbm;
879 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
880 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
881 u32 hal_reo_error[DP_REO_DST_RING_MAX];
882 struct ath11k_soc_dp_tx_err_stats tx_err;
883 struct ath11k_dp_ring_bp_stats bp_stats;
884 };
885
886 struct ath11k_msi_user {
887 char *name;
888 int num_vectors;
889 u32 base_vector;
890 };
891
892 struct ath11k_msi_config {
893 int total_vectors;
894 int total_users;
895 struct ath11k_msi_user *users;
896 u16 hw_rev;
897 };
898
899 enum ath11k_pm_policy {
900 ATH11K_PM_DEFAULT,
901 ATH11K_PM_WOW,
902 };
903
904 /* Master structure to hold the hw data which may be used in core module */
905 struct ath11k_base {
906 enum ath11k_hw_rev hw_rev;
907 enum ath11k_firmware_mode fw_mode;
908 struct platform_device *pdev;
909 struct device *dev;
910 struct ath11k_qmi qmi;
911 struct ath11k_wmi_base wmi_ab;
912 struct completion fw_ready;
913 int num_radios;
914 /* HW channel counters frequency value in hertz common to all MACs */
915 u32 cc_freq_hz;
916
917 struct ath11k_dump_file_data *dump_data;
918 size_t ath11k_coredump_len;
919 struct work_struct dump_work;
920
921 struct ath11k_htc htc;
922
923 struct ath11k_dp dp;
924
925 void __iomem *mem;
926 void __iomem *mem_ce;
927 unsigned long mem_len;
928
929 struct {
930 enum ath11k_bus bus;
931 const struct ath11k_hif_ops *ops;
932 } hif;
933
934 struct {
935 struct completion wakeup_completed;
936 } wow;
937
938 struct ath11k_ce ce;
939 struct timer_list rx_replenish_retry;
940 struct ath11k_hal hal;
941 /* To synchronize core_start/core_stop */
942 struct mutex core_lock;
943 /* Protects data like peers */
944 spinlock_t base_lock;
945 struct ath11k_pdev pdevs[MAX_RADIOS];
946 struct {
947 enum WMI_HOST_WLAN_BAND supported_bands;
948 u32 pdev_id;
949 } target_pdev_ids[MAX_RADIOS];
950 u8 target_pdev_count;
951 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
952 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
953 unsigned long long free_vdev_map;
954
955 /* To synchronize rhash tbl write operation */
956 struct mutex tbl_mtx_lock;
957
958 /* The rhashtable containing struct ath11k_peer keyed by mac addr */
959 struct rhashtable *rhead_peer_addr;
960 struct rhashtable_params rhash_peer_addr_param;
961
962 /* The rhashtable containing struct ath11k_peer keyed by id */
963 struct rhashtable *rhead_peer_id;
964 struct rhashtable_params rhash_peer_id_param;
965
966 struct list_head peers;
967 wait_queue_head_t peer_mapping_wq;
968 u8 mac_addr[ETH_ALEN];
969 int irq_num[ATH11K_IRQ_NUM_MAX];
970 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
971 struct ath11k_targ_cap target_caps;
972 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
973 bool pdevs_macaddr_valid;
974
975 struct ath11k_hw_params hw_params;
976
977 const struct firmware *cal_file;
978
979 /* Below regd's are protected by ab->data_lock */
980 /* This is the regd set for every radio
981 * by the firmware during initialization
982 */
983 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
984 /* This regd is set during dynamic country setting
985 * This may or may not be used during the runtime
986 */
987 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
988 struct cur_regulatory_info *reg_info_store;
989
990 /* Current DFS Regulatory */
991 enum ath11k_dfs_region dfs_region;
992 #ifdef CONFIG_ATH11K_DEBUGFS
993 struct dentry *debugfs_soc;
994 #endif
995 struct ath11k_soc_dp_stats soc_stats;
996
997 unsigned long dev_flags;
998 struct completion driver_recovery;
999 struct workqueue_struct *workqueue;
1000 struct work_struct restart_work;
1001 struct work_struct update_11d_work;
1002 u8 new_alpha2[3];
1003 struct workqueue_struct *workqueue_aux;
1004 struct work_struct reset_work;
1005 atomic_t reset_count;
1006 atomic_t recovery_count;
1007 atomic_t recovery_start_count;
1008 bool is_reset;
1009 struct completion reset_complete;
1010 struct completion reconfigure_complete;
1011 struct completion recovery_start;
1012 /* continuous recovery fail count */
1013 atomic_t fail_cont_count;
1014 unsigned long reset_fail_timeout;
1015 struct {
1016 /* protected by data_lock */
1017 u32 fw_crash_counter;
1018 } stats;
1019 u32 pktlog_defs_checksum;
1020
1021 struct ath11k_dbring_cap *db_caps;
1022 u32 num_db_cap;
1023
1024 /* To synchronize 11d scan vdev id */
1025 struct mutex vdev_id_11d_lock;
1026 struct timer_list mon_reap_timer;
1027
1028 struct completion htc_suspend;
1029
1030 struct {
1031 enum ath11k_bdf_search bdf_search;
1032 u32 vendor;
1033 u32 device;
1034 u32 subsystem_vendor;
1035 u32 subsystem_device;
1036 } id;
1037
1038 struct {
1039 struct {
1040 const struct ath11k_msi_config *config;
1041 u32 ep_base_data;
1042 u32 irqs[32];
1043 u32 addr_lo;
1044 u32 addr_hi;
1045 } msi;
1046
1047 const struct ath11k_pci_ops *ops;
1048 } pci;
1049
1050 struct {
1051 u32 api_version;
1052
1053 const struct firmware *fw;
1054 const u8 *amss_data;
1055 size_t amss_len;
1056 const u8 *m3_data;
1057 size_t m3_len;
1058
1059 DECLARE_BITMAP(fw_features, ATH11K_FW_FEATURE_COUNT);
1060 } fw;
1061
1062 struct completion restart_completed;
1063
1064 #ifdef CONFIG_NL80211_TESTMODE
1065 struct {
1066 u32 data_pos;
1067 u32 expected_seq;
1068 u8 *eventdata;
1069 } testmode;
1070 #endif
1071
1072 enum ath11k_pm_policy pm_policy;
1073 enum ath11k_pm_policy actual_pm_policy;
1074 struct notifier_block pm_nb;
1075
1076 /* must be last */
1077 u8 drv_priv[] __aligned(sizeof(void *));
1078 };
1079
1080 struct ath11k_fw_stats_pdev {
1081 struct list_head list;
1082
1083 /* PDEV stats */
1084 s32 ch_noise_floor;
1085 /* Cycles spent transmitting frames */
1086 u32 tx_frame_count;
1087 /* Cycles spent receiving frames */
1088 u32 rx_frame_count;
1089 /* Total channel busy time, evidently */
1090 u32 rx_clear_count;
1091 /* Total on-channel time */
1092 u32 cycle_count;
1093 u32 phy_err_count;
1094 u32 chan_tx_power;
1095 u32 ack_rx_bad;
1096 u32 rts_bad;
1097 u32 rts_good;
1098 u32 fcs_bad;
1099 u32 no_beacons;
1100 u32 mib_int_count;
1101
1102 /* PDEV TX stats */
1103 /* Num HTT cookies queued to dispatch list */
1104 s32 comp_queued;
1105 /* Num HTT cookies dispatched */
1106 s32 comp_delivered;
1107 /* Num MSDU queued to WAL */
1108 s32 msdu_enqued;
1109 /* Num MPDU queue to WAL */
1110 s32 mpdu_enqued;
1111 /* Num MSDUs dropped by WMM limit */
1112 s32 wmm_drop;
1113 /* Num Local frames queued */
1114 s32 local_enqued;
1115 /* Num Local frames done */
1116 s32 local_freed;
1117 /* Num queued to HW */
1118 s32 hw_queued;
1119 /* Num PPDU reaped from HW */
1120 s32 hw_reaped;
1121 /* Num underruns */
1122 s32 underrun;
1123 /* Num hw paused */
1124 u32 hw_paused;
1125 /* Num PPDUs cleaned up in TX abort */
1126 s32 tx_abort;
1127 /* Num MPDUs requeued by SW */
1128 s32 mpdus_requeued;
1129 /* excessive retries */
1130 u32 tx_ko;
1131 u32 tx_xretry;
1132 /* data hw rate code */
1133 u32 data_rc;
1134 /* Scheduler self triggers */
1135 u32 self_triggers;
1136 /* frames dropped due to excessive sw retries */
1137 u32 sw_retry_failure;
1138 /* illegal rate phy errors */
1139 u32 illgl_rate_phy_err;
1140 /* wal pdev continuous xretry */
1141 u32 pdev_cont_xretry;
1142 /* wal pdev tx timeouts */
1143 u32 pdev_tx_timeout;
1144 /* wal pdev resets */
1145 u32 pdev_resets;
1146 /* frames dropped due to non-availability of stateless TIDs */
1147 u32 stateless_tid_alloc_failure;
1148 /* PhY/BB underrun */
1149 u32 phy_underrun;
1150 /* MPDU is more than txop limit */
1151 u32 txop_ovf;
1152 /* Num sequences posted */
1153 u32 seq_posted;
1154 /* Num sequences failed in queueing */
1155 u32 seq_failed_queueing;
1156 /* Num sequences completed */
1157 u32 seq_completed;
1158 /* Num sequences restarted */
1159 u32 seq_restarted;
1160 /* Num of MU sequences posted */
1161 u32 mu_seq_posted;
1162 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
1163 * (Reset,channel change)
1164 */
1165 s32 mpdus_sw_flush;
1166 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
1167 s32 mpdus_hw_filter;
1168 /* Num MPDUs truncated by PDG (TXOP, TBTT,
1169 * PPDU_duration based on rate, dyn_bw)
1170 */
1171 s32 mpdus_truncated;
1172 /* Num MPDUs that was tried but didn't receive ACK or BA */
1173 s32 mpdus_ack_failed;
1174 /* Num MPDUs that was dropped du to expiry. */
1175 s32 mpdus_expired;
1176
1177 /* PDEV RX stats */
1178 /* Cnts any change in ring routing mid-ppdu */
1179 s32 mid_ppdu_route_change;
1180 /* Total number of statuses processed */
1181 s32 status_rcvd;
1182 /* Extra frags on rings 0-3 */
1183 s32 r0_frags;
1184 s32 r1_frags;
1185 s32 r2_frags;
1186 s32 r3_frags;
1187 /* MSDUs / MPDUs delivered to HTT */
1188 s32 htt_msdus;
1189 s32 htt_mpdus;
1190 /* MSDUs / MPDUs delivered to local stack */
1191 s32 loc_msdus;
1192 s32 loc_mpdus;
1193 /* AMSDUs that have more MSDUs than the status ring size */
1194 s32 oversize_amsdu;
1195 /* Number of PHY errors */
1196 s32 phy_errs;
1197 /* Number of PHY errors drops */
1198 s32 phy_err_drop;
1199 /* Number of mpdu errors - FCS, MIC, ENC etc. */
1200 s32 mpdu_errs;
1201 /* Num overflow errors */
1202 s32 rx_ovfl_errs;
1203 };
1204
1205 struct ath11k_fw_stats_vdev {
1206 struct list_head list;
1207
1208 u32 vdev_id;
1209 u32 beacon_snr;
1210 u32 data_snr;
1211 u32 num_tx_frames[WLAN_MAX_AC];
1212 u32 num_rx_frames;
1213 u32 num_tx_frames_retries[WLAN_MAX_AC];
1214 u32 num_tx_frames_failures[WLAN_MAX_AC];
1215 u32 num_rts_fail;
1216 u32 num_rts_success;
1217 u32 num_rx_err;
1218 u32 num_rx_discard;
1219 u32 num_tx_not_acked;
1220 u32 tx_rate_history[MAX_TX_RATE_VALUES];
1221 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
1222 };
1223
1224 struct ath11k_fw_stats_bcn {
1225 struct list_head list;
1226
1227 u32 vdev_id;
1228 u32 tx_bcn_succ_cnt;
1229 u32 tx_bcn_outage_cnt;
1230 };
1231
1232 void ath11k_fw_stats_init(struct ath11k *ar);
1233 void ath11k_fw_stats_pdevs_free(struct list_head *head);
1234 void ath11k_fw_stats_vdevs_free(struct list_head *head);
1235 void ath11k_fw_stats_bcn_free(struct list_head *head);
1236 void ath11k_fw_stats_free(struct ath11k_fw_stats *stats);
1237
1238 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
1239 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
1240 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
1241
1242 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
1243 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
1244
1245 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[];
1246 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[];
1247
1248 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
1249 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
1250 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
1251 int ath11k_core_pre_init(struct ath11k_base *ab);
1252 int ath11k_core_init(struct ath11k_base *ath11k);
1253 void ath11k_core_deinit(struct ath11k_base *ath11k);
1254 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
1255 enum ath11k_bus bus);
1256 void ath11k_core_free(struct ath11k_base *ath11k);
1257 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
1258 struct ath11k_board_data *bd);
1259 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd);
1260 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
1261 struct ath11k_board_data *bd,
1262 const char *name);
1263 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
1264 int ath11k_core_check_dt(struct ath11k_base *ath11k);
1265 int ath11k_core_check_smbios(struct ath11k_base *ab);
1266 void ath11k_core_halt(struct ath11k *ar);
1267 int ath11k_core_resume_early(struct ath11k_base *ab);
1268 int ath11k_core_resume(struct ath11k_base *ab);
1269 int ath11k_core_suspend(struct ath11k_base *ab);
1270 int ath11k_core_suspend_late(struct ath11k_base *ab);
1271 void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab);
1272 bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab);
1273
1274 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
1275 const char *filename);
1276
ath11k_scan_state_str(enum ath11k_scan_state state)1277 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
1278 {
1279 switch (state) {
1280 case ATH11K_SCAN_IDLE:
1281 return "idle";
1282 case ATH11K_SCAN_STARTING:
1283 return "starting";
1284 case ATH11K_SCAN_RUNNING:
1285 return "running";
1286 case ATH11K_SCAN_ABORTING:
1287 return "aborting";
1288 }
1289
1290 return "unknown";
1291 }
1292
ATH11K_SKB_CB(struct sk_buff * skb)1293 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
1294 {
1295 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
1296 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1297 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1298 }
1299
ATH11K_SKB_RXCB(struct sk_buff * skb)1300 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
1301 {
1302 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
1303 return (struct ath11k_skb_rxcb *)skb->cb;
1304 }
1305
ath11k_vif_to_arvif(struct ieee80211_vif * vif)1306 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
1307 {
1308 return (struct ath11k_vif *)vif->drv_priv;
1309 }
1310
ath11k_sta_to_arsta(struct ieee80211_sta * sta)1311 static inline struct ath11k_sta *ath11k_sta_to_arsta(struct ieee80211_sta *sta)
1312 {
1313 return (struct ath11k_sta *)sta->drv_priv;
1314 }
1315
ath11k_ab_to_ar(struct ath11k_base * ab,int mac_id)1316 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
1317 int mac_id)
1318 {
1319 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
1320 }
1321
ath11k_core_create_firmware_path(struct ath11k_base * ab,const char * filename,void * buf,size_t buf_len)1322 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
1323 const char *filename,
1324 void *buf, size_t buf_len)
1325 {
1326 const char *fw_name = NULL;
1327
1328 of_property_read_string(ab->dev->of_node, "firmware-name", &fw_name);
1329
1330 if (fw_name && strncmp(filename, "board", 5))
1331 snprintf(buf, buf_len, "%s/%s/%s/%s", ATH11K_FW_DIR,
1332 ab->hw_params.fw.dir, fw_name, filename);
1333 else
1334 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
1335 ab->hw_params.fw.dir, filename);
1336 }
1337
ath11k_bus_str(enum ath11k_bus bus)1338 static inline const char *ath11k_bus_str(enum ath11k_bus bus)
1339 {
1340 switch (bus) {
1341 case ATH11K_BUS_PCI:
1342 return "pci";
1343 case ATH11K_BUS_AHB:
1344 return "ahb";
1345 }
1346
1347 return "unknown";
1348 }
1349
1350 void ath11k_core_pm_notifier_unregister(struct ath11k_base *ab);
1351
1352 #endif /* _CORE_H_ */
1353