xref: /linux/drivers/rtc/rtc-at91rm9200.c (revision 0ea5c948cb64bab5bc7a5516774eb8536f05aa0d)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *	Real Time Clock interface for Linux on Atmel AT91RM9200
4  *
5  *	Copyright (C) 2002 Rick Bronson
6  *
7  *	Converted to RTC class model by Andrew Victor
8  *
9  *	Ported to Linux 2.6 by Steven Scholz
10  *	Based on s3c2410-rtc.c Simtec Electronics
11  *
12  *	Based on sa1100-rtc.c by Nils Faerber
13  *	Based on rtc.c by Paul Gortmaker
14  */
15 
16 #include <linux/bcd.h>
17 #include <linux/bitfield.h>
18 #include <linux/clk.h>
19 #include <linux/completion.h>
20 #include <linux/interrupt.h>
21 #include <linux/ioctl.h>
22 #include <linux/io.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/of.h>
26 #include <linux/platform_device.h>
27 #include <linux/rtc.h>
28 #include <linux/spinlock.h>
29 #include <linux/suspend.h>
30 #include <linux/time.h>
31 #include <linux/uaccess.h>
32 
33 #define	AT91_RTC_CR		0x00			/* Control Register */
34 #define		AT91_RTC_UPDTIM		BIT(0)		/* Update Request Time Register */
35 #define		AT91_RTC_UPDCAL		BIT(1)		/* Update Request Calendar Register */
36 
37 #define	AT91_RTC_MR		0x04			/* Mode Register */
38 #define		AT91_RTC_HRMOD		BIT(0)		/* 12/24 hour mode */
39 #define		AT91_RTC_NEGPPM		BIT(4)		/* Negative PPM correction */
40 #define		AT91_RTC_CORRECTION	GENMASK(14, 8)	/* Slow clock correction */
41 #define		AT91_RTC_HIGHPPM	BIT(15)		/* High PPM correction */
42 
43 #define	AT91_RTC_TIMR		0x08			/* Time Register */
44 #define		AT91_RTC_SEC		GENMASK(6, 0)	/* Current Second */
45 #define		AT91_RTC_MIN		GENMASK(14, 8)	/* Current Minute */
46 #define		AT91_RTC_HOUR		GENMASK(21, 16)	/* Current Hour */
47 #define		AT91_RTC_AMPM		BIT(22)		/* Ante Meridiem Post Meridiem Indicator */
48 
49 #define	AT91_RTC_CALR		0x0c			/* Calendar Register */
50 #define		AT91_RTC_CENT		GENMASK(6, 0)	/* Current Century */
51 #define		AT91_RTC_YEAR		GENMASK(15, 8)	/* Current Year */
52 #define		AT91_RTC_MONTH		GENMASK(20, 16)	/* Current Month */
53 #define		AT91_RTC_DAY		GENMASK(23, 21)	/* Current Day */
54 #define		AT91_RTC_DATE		GENMASK(29, 24)	/* Current Date */
55 
56 #define	AT91_RTC_TIMALR		0x10			/* Time Alarm Register */
57 #define		AT91_RTC_SECEN		BIT(7)		/* Second Alarm Enable */
58 #define		AT91_RTC_MINEN		BIT(15)		/* Minute Alarm Enable */
59 #define		AT91_RTC_HOUREN		BIT(23)		/* Hour Alarm Enable */
60 
61 #define	AT91_RTC_CALALR		0x14			/* Calendar Alarm Register */
62 #define		AT91_RTC_MTHEN		BIT(23)		/* Month Alarm Enable */
63 #define		AT91_RTC_DATEEN		BIT(31)		/* Date Alarm Enable */
64 
65 #define	AT91_RTC_SR		0x18			/* Status Register */
66 #define		AT91_RTC_ACKUPD		BIT(0)		/* Acknowledge for Update */
67 #define		AT91_RTC_ALARM		BIT(1)		/* Alarm Flag */
68 #define		AT91_RTC_SECEV		BIT(2)		/* Second Event */
69 #define		AT91_RTC_TIMEV		BIT(3)		/* Time Event */
70 #define		AT91_RTC_CALEV		BIT(4)		/* Calendar Event */
71 
72 #define	AT91_RTC_SCCR		0x1c			/* Status Clear Command Register */
73 #define	AT91_RTC_IER		0x20			/* Interrupt Enable Register */
74 #define	AT91_RTC_IDR		0x24			/* Interrupt Disable Register */
75 #define	AT91_RTC_IMR		0x28			/* Interrupt Mask Register */
76 
77 #define	AT91_RTC_VER		0x2c			/* Valid Entry Register */
78 #define		AT91_RTC_NVTIM		BIT(0)		/* Non valid Time */
79 #define		AT91_RTC_NVCAL		BIT(1)		/* Non valid Calendar */
80 #define		AT91_RTC_NVTIMALR	BIT(2)		/* Non valid Time Alarm */
81 #define		AT91_RTC_NVCALALR	BIT(3)		/* Non valid Calendar Alarm */
82 
83 #define AT91_RTC_CORR_DIVIDEND		3906000
84 #define AT91_RTC_CORR_LOW_RATIO		20
85 
86 #define at91_rtc_read(field) \
87 	readl_relaxed(at91_rtc_regs + field)
88 #define at91_rtc_write(field, val) \
89 	writel_relaxed((val), at91_rtc_regs + field)
90 
91 struct at91_rtc_config {
92 	bool use_shadow_imr;
93 	bool has_correction;
94 };
95 
96 static const struct at91_rtc_config *at91_rtc_config;
97 static DECLARE_COMPLETION(at91_rtc_updated);
98 static DECLARE_COMPLETION(at91_rtc_upd_rdy);
99 static void __iomem *at91_rtc_regs;
100 static int irq;
101 static DEFINE_SPINLOCK(at91_rtc_lock);
102 static u32 at91_rtc_shadow_imr;
103 static bool suspended;
104 static DEFINE_SPINLOCK(suspended_lock);
105 static unsigned long cached_events;
106 static u32 at91_rtc_imr;
107 static struct clk *sclk;
108 
at91_rtc_write_ier(u32 mask)109 static void at91_rtc_write_ier(u32 mask)
110 {
111 	unsigned long flags;
112 
113 	spin_lock_irqsave(&at91_rtc_lock, flags);
114 	at91_rtc_shadow_imr |= mask;
115 	at91_rtc_write(AT91_RTC_IER, mask);
116 	spin_unlock_irqrestore(&at91_rtc_lock, flags);
117 }
118 
at91_rtc_write_idr(u32 mask)119 static void at91_rtc_write_idr(u32 mask)
120 {
121 	unsigned long flags;
122 
123 	spin_lock_irqsave(&at91_rtc_lock, flags);
124 	at91_rtc_write(AT91_RTC_IDR, mask);
125 	/*
126 	 * Register read back (of any RTC-register) needed to make sure
127 	 * IDR-register write has reached the peripheral before updating
128 	 * shadow mask.
129 	 *
130 	 * Note that there is still a possibility that the mask is updated
131 	 * before interrupts have actually been disabled in hardware. The only
132 	 * way to be certain would be to poll the IMR-register, which is
133 	 * the very register we are trying to emulate. The register read back
134 	 * is a reasonable heuristic.
135 	 */
136 	at91_rtc_read(AT91_RTC_SR);
137 	at91_rtc_shadow_imr &= ~mask;
138 	spin_unlock_irqrestore(&at91_rtc_lock, flags);
139 }
140 
at91_rtc_read_imr(void)141 static u32 at91_rtc_read_imr(void)
142 {
143 	unsigned long flags;
144 	u32 mask;
145 
146 	if (at91_rtc_config->use_shadow_imr) {
147 		spin_lock_irqsave(&at91_rtc_lock, flags);
148 		mask = at91_rtc_shadow_imr;
149 		spin_unlock_irqrestore(&at91_rtc_lock, flags);
150 	} else {
151 		mask = at91_rtc_read(AT91_RTC_IMR);
152 	}
153 
154 	return mask;
155 }
156 
157 /*
158  * Decode time/date into rtc_time structure
159  */
at91_rtc_decodetime(unsigned int timereg,unsigned int calreg,struct rtc_time * tm)160 static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg,
161 				struct rtc_time *tm)
162 {
163 	unsigned int time, date;
164 
165 	/* must read twice in case it changes */
166 	do {
167 		time = at91_rtc_read(timereg);
168 		date = at91_rtc_read(calreg);
169 	} while ((time != at91_rtc_read(timereg)) ||
170 			(date != at91_rtc_read(calreg)));
171 
172 	tm->tm_sec  = bcd2bin(FIELD_GET(AT91_RTC_SEC, time));
173 	tm->tm_min  = bcd2bin(FIELD_GET(AT91_RTC_MIN, time));
174 	tm->tm_hour = bcd2bin(FIELD_GET(AT91_RTC_HOUR, time));
175 
176 	/*
177 	 * The Calendar Alarm register does not have a field for
178 	 * the year - so these will return an invalid value.
179 	 */
180 	tm->tm_year  = bcd2bin(date & AT91_RTC_CENT) * 100;	/* century */
181 	tm->tm_year += bcd2bin(FIELD_GET(AT91_RTC_YEAR, date));	/* year */
182 
183 	tm->tm_wday = bcd2bin(FIELD_GET(AT91_RTC_DAY, date)) - 1;	/* day of the week [0-6], Sunday=0 */
184 	tm->tm_mon  = bcd2bin(FIELD_GET(AT91_RTC_MONTH, date)) - 1;
185 	tm->tm_mday = bcd2bin(FIELD_GET(AT91_RTC_DATE, date));
186 }
187 
188 /*
189  * Read current time and date in RTC
190  */
at91_rtc_readtime(struct device * dev,struct rtc_time * tm)191 static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm)
192 {
193 	at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, tm);
194 	tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
195 	tm->tm_year = tm->tm_year - 1900;
196 
197 	dev_dbg(dev, "%s(): %ptR\n", __func__, tm);
198 
199 	return 0;
200 }
201 
202 /*
203  * Set current time and date in RTC
204  */
at91_rtc_settime(struct device * dev,struct rtc_time * tm)205 static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
206 {
207 	unsigned long cr;
208 
209 	dev_dbg(dev, "%s(): %ptR\n", __func__, tm);
210 
211 	wait_for_completion(&at91_rtc_upd_rdy);
212 
213 	/* Stop Time/Calendar from counting */
214 	cr = at91_rtc_read(AT91_RTC_CR);
215 	at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM);
216 
217 	at91_rtc_write_ier(AT91_RTC_ACKUPD);
218 	wait_for_completion(&at91_rtc_updated);	/* wait for ACKUPD interrupt */
219 	at91_rtc_write_idr(AT91_RTC_ACKUPD);
220 
221 	at91_rtc_write(AT91_RTC_TIMR,
222 			  FIELD_PREP(AT91_RTC_SEC, bin2bcd(tm->tm_sec))
223 			| FIELD_PREP(AT91_RTC_MIN, bin2bcd(tm->tm_min))
224 			| FIELD_PREP(AT91_RTC_HOUR, bin2bcd(tm->tm_hour)));
225 
226 	at91_rtc_write(AT91_RTC_CALR,
227 			  FIELD_PREP(AT91_RTC_CENT,
228 				     bin2bcd((tm->tm_year + 1900) / 100))
229 			| FIELD_PREP(AT91_RTC_YEAR, bin2bcd(tm->tm_year % 100))
230 			| FIELD_PREP(AT91_RTC_MONTH, bin2bcd(tm->tm_mon + 1))
231 			| FIELD_PREP(AT91_RTC_DAY, bin2bcd(tm->tm_wday + 1))
232 			| FIELD_PREP(AT91_RTC_DATE, bin2bcd(tm->tm_mday)));
233 
234 	/* Restart Time/Calendar */
235 	cr = at91_rtc_read(AT91_RTC_CR);
236 	at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_SECEV);
237 	at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM));
238 	at91_rtc_write_ier(AT91_RTC_SECEV);
239 
240 	return 0;
241 }
242 
243 /*
244  * Read alarm time and date in RTC
245  */
at91_rtc_readalarm(struct device * dev,struct rtc_wkalrm * alrm)246 static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
247 {
248 	struct rtc_time *tm = &alrm->time;
249 
250 	at91_rtc_decodetime(AT91_RTC_TIMALR, AT91_RTC_CALALR, tm);
251 	tm->tm_year = -1;
252 
253 	alrm->enabled = (at91_rtc_read_imr() & AT91_RTC_ALARM)
254 			? 1 : 0;
255 
256 	dev_dbg(dev, "%s(): %ptR %sabled\n", __func__, tm,
257 		alrm->enabled ? "en" : "dis");
258 
259 	return 0;
260 }
261 
262 /*
263  * Set alarm time and date in RTC
264  */
at91_rtc_setalarm(struct device * dev,struct rtc_wkalrm * alrm)265 static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
266 {
267 	struct rtc_time tm = alrm->time;
268 
269 	at91_rtc_write_idr(AT91_RTC_ALARM);
270 	at91_rtc_write(AT91_RTC_TIMALR,
271 		  FIELD_PREP(AT91_RTC_SEC, bin2bcd(alrm->time.tm_sec))
272 		| FIELD_PREP(AT91_RTC_MIN, bin2bcd(alrm->time.tm_min))
273 		| FIELD_PREP(AT91_RTC_HOUR, bin2bcd(alrm->time.tm_hour))
274 		| AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN);
275 	at91_rtc_write(AT91_RTC_CALALR,
276 		  FIELD_PREP(AT91_RTC_MONTH, bin2bcd(alrm->time.tm_mon + 1))
277 		| FIELD_PREP(AT91_RTC_DATE, bin2bcd(alrm->time.tm_mday))
278 		| AT91_RTC_DATEEN | AT91_RTC_MTHEN);
279 
280 	if (alrm->enabled) {
281 		at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
282 		at91_rtc_write_ier(AT91_RTC_ALARM);
283 	}
284 
285 	dev_dbg(dev, "%s(): %ptR\n", __func__, &tm);
286 
287 	return 0;
288 }
289 
at91_rtc_alarm_irq_enable(struct device * dev,unsigned int enabled)290 static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
291 {
292 	dev_dbg(dev, "%s(): cmd=%08x\n", __func__, enabled);
293 
294 	if (enabled) {
295 		at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
296 		at91_rtc_write_ier(AT91_RTC_ALARM);
297 	} else
298 		at91_rtc_write_idr(AT91_RTC_ALARM);
299 
300 	return 0;
301 }
302 
at91_rtc_readoffset(struct device * dev,long * offset)303 static int at91_rtc_readoffset(struct device *dev, long *offset)
304 {
305 	u32 mr = at91_rtc_read(AT91_RTC_MR);
306 	long val = FIELD_GET(AT91_RTC_CORRECTION, mr);
307 
308 	if (!val) {
309 		*offset = 0;
310 		return 0;
311 	}
312 
313 	val++;
314 
315 	if (!(mr & AT91_RTC_NEGPPM))
316 		val = -val;
317 
318 	if (!(mr & AT91_RTC_HIGHPPM))
319 		val *= AT91_RTC_CORR_LOW_RATIO;
320 
321 	*offset = DIV_ROUND_CLOSEST(AT91_RTC_CORR_DIVIDEND, val);
322 
323 	return 0;
324 }
325 
at91_rtc_setoffset(struct device * dev,long offset)326 static int at91_rtc_setoffset(struct device *dev, long offset)
327 {
328 	long corr;
329 	u32 mr;
330 
331 	if (offset > AT91_RTC_CORR_DIVIDEND / 2)
332 		return -ERANGE;
333 	if (offset < -AT91_RTC_CORR_DIVIDEND / 2)
334 		return -ERANGE;
335 
336 	mr = at91_rtc_read(AT91_RTC_MR);
337 	mr &= ~(AT91_RTC_NEGPPM | AT91_RTC_CORRECTION | AT91_RTC_HIGHPPM);
338 
339 	if (offset > 0)
340 		mr |= AT91_RTC_NEGPPM;
341 	else
342 		offset = -offset;
343 
344 	/* offset less than 764 ppb, disable correction*/
345 	if (offset < 764) {
346 		at91_rtc_write(AT91_RTC_MR, mr & ~AT91_RTC_NEGPPM);
347 
348 		return 0;
349 	}
350 
351 	/*
352 	 * 29208 ppb is the perfect cutoff between low range and high range
353 	 * low range values are never better than high range value after that.
354 	 */
355 	if (offset < 29208) {
356 		corr = DIV_ROUND_CLOSEST(AT91_RTC_CORR_DIVIDEND, offset * AT91_RTC_CORR_LOW_RATIO);
357 	} else {
358 		corr = DIV_ROUND_CLOSEST(AT91_RTC_CORR_DIVIDEND, offset);
359 		mr |= AT91_RTC_HIGHPPM;
360 	}
361 
362 	if (corr > 128)
363 		corr = 128;
364 
365 	mr |= FIELD_PREP(AT91_RTC_CORRECTION, corr - 1);
366 
367 	at91_rtc_write(AT91_RTC_MR, mr);
368 
369 	return 0;
370 }
371 
372 /*
373  * IRQ handler for the RTC
374  */
at91_rtc_interrupt(int irq,void * dev_id)375 static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
376 {
377 	struct platform_device *pdev = dev_id;
378 	struct rtc_device *rtc = platform_get_drvdata(pdev);
379 	unsigned int rtsr;
380 	unsigned long events = 0;
381 	int ret = IRQ_NONE;
382 
383 	spin_lock(&suspended_lock);
384 	rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read_imr();
385 	if (rtsr) {		/* this interrupt is shared!  Is it ours? */
386 		if (rtsr & AT91_RTC_ALARM)
387 			events |= (RTC_AF | RTC_IRQF);
388 		if (rtsr & AT91_RTC_SECEV) {
389 			complete(&at91_rtc_upd_rdy);
390 			at91_rtc_write_idr(AT91_RTC_SECEV);
391 		}
392 		if (rtsr & AT91_RTC_ACKUPD)
393 			complete(&at91_rtc_updated);
394 
395 		at91_rtc_write(AT91_RTC_SCCR, rtsr);	/* clear status reg */
396 
397 		if (!suspended) {
398 			rtc_update_irq(rtc, 1, events);
399 
400 			dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n",
401 				__func__, events >> 8, events & 0x000000FF);
402 		} else {
403 			cached_events |= events;
404 			at91_rtc_write_idr(at91_rtc_imr);
405 			pm_system_wakeup();
406 		}
407 
408 		ret = IRQ_HANDLED;
409 	}
410 	spin_unlock(&suspended_lock);
411 
412 	return ret;
413 }
414 
415 static const struct at91_rtc_config at91rm9200_config = {
416 };
417 
418 static const struct at91_rtc_config at91sam9x5_config = {
419 	.use_shadow_imr	= true,
420 };
421 
422 static const struct at91_rtc_config sama5d4_config = {
423 	.has_correction = true,
424 };
425 
426 static const struct of_device_id at91_rtc_dt_ids[] = {
427 	{
428 		.compatible = "atmel,at91rm9200-rtc",
429 		.data = &at91rm9200_config,
430 	}, {
431 		.compatible = "atmel,at91sam9x5-rtc",
432 		.data = &at91sam9x5_config,
433 	}, {
434 		.compatible = "atmel,sama5d4-rtc",
435 		.data = &sama5d4_config,
436 	}, {
437 		.compatible = "atmel,sama5d2-rtc",
438 		.data = &sama5d4_config,
439 	}, {
440 		.compatible = "microchip,sam9x60-rtc",
441 		.data = &sama5d4_config,
442 	}, {
443 		/* sentinel */
444 	}
445 };
446 MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids);
447 
448 static const struct rtc_class_ops at91_rtc_ops = {
449 	.read_time	= at91_rtc_readtime,
450 	.set_time	= at91_rtc_settime,
451 	.read_alarm	= at91_rtc_readalarm,
452 	.set_alarm	= at91_rtc_setalarm,
453 	.alarm_irq_enable = at91_rtc_alarm_irq_enable,
454 };
455 
456 static const struct rtc_class_ops sama5d4_rtc_ops = {
457 	.read_time	= at91_rtc_readtime,
458 	.set_time	= at91_rtc_settime,
459 	.read_alarm	= at91_rtc_readalarm,
460 	.set_alarm	= at91_rtc_setalarm,
461 	.alarm_irq_enable = at91_rtc_alarm_irq_enable,
462 	.set_offset	= at91_rtc_setoffset,
463 	.read_offset	= at91_rtc_readoffset,
464 };
465 
466 /*
467  * Initialize and install RTC driver
468  */
at91_rtc_probe(struct platform_device * pdev)469 static int __init at91_rtc_probe(struct platform_device *pdev)
470 {
471 	struct rtc_device *rtc;
472 	struct resource *regs;
473 	int ret = 0;
474 
475 	at91_rtc_config = of_device_get_match_data(&pdev->dev);
476 	if (!at91_rtc_config)
477 		return -ENODEV;
478 
479 	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
480 	if (!regs) {
481 		dev_err(&pdev->dev, "no mmio resource defined\n");
482 		return -ENXIO;
483 	}
484 
485 	irq = platform_get_irq(pdev, 0);
486 	if (irq < 0)
487 		return -ENXIO;
488 
489 	at91_rtc_regs = devm_ioremap(&pdev->dev, regs->start,
490 				     resource_size(regs));
491 	if (!at91_rtc_regs) {
492 		dev_err(&pdev->dev, "failed to map registers, aborting.\n");
493 		return -ENOMEM;
494 	}
495 
496 	rtc = devm_rtc_allocate_device(&pdev->dev);
497 	if (IS_ERR(rtc))
498 		return PTR_ERR(rtc);
499 	platform_set_drvdata(pdev, rtc);
500 
501 	sclk = devm_clk_get(&pdev->dev, NULL);
502 	if (IS_ERR(sclk))
503 		return PTR_ERR(sclk);
504 
505 	ret = clk_prepare_enable(sclk);
506 	if (ret) {
507 		dev_err(&pdev->dev, "Could not enable slow clock\n");
508 		return ret;
509 	}
510 
511 	at91_rtc_write(AT91_RTC_CR, 0);
512 	at91_rtc_write(AT91_RTC_MR, at91_rtc_read(AT91_RTC_MR) & ~AT91_RTC_HRMOD);
513 
514 	/* Disable all interrupts */
515 	at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM |
516 					AT91_RTC_SECEV | AT91_RTC_TIMEV |
517 					AT91_RTC_CALEV);
518 
519 	ret = devm_request_irq(&pdev->dev, irq, at91_rtc_interrupt,
520 			       IRQF_SHARED | IRQF_COND_SUSPEND,
521 			       "at91_rtc", pdev);
522 	if (ret) {
523 		dev_err(&pdev->dev, "IRQ %d already in use.\n", irq);
524 		goto err_clk;
525 	}
526 
527 	/* cpu init code should really have flagged this device as
528 	 * being wake-capable; if it didn't, do that here.
529 	 */
530 	if (!device_can_wakeup(&pdev->dev))
531 		device_init_wakeup(&pdev->dev, 1);
532 
533 	if (at91_rtc_config->has_correction)
534 		rtc->ops = &sama5d4_rtc_ops;
535 	else
536 		rtc->ops = &at91_rtc_ops;
537 
538 	rtc->range_min = RTC_TIMESTAMP_BEGIN_1900;
539 	rtc->range_max = RTC_TIMESTAMP_END_2099;
540 	ret = devm_rtc_register_device(rtc);
541 	if (ret)
542 		goto err_clk;
543 
544 	/* enable SECEV interrupt in order to initialize at91_rtc_upd_rdy
545 	 * completion.
546 	 */
547 	at91_rtc_write_ier(AT91_RTC_SECEV);
548 
549 	dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n");
550 	return 0;
551 
552 err_clk:
553 	clk_disable_unprepare(sclk);
554 
555 	return ret;
556 }
557 
558 /*
559  * Disable and remove the RTC driver
560  */
at91_rtc_remove(struct platform_device * pdev)561 static void __exit at91_rtc_remove(struct platform_device *pdev)
562 {
563 	/* Disable all interrupts */
564 	at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM |
565 					AT91_RTC_SECEV | AT91_RTC_TIMEV |
566 					AT91_RTC_CALEV);
567 
568 	clk_disable_unprepare(sclk);
569 }
570 
at91_rtc_shutdown(struct platform_device * pdev)571 static void at91_rtc_shutdown(struct platform_device *pdev)
572 {
573 	/* Disable all interrupts */
574 	at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM |
575 					AT91_RTC_SECEV | AT91_RTC_TIMEV |
576 					AT91_RTC_CALEV);
577 }
578 
579 #ifdef CONFIG_PM_SLEEP
580 
581 /* AT91RM9200 RTC Power management control */
582 
at91_rtc_suspend(struct device * dev)583 static int at91_rtc_suspend(struct device *dev)
584 {
585 	/* this IRQ is shared with DBGU and other hardware which isn't
586 	 * necessarily doing PM like we are...
587 	 */
588 	at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
589 
590 	at91_rtc_imr = at91_rtc_read_imr()
591 			& (AT91_RTC_ALARM|AT91_RTC_SECEV);
592 	if (at91_rtc_imr) {
593 		if (device_may_wakeup(dev)) {
594 			unsigned long flags;
595 
596 			enable_irq_wake(irq);
597 
598 			spin_lock_irqsave(&suspended_lock, flags);
599 			suspended = true;
600 			spin_unlock_irqrestore(&suspended_lock, flags);
601 		} else {
602 			at91_rtc_write_idr(at91_rtc_imr);
603 		}
604 	}
605 	return 0;
606 }
607 
at91_rtc_resume(struct device * dev)608 static int at91_rtc_resume(struct device *dev)
609 {
610 	struct rtc_device *rtc = dev_get_drvdata(dev);
611 
612 	if (at91_rtc_imr) {
613 		if (device_may_wakeup(dev)) {
614 			unsigned long flags;
615 
616 			spin_lock_irqsave(&suspended_lock, flags);
617 
618 			if (cached_events) {
619 				rtc_update_irq(rtc, 1, cached_events);
620 				cached_events = 0;
621 			}
622 
623 			suspended = false;
624 			spin_unlock_irqrestore(&suspended_lock, flags);
625 
626 			disable_irq_wake(irq);
627 		}
628 		at91_rtc_write_ier(at91_rtc_imr);
629 	}
630 	return 0;
631 }
632 #endif
633 
634 static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume);
635 
636 /*
637  * at91_rtc_remove() lives in .exit.text. For drivers registered via
638  * module_platform_driver_probe() this is ok because they cannot get unbound at
639  * runtime. So mark the driver struct with __refdata to prevent modpost
640  * triggering a section mismatch warning.
641  */
642 static struct platform_driver at91_rtc_driver __refdata = {
643 	.remove_new	= __exit_p(at91_rtc_remove),
644 	.shutdown	= at91_rtc_shutdown,
645 	.driver		= {
646 		.name	= "at91_rtc",
647 		.pm	= &at91_rtc_pm_ops,
648 		.of_match_table = at91_rtc_dt_ids,
649 	},
650 };
651 
652 module_platform_driver_probe(at91_rtc_driver, at91_rtc_probe);
653 
654 MODULE_AUTHOR("Rick Bronson");
655 MODULE_DESCRIPTION("RTC driver for Atmel AT91RM9200");
656 MODULE_LICENSE("GPL");
657 MODULE_ALIAS("platform:at91_rtc");
658