1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef ARCH_X86_KVM_REVERSE_CPUID_H
3 #define ARCH_X86_KVM_REVERSE_CPUID_H
4
5 #include <uapi/asm/kvm.h>
6 #include <asm/cpufeature.h>
7 #include <asm/cpufeatures.h>
8
9 /*
10 * Define a KVM-only feature flag.
11 *
12 * For features that are scattered by cpufeatures.h, __feature_translate() also
13 * needs to be updated to translate the kernel-defined feature into the
14 * KVM-defined feature.
15 *
16 * For features that are 100% KVM-only, i.e. not defined by cpufeatures.h,
17 * forego the intermediate KVM_X86_FEATURE and directly define X86_FEATURE_* so
18 * that X86_FEATURE_* can be used in KVM. No __feature_translate() handling is
19 * needed in this case.
20 */
21 #define KVM_X86_FEATURE(w, f) ((w)*32 + (f))
22
23 /* Intel-defined SGX sub-features, CPUID level 0x12 (EAX). */
24 #define KVM_X86_FEATURE_SGX1 KVM_X86_FEATURE(CPUID_12_EAX, 0)
25 #define KVM_X86_FEATURE_SGX2 KVM_X86_FEATURE(CPUID_12_EAX, 1)
26 #define KVM_X86_FEATURE_SGX_EDECCSSA KVM_X86_FEATURE(CPUID_12_EAX, 11)
27
28 /* Intel-defined sub-features, CPUID level 0x00000007:1 (ECX) */
29 #define KVM_X86_FEATURE_MSR_IMM KVM_X86_FEATURE(CPUID_7_1_ECX, 5)
30
31 /* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */
32 #define X86_FEATURE_AVX_VNNI_INT8 KVM_X86_FEATURE(CPUID_7_1_EDX, 4)
33 #define X86_FEATURE_AVX_NE_CONVERT KVM_X86_FEATURE(CPUID_7_1_EDX, 5)
34 #define X86_FEATURE_AMX_COMPLEX KVM_X86_FEATURE(CPUID_7_1_EDX, 8)
35 #define X86_FEATURE_AVX_VNNI_INT16 KVM_X86_FEATURE(CPUID_7_1_EDX, 10)
36 #define X86_FEATURE_PREFETCHITI KVM_X86_FEATURE(CPUID_7_1_EDX, 14)
37 #define X86_FEATURE_AVX10 KVM_X86_FEATURE(CPUID_7_1_EDX, 19)
38
39 /* Intel-defined sub-features, CPUID level 0x00000007:2 (EDX) */
40 #define X86_FEATURE_INTEL_PSFD KVM_X86_FEATURE(CPUID_7_2_EDX, 0)
41 #define X86_FEATURE_IPRED_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 1)
42 #define KVM_X86_FEATURE_RRSBA_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 2)
43 #define X86_FEATURE_DDPD_U KVM_X86_FEATURE(CPUID_7_2_EDX, 3)
44 #define KVM_X86_FEATURE_BHI_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 4)
45 #define X86_FEATURE_MCDT_NO KVM_X86_FEATURE(CPUID_7_2_EDX, 5)
46
47 /* Intel-defined sub-features, CPUID level 0x00000024:0 (EBX) */
48 #define X86_FEATURE_AVX10_128 KVM_X86_FEATURE(CPUID_24_0_EBX, 16)
49 #define X86_FEATURE_AVX10_256 KVM_X86_FEATURE(CPUID_24_0_EBX, 17)
50 #define X86_FEATURE_AVX10_512 KVM_X86_FEATURE(CPUID_24_0_EBX, 18)
51
52 /* CPUID level 0x80000007 (EDX). */
53 #define KVM_X86_FEATURE_CONSTANT_TSC KVM_X86_FEATURE(CPUID_8000_0007_EDX, 8)
54
55 /* CPUID level 0x80000022 (EAX) */
56 #define KVM_X86_FEATURE_PERFMON_V2 KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0)
57
58 /* CPUID level 0x80000021 (ECX) */
59 #define KVM_X86_FEATURE_TSA_SQ_NO KVM_X86_FEATURE(CPUID_8000_0021_ECX, 1)
60 #define KVM_X86_FEATURE_TSA_L1_NO KVM_X86_FEATURE(CPUID_8000_0021_ECX, 2)
61
62 struct cpuid_reg {
63 u32 function;
64 u32 index;
65 int reg;
66 };
67
68 static const struct cpuid_reg reverse_cpuid[] = {
69 [CPUID_1_EDX] = { 1, 0, CPUID_EDX},
70 [CPUID_8000_0001_EDX] = {0x80000001, 0, CPUID_EDX},
71 [CPUID_8086_0001_EDX] = {0x80860001, 0, CPUID_EDX},
72 [CPUID_1_ECX] = { 1, 0, CPUID_ECX},
73 [CPUID_C000_0001_EDX] = {0xc0000001, 0, CPUID_EDX},
74 [CPUID_8000_0001_ECX] = {0x80000001, 0, CPUID_ECX},
75 [CPUID_7_0_EBX] = { 7, 0, CPUID_EBX},
76 [CPUID_D_1_EAX] = { 0xd, 1, CPUID_EAX},
77 [CPUID_8000_0008_EBX] = {0x80000008, 0, CPUID_EBX},
78 [CPUID_6_EAX] = { 6, 0, CPUID_EAX},
79 [CPUID_8000_000A_EDX] = {0x8000000a, 0, CPUID_EDX},
80 [CPUID_7_ECX] = { 7, 0, CPUID_ECX},
81 [CPUID_8000_0007_EBX] = {0x80000007, 0, CPUID_EBX},
82 [CPUID_7_EDX] = { 7, 0, CPUID_EDX},
83 [CPUID_7_1_EAX] = { 7, 1, CPUID_EAX},
84 [CPUID_12_EAX] = {0x00000012, 0, CPUID_EAX},
85 [CPUID_8000_001F_EAX] = {0x8000001f, 0, CPUID_EAX},
86 [CPUID_7_1_EDX] = { 7, 1, CPUID_EDX},
87 [CPUID_8000_0007_EDX] = {0x80000007, 0, CPUID_EDX},
88 [CPUID_8000_0021_EAX] = {0x80000021, 0, CPUID_EAX},
89 [CPUID_8000_0022_EAX] = {0x80000022, 0, CPUID_EAX},
90 [CPUID_7_2_EDX] = { 7, 2, CPUID_EDX},
91 [CPUID_24_0_EBX] = { 0x24, 0, CPUID_EBX},
92 [CPUID_8000_0021_ECX] = {0x80000021, 0, CPUID_ECX},
93 [CPUID_7_1_ECX] = { 7, 1, CPUID_ECX},
94 };
95
96 /*
97 * Reverse CPUID and its derivatives can only be used for hardware-defined
98 * feature words, i.e. words whose bits directly correspond to a CPUID leaf.
99 * Retrieving a feature bit or masking guest CPUID from a Linux-defined word
100 * is nonsensical as the bit number/mask is an arbitrary software-defined value
101 * and can't be used by KVM to query/control guest capabilities. And obviously
102 * the leaf being queried must have an entry in the lookup table.
103 */
reverse_cpuid_check(unsigned int x86_leaf)104 static __always_inline void reverse_cpuid_check(unsigned int x86_leaf)
105 {
106 BUILD_BUG_ON(NR_CPUID_WORDS != NCAPINTS);
107 BUILD_BUG_ON(x86_leaf == CPUID_LNX_1);
108 BUILD_BUG_ON(x86_leaf == CPUID_LNX_2);
109 BUILD_BUG_ON(x86_leaf == CPUID_LNX_3);
110 BUILD_BUG_ON(x86_leaf == CPUID_LNX_4);
111 BUILD_BUG_ON(x86_leaf == CPUID_LNX_5);
112 BUILD_BUG_ON(x86_leaf >= ARRAY_SIZE(reverse_cpuid));
113 BUILD_BUG_ON(reverse_cpuid[x86_leaf].function == 0);
114 }
115
116 /*
117 * Translate feature bits that are scattered in the kernel's cpufeatures word
118 * into KVM feature words that align with hardware's definitions.
119 */
__feature_translate(int x86_feature)120 static __always_inline u32 __feature_translate(int x86_feature)
121 {
122 #define KVM_X86_TRANSLATE_FEATURE(f) \
123 case X86_FEATURE_##f: return KVM_X86_FEATURE_##f
124
125 switch (x86_feature) {
126 KVM_X86_TRANSLATE_FEATURE(SGX1);
127 KVM_X86_TRANSLATE_FEATURE(SGX2);
128 KVM_X86_TRANSLATE_FEATURE(SGX_EDECCSSA);
129 KVM_X86_TRANSLATE_FEATURE(CONSTANT_TSC);
130 KVM_X86_TRANSLATE_FEATURE(PERFMON_V2);
131 KVM_X86_TRANSLATE_FEATURE(RRSBA_CTRL);
132 KVM_X86_TRANSLATE_FEATURE(BHI_CTRL);
133 KVM_X86_TRANSLATE_FEATURE(TSA_SQ_NO);
134 KVM_X86_TRANSLATE_FEATURE(TSA_L1_NO);
135 KVM_X86_TRANSLATE_FEATURE(MSR_IMM);
136 default:
137 return x86_feature;
138 }
139 }
140
__feature_leaf(int x86_feature)141 static __always_inline u32 __feature_leaf(int x86_feature)
142 {
143 u32 x86_leaf = __feature_translate(x86_feature) / 32;
144
145 reverse_cpuid_check(x86_leaf);
146 return x86_leaf;
147 }
148
149 /*
150 * Retrieve the bit mask from an X86_FEATURE_* definition. Features contain
151 * the hardware defined bit number (stored in bits 4:0) and a software defined
152 * "word" (stored in bits 31:5). The word is used to index into arrays of
153 * bit masks that hold the per-cpu feature capabilities, e.g. this_cpu_has().
154 */
__feature_bit(int x86_feature)155 static __always_inline u32 __feature_bit(int x86_feature)
156 {
157 x86_feature = __feature_translate(x86_feature);
158
159 reverse_cpuid_check(x86_feature / 32);
160 return 1 << (x86_feature & 31);
161 }
162
163 #define feature_bit(name) __feature_bit(X86_FEATURE_##name)
164
x86_feature_cpuid(unsigned int x86_feature)165 static __always_inline struct cpuid_reg x86_feature_cpuid(unsigned int x86_feature)
166 {
167 unsigned int x86_leaf = __feature_leaf(x86_feature);
168
169 return reverse_cpuid[x86_leaf];
170 }
171
__cpuid_entry_get_reg(struct kvm_cpuid_entry2 * entry,u32 reg)172 static __always_inline u32 *__cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry,
173 u32 reg)
174 {
175 switch (reg) {
176 case CPUID_EAX:
177 return &entry->eax;
178 case CPUID_EBX:
179 return &entry->ebx;
180 case CPUID_ECX:
181 return &entry->ecx;
182 case CPUID_EDX:
183 return &entry->edx;
184 default:
185 BUILD_BUG();
186 return NULL;
187 }
188 }
189
cpuid_entry_get_reg(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)190 static __always_inline u32 *cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry,
191 unsigned int x86_feature)
192 {
193 const struct cpuid_reg cpuid = x86_feature_cpuid(x86_feature);
194
195 return __cpuid_entry_get_reg(entry, cpuid.reg);
196 }
197
cpuid_entry_get(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)198 static __always_inline u32 cpuid_entry_get(struct kvm_cpuid_entry2 *entry,
199 unsigned int x86_feature)
200 {
201 u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
202
203 return *reg & __feature_bit(x86_feature);
204 }
205
cpuid_entry_has(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)206 static __always_inline bool cpuid_entry_has(struct kvm_cpuid_entry2 *entry,
207 unsigned int x86_feature)
208 {
209 return cpuid_entry_get(entry, x86_feature);
210 }
211
cpuid_entry_clear(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)212 static __always_inline void cpuid_entry_clear(struct kvm_cpuid_entry2 *entry,
213 unsigned int x86_feature)
214 {
215 u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
216
217 *reg &= ~__feature_bit(x86_feature);
218 }
219
cpuid_entry_set(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)220 static __always_inline void cpuid_entry_set(struct kvm_cpuid_entry2 *entry,
221 unsigned int x86_feature)
222 {
223 u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
224
225 *reg |= __feature_bit(x86_feature);
226 }
227
cpuid_entry_change(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature,bool set)228 static __always_inline void cpuid_entry_change(struct kvm_cpuid_entry2 *entry,
229 unsigned int x86_feature,
230 bool set)
231 {
232 u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
233
234 /*
235 * Open coded instead of using cpuid_entry_{clear,set}() to coerce the
236 * compiler into using CMOV instead of Jcc when possible.
237 */
238 if (set)
239 *reg |= __feature_bit(x86_feature);
240 else
241 *reg &= ~__feature_bit(x86_feature);
242 }
243
244 #endif /* ARCH_X86_KVM_REVERSE_CPUID_H */
245