1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 2 /* 3 * Copyright (c) 2018 BayLibre, SAS. 4 * Author: Jerome Brunet <jbrunet@baylibre.com> 5 */ 6 7 #ifndef _MESON_AIU_H 8 #define _MESON_AIU_H 9 10 #include "gx-formatter.h" 11 12 struct clk; 13 struct clk_bulk_data; 14 struct device; 15 struct of_phandle_args; 16 struct snd_soc_dai; 17 struct snd_soc_dai_ops; 18 19 enum aiu_clk_ids { 20 PCLK = 0, 21 AOCLK, 22 MCLK, 23 MIXER 24 }; 25 26 struct aiu_interface { 27 struct clk_bulk_data *clks; 28 unsigned int clk_num; 29 int irq; 30 struct gx_iface iface; 31 }; 32 33 struct aiu_platform_data { 34 bool has_acodec; 35 bool has_clk_ctrl_more_i2s_div; 36 }; 37 38 struct aiu { 39 struct clk *spdif_mclk; 40 struct aiu_interface i2s; 41 struct aiu_interface spdif; 42 const struct aiu_platform_data *platform; 43 }; 44 45 #define AIU_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ 46 SNDRV_PCM_FMTBIT_S20_LE | \ 47 SNDRV_PCM_FMTBIT_S24_LE) 48 49 int aiu_of_xlate_dai_name(struct snd_soc_component *component, 50 const struct of_phandle_args *args, 51 const char **dai_name, 52 unsigned int component_id); 53 54 int aiu_hdmi_ctrl_register_component(struct device *dev); 55 int aiu_acodec_ctrl_register_component(struct device *dev); 56 57 int aiu_fifo_i2s_dai_probe(struct snd_soc_dai *dai); 58 int aiu_fifo_spdif_dai_probe(struct snd_soc_dai *dai); 59 60 extern const struct snd_soc_dai_ops aiu_fifo_i2s_dai_ops; 61 extern const struct snd_soc_dai_ops aiu_fifo_spdif_dai_ops; 62 extern const struct snd_soc_dai_ops aiu_encoder_i2s_dai_ops; 63 extern const struct snd_soc_dai_ops aiu_encoder_spdif_dai_ops; 64 extern const struct gx_formatter_ops aiu_formatter_i2s_ops; 65 66 #define AIU_IEC958_BPF 0x000 67 #define AIU_958_MISC 0x010 68 #define AIU_IEC958_DCU_FF_CTRL 0x01c 69 #define AIU_958_CHSTAT_L0 0x020 70 #define AIU_958_CHSTAT_L1 0x024 71 #define AIU_958_CTRL 0x028 72 #define AIU_I2S_SOURCE_DESC 0x034 73 #define AIU_I2S_DAC_CFG 0x040 74 #define AIU_I2S_SYNC 0x044 75 #define AIU_I2S_MISC 0x048 76 #define AIU_RST_SOFT 0x054 77 #define AIU_CLK_CTRL 0x058 78 #define AIU_CLK_CTRL_MORE 0x064 79 #define AIU_CODEC_DAC_LRCLK_CTRL 0x0a0 80 #define AIU_HDMI_CLK_DATA_CTRL 0x0a8 81 #define AIU_ACODEC_CTRL 0x0b0 82 #define AIU_958_CHSTAT_R0 0x0c0 83 #define AIU_958_CHSTAT_R1 0x0c4 84 #define AIU_MEM_I2S_START 0x180 85 #define AIU_MEM_I2S_MASKS 0x18c 86 #define AIU_MEM_I2S_CONTROL 0x190 87 #define AIU_MEM_IEC958_START 0x194 88 #define AIU_MEM_IEC958_CONTROL 0x1a4 89 #define AIU_MEM_I2S_BUF_CNTL 0x1d8 90 #define AIU_MEM_IEC958_BUF_CNTL 0x1fc 91 92 #endif /* _MESON_AIU_H */ 93