1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3 * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
4 * Copyright (C) 2016-2017 Intel Deutschland GmbH
5 * Copyright (C) 2018-2024 Intel Corporation
6 */
7 #ifndef __IWL_CONFIG_H__
8 #define __IWL_CONFIG_H__
9
10 #include <linux/types.h>
11 #include <linux/netdevice.h>
12 #include <linux/ieee80211.h>
13 #include <linux/nl80211.h>
14 #include <linux/mod_devicetable.h>
15 #include "iwl-csr.h"
16 #include "iwl-drv.h"
17
18 enum iwl_device_family {
19 IWL_DEVICE_FAMILY_UNDEFINED,
20 IWL_DEVICE_FAMILY_1000,
21 IWL_DEVICE_FAMILY_100,
22 IWL_DEVICE_FAMILY_2000,
23 IWL_DEVICE_FAMILY_2030,
24 IWL_DEVICE_FAMILY_105,
25 IWL_DEVICE_FAMILY_135,
26 IWL_DEVICE_FAMILY_5000,
27 IWL_DEVICE_FAMILY_5150,
28 IWL_DEVICE_FAMILY_6000,
29 IWL_DEVICE_FAMILY_6000i,
30 IWL_DEVICE_FAMILY_6005,
31 IWL_DEVICE_FAMILY_6030,
32 IWL_DEVICE_FAMILY_6050,
33 IWL_DEVICE_FAMILY_6150,
34 IWL_DEVICE_FAMILY_7000,
35 IWL_DEVICE_FAMILY_8000,
36 IWL_DEVICE_FAMILY_9000,
37 IWL_DEVICE_FAMILY_22000,
38 IWL_DEVICE_FAMILY_AX210,
39 IWL_DEVICE_FAMILY_BZ,
40 IWL_DEVICE_FAMILY_SC,
41 IWL_DEVICE_FAMILY_DR,
42 };
43
44 /*
45 * LED mode
46 * IWL_LED_DEFAULT: use device default
47 * IWL_LED_RF_STATE: turn LED on/off based on RF state
48 * LED ON = RF ON
49 * LED OFF = RF OFF
50 * IWL_LED_BLINK: adjust led blink rate based on blink table
51 * IWL_LED_DISABLE: led disabled
52 */
53 enum iwl_led_mode {
54 IWL_LED_DEFAULT,
55 IWL_LED_RF_STATE,
56 IWL_LED_BLINK,
57 IWL_LED_DISABLE,
58 };
59
60 /**
61 * enum iwl_nvm_type - nvm formats
62 * @IWL_NVM: the regular format
63 * @IWL_NVM_EXT: extended NVM format
64 * @IWL_NVM_SDP: NVM format used by 3168 series
65 */
66 enum iwl_nvm_type {
67 IWL_NVM,
68 IWL_NVM_EXT,
69 IWL_NVM_SDP,
70 };
71
72 /*
73 * This is the threshold value of plcp error rate per 100mSecs. It is
74 * used to set and check for the validity of plcp_delta.
75 */
76 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN 1
77 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF 50
78 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF 100
79 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF 200
80 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX 255
81 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE 0
82
83 /* TX queue watchdog timeouts in mSecs */
84 #define IWL_WATCHDOG_DISABLED 0
85 #define IWL_DEF_WD_TIMEOUT 2500
86 #define IWL_LONG_WD_TIMEOUT 10000
87 #define IWL_MAX_WD_TIMEOUT 120000
88
89 #define IWL_DEFAULT_MAX_TX_POWER 22
90 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\
91 NETIF_F_TSO | NETIF_F_TSO6)
92 #define IWL_CSUM_NETIF_FLAGS_MASK (IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM)
93
94 /* Antenna presence definitions */
95 #define ANT_NONE 0x0
96 #define ANT_INVALID 0xff
97 #define ANT_A BIT(0)
98 #define ANT_B BIT(1)
99 #define ANT_C BIT(2)
100 #define ANT_AB (ANT_A | ANT_B)
101 #define ANT_AC (ANT_A | ANT_C)
102 #define ANT_BC (ANT_B | ANT_C)
103 #define ANT_ABC (ANT_A | ANT_B | ANT_C)
104
105
106 #define IWL_FW_AND_PNVM(pfx, api) \
107 MODULE_FIRMWARE(pfx "-" __stringify(api) ".ucode"); \
108 MODULE_FIRMWARE(pfx ".pnvm")
109
num_of_ant(u8 mask)110 static inline u8 num_of_ant(u8 mask)
111 {
112 return !!((mask) & ANT_A) +
113 !!((mask) & ANT_B) +
114 !!((mask) & ANT_C);
115 }
116
117 /**
118 * struct iwl_base_params - params not likely to change within a device family
119 * @max_ll_items: max number of OTP blocks
120 * @shadow_ram_support: shadow support for OTP memory
121 * @led_compensation: compensate on the led on/off time per HW according
122 * to the deviation to achieve the desired led frequency.
123 * The detail algorithm is described in iwl-led.c
124 * @wd_timeout: TX queues watchdog timeout
125 * @max_event_log_size: size of event log buffer size for ucode event logging
126 * @shadow_reg_enable: HW shadow register support
127 * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command
128 * is in flight. This is due to a HW bug in 7260, 3160 and 7265.
129 * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled.
130 * @max_tfd_queue_size: max number of entries in tfd queue.
131 */
132 struct iwl_base_params {
133 unsigned int wd_timeout;
134
135 u16 eeprom_size;
136 u16 max_event_log_size;
137
138 u8 pll_cfg:1, /* for iwl_pcie_apm_init() */
139 shadow_ram_support:1,
140 shadow_reg_enable:1,
141 pcie_l1_allowed:1,
142 apmg_wake_up_wa:1,
143 scd_chain_ext_wa:1;
144
145 u16 num_of_queues; /* def: HW dependent */
146 u32 max_tfd_queue_size; /* def: HW dependent */
147
148 u8 max_ll_items;
149 u8 led_compensation;
150 };
151
152 /*
153 * @stbc: support Tx STBC and 1*SS Rx STBC
154 * @ldpc: support Tx/Rx with LDPC
155 * @use_rts_for_aggregation: use rts/cts protection for HT traffic
156 * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40
157 */
158 struct iwl_ht_params {
159 u8 ht_greenfield_support:1,
160 stbc:1,
161 ldpc:1,
162 use_rts_for_aggregation:1;
163 u8 ht40_bands;
164 };
165
166 /*
167 * Tx-backoff threshold
168 * @temperature: The threshold in Celsius
169 * @backoff: The tx-backoff in uSec
170 */
171 struct iwl_tt_tx_backoff {
172 s32 temperature;
173 u32 backoff;
174 };
175
176 #define TT_TX_BACKOFF_SIZE 6
177
178 /**
179 * struct iwl_tt_params - thermal throttling parameters
180 * @ct_kill_entry: CT Kill entry threshold
181 * @ct_kill_exit: CT Kill exit threshold
182 * @ct_kill_duration: The time intervals (in uSec) in which the driver needs
183 * to checks whether to exit CT Kill.
184 * @dynamic_smps_entry: Dynamic SMPS entry threshold
185 * @dynamic_smps_exit: Dynamic SMPS exit threshold
186 * @tx_protection_entry: TX protection entry threshold
187 * @tx_protection_exit: TX protection exit threshold
188 * @tx_backoff: Array of thresholds for tx-backoff , in ascending order.
189 * @support_ct_kill: Support CT Kill?
190 * @support_dynamic_smps: Support dynamic SMPS?
191 * @support_tx_protection: Support tx protection?
192 * @support_tx_backoff: Support tx-backoff?
193 */
194 struct iwl_tt_params {
195 u32 ct_kill_entry;
196 u32 ct_kill_exit;
197 u32 ct_kill_duration;
198 u32 dynamic_smps_entry;
199 u32 dynamic_smps_exit;
200 u32 tx_protection_entry;
201 u32 tx_protection_exit;
202 struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE];
203 u8 support_ct_kill:1,
204 support_dynamic_smps:1,
205 support_tx_protection:1,
206 support_tx_backoff:1;
207 };
208
209 /*
210 * information on how to parse the EEPROM
211 */
212 #define EEPROM_REG_BAND_1_CHANNELS 0x08
213 #define EEPROM_REG_BAND_2_CHANNELS 0x26
214 #define EEPROM_REG_BAND_3_CHANNELS 0x42
215 #define EEPROM_REG_BAND_4_CHANNELS 0x5C
216 #define EEPROM_REG_BAND_5_CHANNELS 0x74
217 #define EEPROM_REG_BAND_24_HT40_CHANNELS 0x82
218 #define EEPROM_REG_BAND_52_HT40_CHANNELS 0x92
219 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS 0x80
220 #define EEPROM_REGULATORY_BAND_NO_HT40 0
221
222 /* lower blocks contain EEPROM image and calibration data */
223 #define OTP_LOW_IMAGE_SIZE_2K (2 * 512 * sizeof(u16)) /* 2 KB */
224 #define OTP_LOW_IMAGE_SIZE_16K (16 * 512 * sizeof(u16)) /* 16 KB */
225 #define OTP_LOW_IMAGE_SIZE_32K (32 * 512 * sizeof(u16)) /* 32 KB */
226
227 struct iwl_eeprom_params {
228 const u8 regulatory_bands[7];
229 bool enhanced_txpower;
230 };
231
232 /* Tx-backoff power threshold
233 * @pwr: The power limit in mw
234 * @backoff: The tx-backoff in uSec
235 */
236 struct iwl_pwr_tx_backoff {
237 u32 pwr;
238 u32 backoff;
239 };
240
241 enum iwl_cfg_trans_ltr_delay {
242 IWL_CFG_TRANS_LTR_DELAY_NONE = 0,
243 IWL_CFG_TRANS_LTR_DELAY_200US = 1,
244 IWL_CFG_TRANS_LTR_DELAY_2500US = 2,
245 IWL_CFG_TRANS_LTR_DELAY_1820US = 3,
246 };
247
248 /**
249 * struct iwl_cfg_trans_params - information needed to start the trans
250 *
251 * These values are specific to the device ID and do not change when
252 * multiple configs are used for a single device ID. They values are
253 * used, among other things, to boot the NIC so that the HW REV or
254 * RFID can be read before deciding the remaining parameters to use.
255 *
256 * @base_params: pointer to basic parameters
257 * @device_family: the device family
258 * @umac_prph_offset: offset to add to UMAC periphery address
259 * @xtal_latency: power up latency to get the xtal stabilized
260 * @extra_phy_cfg_flags: extra configuration flags to pass to the PHY
261 * @rf_id: need to read rf_id to determine the firmware image
262 * @gen2: 22000 and on transport operation
263 * @mq_rx_supported: multi-queue rx support
264 * @integrated: discrete or integrated
265 * @low_latency_xtal: use the low latency xtal if supported
266 * @bisr_workaround: BISR hardware workaround (for 22260 series devices)
267 * @ltr_delay: LTR delay parameter, &enum iwl_cfg_trans_ltr_delay.
268 * @imr_enabled: use the IMR if supported.
269 */
270 struct iwl_cfg_trans_params {
271 const struct iwl_base_params *base_params;
272 enum iwl_device_family device_family;
273 u32 umac_prph_offset;
274 u32 xtal_latency;
275 u32 extra_phy_cfg_flags;
276 u32 rf_id:1,
277 gen2:1,
278 mq_rx_supported:1,
279 integrated:1,
280 low_latency_xtal:1,
281 bisr_workaround:1,
282 ltr_delay:2,
283 imr_enabled:1;
284 };
285
286 /**
287 * struct iwl_fw_mon_reg - FW monitor register info
288 * @addr: register address
289 * @mask: register mask
290 */
291 struct iwl_fw_mon_reg {
292 u32 addr;
293 u32 mask;
294 };
295
296 /**
297 * struct iwl_fw_mon_regs - FW monitor registers
298 * @write_ptr: write pointer register
299 * @cycle_cnt: cycle count register
300 * @cur_frag: current fragment in use
301 */
302 struct iwl_fw_mon_regs {
303 struct iwl_fw_mon_reg write_ptr;
304 struct iwl_fw_mon_reg cycle_cnt;
305 struct iwl_fw_mon_reg cur_frag;
306 };
307
308 /**
309 * struct iwl_cfg
310 * @trans: the trans-specific configuration part
311 * @name: Official name of the device
312 * @fw_name_pre: Firmware filename prefix. The api version and extension
313 * (.ucode) will be added to filename before loading from disk. The
314 * filename is constructed as <fw_name_pre>-<api>.ucode.
315 * @fw_name_mac: MAC name for this config, the remaining pieces of the
316 * name will be generated dynamically
317 * @ucode_api_max: Highest version of uCode API supported by driver.
318 * @ucode_api_min: Lowest version of uCode API supported by driver.
319 * @max_inst_size: The maximal length of the fw inst section (only DVM)
320 * @max_data_size: The maximal length of the fw data section (only DVM)
321 * @valid_tx_ant: valid transmit antenna
322 * @valid_rx_ant: valid receive antenna
323 * @non_shared_ant: the antenna that is for WiFi only
324 * @nvm_ver: NVM version
325 * @nvm_calib_ver: NVM calibration version
326 * @ht_params: point to ht parameters
327 * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
328 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
329 * @tx_with_siso_diversity: 1x1 device with tx antenna diversity
330 * @internal_wimax_coex: internal wifi/wimax combo device
331 * @high_temp: Is this NIC is designated to be in high temperature.
332 * @host_interrupt_operation_mode: device needs host interrupt operation
333 * mode set
334 * @nvm_hw_section_num: the ID of the HW NVM section
335 * @mac_addr_from_csr: read HW address from CSR registers at this offset
336 * @features: hw features, any combination of feature_passlist
337 * @pwr_tx_backoffs: translation table between power limits and backoffs
338 * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response
339 * @dccm_offset: offset from which DCCM begins
340 * @dccm_len: length of DCCM (including runtime stack CCM)
341 * @dccm2_offset: offset from which the second DCCM begins
342 * @dccm2_len: length of the second DCCM
343 * @smem_offset: offset from which the SMEM begins
344 * @smem_len: the length of SMEM
345 * @vht_mu_mimo_supported: VHT MU-MIMO support
346 * @cdb: CDB support
347 * @nvm_type: see &enum iwl_nvm_type
348 * @d3_debug_data_base_addr: base address where D3 debug data is stored
349 * @d3_debug_data_length: length of the D3 debug data
350 * @min_txq_size: minimum number of slots required in a TX queue
351 * @uhb_supported: ultra high band channels supported
352 * @min_ba_txq_size: minimum number of slots required in a TX queue which
353 * based on hardware support (HE - 256, EHT - 1K).
354 * @num_rbds: number of receive buffer descriptors to use
355 * (only used for multi-queue capable devices)
356 *
357 * We enable the driver to be backward compatible wrt. hardware features.
358 * API differences in uCode shouldn't be handled here but through TLVs
359 * and/or the uCode API version instead.
360 */
361 struct iwl_cfg {
362 struct iwl_cfg_trans_params trans;
363 /* params specific to an individual device within a device family */
364 const char *name;
365 const char *fw_name_pre;
366 const char *fw_name_mac;
367 /* params likely to change within a device family */
368 const struct iwl_ht_params *ht_params;
369 const struct iwl_eeprom_params *eeprom_params;
370 const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
371 const char *default_nvm_file_C_step;
372 const struct iwl_tt_params *thermal_params;
373 enum iwl_led_mode led_mode;
374 enum iwl_nvm_type nvm_type;
375 u32 max_data_size;
376 u32 max_inst_size;
377 netdev_features_t features;
378 u32 dccm_offset;
379 u32 dccm_len;
380 u32 dccm2_offset;
381 u32 dccm2_len;
382 u32 smem_offset;
383 u32 smem_len;
384 u16 nvm_ver;
385 u16 nvm_calib_ver;
386 u32 rx_with_siso_diversity:1,
387 tx_with_siso_diversity:1,
388 internal_wimax_coex:1,
389 host_interrupt_operation_mode:1,
390 high_temp:1,
391 mac_addr_from_csr:10,
392 lp_xtal_workaround:1,
393 apmg_not_supported:1,
394 vht_mu_mimo_supported:1,
395 cdb:1,
396 dbgc_supported:1,
397 uhb_supported:1;
398 u8 valid_tx_ant;
399 u8 valid_rx_ant;
400 u8 non_shared_ant;
401 u8 nvm_hw_section_num;
402 u8 max_tx_agg_size;
403 u8 ucode_api_max;
404 u8 ucode_api_min;
405 u16 num_rbds;
406 u32 min_umac_error_event_table;
407 u32 d3_debug_data_base_addr;
408 u32 d3_debug_data_length;
409 u32 min_txq_size;
410 u32 gp2_reg_addr;
411 u32 min_ba_txq_size;
412 const struct iwl_fw_mon_regs mon_dram_regs;
413 const struct iwl_fw_mon_regs mon_smem_regs;
414 const struct iwl_fw_mon_regs mon_dbgi_regs;
415 };
416
417 #define IWL_CFG_ANY (~0)
418
419 #define IWL_CFG_MAC_TYPE_PU 0x31
420 #define IWL_CFG_MAC_TYPE_TH 0x32
421 #define IWL_CFG_MAC_TYPE_QU 0x33
422 #define IWL_CFG_MAC_TYPE_QUZ 0x35
423 #define IWL_CFG_MAC_TYPE_SO 0x37
424 #define IWL_CFG_MAC_TYPE_SOF 0x43
425 #define IWL_CFG_MAC_TYPE_MA 0x44
426 #define IWL_CFG_MAC_TYPE_BZ 0x46
427 #define IWL_CFG_MAC_TYPE_GL 0x47
428 #define IWL_CFG_MAC_TYPE_SC 0x48
429 #define IWL_CFG_MAC_TYPE_SC2 0x49
430 #define IWL_CFG_MAC_TYPE_SC2F 0x4A
431 #define IWL_CFG_MAC_TYPE_BZ_W 0x4B
432 #define IWL_CFG_MAC_TYPE_BR 0x4C
433 #define IWL_CFG_MAC_TYPE_DR 0x4D
434
435 #define IWL_CFG_RF_TYPE_TH 0x105
436 #define IWL_CFG_RF_TYPE_TH1 0x108
437 #define IWL_CFG_RF_TYPE_JF2 0x105
438 #define IWL_CFG_RF_TYPE_JF1 0x108
439 #define IWL_CFG_RF_TYPE_HR2 0x10A
440 #define IWL_CFG_RF_TYPE_HR1 0x10C
441 #define IWL_CFG_RF_TYPE_GF 0x10D
442 #define IWL_CFG_RF_TYPE_FM 0x112
443 #define IWL_CFG_RF_TYPE_WH 0x113
444 #define IWL_CFG_RF_TYPE_PE 0x114
445
446 #define IWL_CFG_RF_ID_TH 0x1
447 #define IWL_CFG_RF_ID_TH1 0x1
448 #define IWL_CFG_RF_ID_JF 0x3
449 #define IWL_CFG_RF_ID_JF1 0x6
450 #define IWL_CFG_RF_ID_JF1_DIV 0xA
451 #define IWL_CFG_RF_ID_HR 0x7
452 #define IWL_CFG_RF_ID_HR1 0x4
453
454 #define IWL_CFG_NO_160 0x1
455 #define IWL_CFG_160 0x0
456
457 #define IWL_CFG_NO_320 0x1
458 #define IWL_CFG_320 0x0
459
460 #define IWL_CFG_CORES_BT 0x0
461 #define IWL_CFG_CORES_BT_GNSS 0x5
462
463 #define IWL_CFG_NO_CDB 0x0
464 #define IWL_CFG_CDB 0x1
465
466 #define IWL_CFG_NO_JACKET 0x0
467 #define IWL_CFG_IS_JACKET 0x1
468
469 #define IWL_SUBDEVICE_RF_ID(subdevice) ((u16)((subdevice) & 0x00F0) >> 4)
470 #define IWL_SUBDEVICE_NO_160(subdevice) ((u16)((subdevice) & 0x0200) >> 9)
471 #define IWL_SUBDEVICE_CORES(subdevice) ((u16)((subdevice) & 0x1C00) >> 10)
472
473 struct iwl_dev_info {
474 u16 device;
475 u16 subdevice;
476 u16 mac_type;
477 u16 rf_type;
478 u8 mac_step;
479 u8 rf_step;
480 u8 rf_id;
481 u8 no_160;
482 u8 cores;
483 u8 cdb;
484 u8 jacket;
485 const struct iwl_cfg *cfg;
486 const char *name;
487 };
488
489 #if IS_ENABLED(CONFIG_IWLWIFI_KUNIT_TESTS)
490 extern const struct iwl_dev_info iwl_dev_info_table[];
491 extern const unsigned int iwl_dev_info_table_size;
492 const struct iwl_dev_info *
493 iwl_pci_find_dev_info(u16 device, u16 subsystem_device,
494 u16 mac_type, u8 mac_step, u16 rf_type, u8 cdb,
495 u8 jacket, u8 rf_id, u8 no_160, u8 cores, u8 rf_step);
496 extern const struct pci_device_id iwl_hw_card_ids[];
497 #endif
498
499 /*
500 * This list declares the config structures for all devices.
501 */
502 extern const struct iwl_cfg_trans_params iwl9000_trans_cfg;
503 extern const struct iwl_cfg_trans_params iwl9560_trans_cfg;
504 extern const struct iwl_cfg_trans_params iwl9560_long_latency_trans_cfg;
505 extern const struct iwl_cfg_trans_params iwl9560_shared_clk_trans_cfg;
506 extern const struct iwl_cfg_trans_params iwl_qu_trans_cfg;
507 extern const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg;
508 extern const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg;
509 extern const struct iwl_cfg_trans_params iwl_ax200_trans_cfg;
510 extern const struct iwl_cfg_trans_params iwl_so_trans_cfg;
511 extern const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg;
512 extern const struct iwl_cfg_trans_params iwl_so_long_latency_imr_trans_cfg;
513 extern const struct iwl_cfg_trans_params iwl_ma_trans_cfg;
514 extern const struct iwl_cfg_trans_params iwl_bz_trans_cfg;
515 extern const struct iwl_cfg_trans_params iwl_gl_trans_cfg;
516 extern const struct iwl_cfg_trans_params iwl_sc_trans_cfg;
517 extern const struct iwl_cfg_trans_params iwl_dr_trans_cfg;
518 extern const struct iwl_cfg_trans_params iwl_br_trans_cfg;
519 extern const char iwl9162_name[];
520 extern const char iwl9260_name[];
521 extern const char iwl9260_1_name[];
522 extern const char iwl9270_name[];
523 extern const char iwl9461_name[];
524 extern const char iwl9462_name[];
525 extern const char iwl9560_name[];
526 extern const char iwl9162_160_name[];
527 extern const char iwl9260_160_name[];
528 extern const char iwl9270_160_name[];
529 extern const char iwl9461_160_name[];
530 extern const char iwl9462_160_name[];
531 extern const char iwl9560_160_name[];
532 extern const char iwl9260_killer_1550_name[];
533 extern const char iwl9560_killer_1550i_name[];
534 extern const char iwl9560_killer_1550s_name[];
535 extern const char iwl_ax200_name[];
536 extern const char iwl_ax203_name[];
537 extern const char iwl_ax204_name[];
538 extern const char iwl_ax201_name[];
539 extern const char iwl_ax101_name[];
540 extern const char iwl_ax200_killer_1650w_name[];
541 extern const char iwl_ax200_killer_1650x_name[];
542 extern const char iwl_ax201_killer_1650s_name[];
543 extern const char iwl_ax201_killer_1650i_name[];
544 extern const char iwl_ax210_killer_1675w_name[];
545 extern const char iwl_ax210_killer_1675x_name[];
546 extern const char iwl9560_killer_1550i_160_name[];
547 extern const char iwl9560_killer_1550s_160_name[];
548 extern const char iwl_ax211_killer_1675s_name[];
549 extern const char iwl_ax211_killer_1675i_name[];
550 extern const char iwl_ax411_killer_1690s_name[];
551 extern const char iwl_ax411_killer_1690i_name[];
552 extern const char iwl_ax211_name[];
553 extern const char iwl_ax221_name[];
554 extern const char iwl_ax231_name[];
555 extern const char iwl_ax411_name[];
556 extern const char iwl_bz_name[];
557 extern const char iwl_fm_name[];
558 extern const char iwl_wh_name[];
559 extern const char iwl_gl_name[];
560 extern const char iwl_mtp_name[];
561 extern const char iwl_sc_name[];
562 extern const char iwl_sc2_name[];
563 extern const char iwl_sc2f_name[];
564 extern const char iwl_dr_name[];
565 extern const char iwl_br_name[];
566 #if IS_ENABLED(CONFIG_IWLDVM)
567 extern const struct iwl_cfg iwl5300_agn_cfg;
568 extern const struct iwl_cfg iwl5100_agn_cfg;
569 extern const struct iwl_cfg iwl5350_agn_cfg;
570 extern const struct iwl_cfg iwl5100_bgn_cfg;
571 extern const struct iwl_cfg iwl5100_abg_cfg;
572 extern const struct iwl_cfg iwl5150_agn_cfg;
573 extern const struct iwl_cfg iwl5150_abg_cfg;
574 extern const struct iwl_cfg iwl6005_2agn_cfg;
575 extern const struct iwl_cfg iwl6005_2abg_cfg;
576 extern const struct iwl_cfg iwl6005_2bg_cfg;
577 extern const struct iwl_cfg iwl6005_2agn_sff_cfg;
578 extern const struct iwl_cfg iwl6005_2agn_d_cfg;
579 extern const struct iwl_cfg iwl6005_2agn_mow1_cfg;
580 extern const struct iwl_cfg iwl6005_2agn_mow2_cfg;
581 extern const struct iwl_cfg iwl1030_bgn_cfg;
582 extern const struct iwl_cfg iwl1030_bg_cfg;
583 extern const struct iwl_cfg iwl6030_2agn_cfg;
584 extern const struct iwl_cfg iwl6030_2abg_cfg;
585 extern const struct iwl_cfg iwl6030_2bgn_cfg;
586 extern const struct iwl_cfg iwl6030_2bg_cfg;
587 extern const struct iwl_cfg iwl6000i_2agn_cfg;
588 extern const struct iwl_cfg iwl6000i_2abg_cfg;
589 extern const struct iwl_cfg iwl6000i_2bg_cfg;
590 extern const struct iwl_cfg iwl6000_3agn_cfg;
591 extern const struct iwl_cfg iwl6050_2agn_cfg;
592 extern const struct iwl_cfg iwl6050_2abg_cfg;
593 extern const struct iwl_cfg iwl6150_bgn_cfg;
594 extern const struct iwl_cfg iwl6150_bg_cfg;
595 extern const struct iwl_cfg iwl1000_bgn_cfg;
596 extern const struct iwl_cfg iwl1000_bg_cfg;
597 extern const struct iwl_cfg iwl100_bgn_cfg;
598 extern const struct iwl_cfg iwl100_bg_cfg;
599 extern const struct iwl_cfg iwl130_bgn_cfg;
600 extern const struct iwl_cfg iwl130_bg_cfg;
601 extern const struct iwl_cfg iwl2000_2bgn_cfg;
602 extern const struct iwl_cfg iwl2000_2bgn_d_cfg;
603 extern const struct iwl_cfg iwl2030_2bgn_cfg;
604 extern const struct iwl_cfg iwl6035_2agn_cfg;
605 extern const struct iwl_cfg iwl6035_2agn_sff_cfg;
606 extern const struct iwl_cfg iwl105_bgn_cfg;
607 extern const struct iwl_cfg iwl105_bgn_d_cfg;
608 extern const struct iwl_cfg iwl135_bgn_cfg;
609 #endif /* CONFIG_IWLDVM */
610 #if IS_ENABLED(CONFIG_IWLMVM)
611 extern const struct iwl_ht_params iwl_22000_ht_params;
612 extern const struct iwl_cfg iwl7260_2ac_cfg;
613 extern const struct iwl_cfg iwl7260_2ac_cfg_high_temp;
614 extern const struct iwl_cfg iwl7260_2n_cfg;
615 extern const struct iwl_cfg iwl7260_n_cfg;
616 extern const struct iwl_cfg iwl3160_2ac_cfg;
617 extern const struct iwl_cfg iwl3160_2n_cfg;
618 extern const struct iwl_cfg iwl3160_n_cfg;
619 extern const struct iwl_cfg iwl3165_2ac_cfg;
620 extern const struct iwl_cfg iwl3168_2ac_cfg;
621 extern const struct iwl_cfg iwl7265_2ac_cfg;
622 extern const struct iwl_cfg iwl7265_2n_cfg;
623 extern const struct iwl_cfg iwl7265_n_cfg;
624 extern const struct iwl_cfg iwl7265d_2ac_cfg;
625 extern const struct iwl_cfg iwl7265d_2n_cfg;
626 extern const struct iwl_cfg iwl7265d_n_cfg;
627 extern const struct iwl_cfg iwl8260_2n_cfg;
628 extern const struct iwl_cfg iwl8260_2ac_cfg;
629 extern const struct iwl_cfg iwl8265_2ac_cfg;
630 extern const struct iwl_cfg iwl8275_2ac_cfg;
631 extern const struct iwl_cfg iwl4165_2ac_cfg;
632 extern const struct iwl_cfg iwl9260_2ac_cfg;
633 extern const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg;
634 extern const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg;
635 extern const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg;
636 extern const struct iwl_cfg iwl9560_2ac_cfg_soc;
637 extern const struct iwl_cfg iwl_qu_b0_hr1_b0;
638 extern const struct iwl_cfg iwl_qu_c0_hr1_b0;
639 extern const struct iwl_cfg iwl_quz_a0_hr1_b0;
640 extern const struct iwl_cfg iwl_qu_b0_hr_b0;
641 extern const struct iwl_cfg iwl_qu_c0_hr_b0;
642 extern const struct iwl_cfg iwl_ax200_cfg_cc;
643 extern const struct iwl_cfg iwl_ax201_cfg_qu_hr;
644 extern const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0;
645 extern const struct iwl_cfg iwl_ax201_cfg_quz_hr;
646 extern const struct iwl_cfg iwl_ax1650i_cfg_quz_hr;
647 extern const struct iwl_cfg iwl_ax1650s_cfg_quz_hr;
648 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0;
649 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0;
650 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0;
651 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0;
652 extern const struct iwl_cfg killer1650x_2ax_cfg;
653 extern const struct iwl_cfg killer1650w_2ax_cfg;
654 extern const struct iwl_cfg iwlax210_2ax_cfg_so_jf_b0;
655 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0;
656 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long;
657 extern const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0;
658 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0;
659 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long;
660
661 extern const struct iwl_cfg iwl_cfg_ma;
662
663 extern const struct iwl_cfg iwl_cfg_so_a0_hr_a0;
664 extern const struct iwl_cfg iwl_cfg_quz_a0_hr_b0;
665
666 extern const struct iwl_cfg iwl_cfg_bz;
667 extern const struct iwl_cfg iwl_cfg_gl;
668
669 extern const struct iwl_cfg iwl_cfg_sc;
670 extern const struct iwl_cfg iwl_cfg_sc2;
671 extern const struct iwl_cfg iwl_cfg_sc2f;
672 extern const struct iwl_cfg iwl_cfg_dr;
673 extern const struct iwl_cfg iwl_cfg_br;
674 #endif /* CONFIG_IWLMVM */
675
676 #endif /* __IWL_CONFIG_H__ */
677