1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (C) 2013 Altera Corporation
4 * Based on gpio-mpc8xxx.c
5 */
6
7 #include <linux/bitops.h>
8 #include <linux/device.h>
9 #include <linux/err.h>
10 #include <linux/io.h>
11 #include <linux/irq.h>
12 #include <linux/module.h>
13 #include <linux/platform_device.h>
14 #include <linux/property.h>
15 #include <linux/spinlock.h>
16 #include <linux/types.h>
17
18 #include <linux/gpio/driver.h>
19 #include <linux/gpio/generic.h>
20
21 #define ALTERA_GPIO_MAX_NGPIO 32
22 #define ALTERA_GPIO_DATA 0x0
23 #define ALTERA_GPIO_DIR 0x4
24 #define ALTERA_GPIO_IRQ_MASK 0x8
25 #define ALTERA_GPIO_EDGE_CAP 0xc
26
27 /**
28 * struct altera_gpio_chip
29 * @chip : Generic GPIO chip structure.
30 * @regs : memory mapped IO address for the controller registers.
31 * @gpio_lock : synchronization lock so that new irq/set/get requests
32 * will be blocked until the current one completes.
33 * @interrupt_trigger : specifies the hardware configured IRQ trigger type
34 * (rising, falling, both, high)
35 */
36 struct altera_gpio_chip {
37 struct gpio_generic_chip chip;
38 void __iomem *regs;
39 raw_spinlock_t gpio_lock;
40 int interrupt_trigger;
41 };
42
altera_gpio_irq_unmask(struct irq_data * d)43 static void altera_gpio_irq_unmask(struct irq_data *d)
44 {
45 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
46 struct altera_gpio_chip *altera_gc = gpiochip_get_data(gc);
47 unsigned long flags;
48 u32 intmask;
49
50 gpiochip_enable_irq(gc, irqd_to_hwirq(d));
51
52 raw_spin_lock_irqsave(&altera_gc->gpio_lock, flags);
53 intmask = readl(altera_gc->regs + ALTERA_GPIO_IRQ_MASK);
54 /* Set ALTERA_GPIO_IRQ_MASK bit to unmask */
55 intmask |= BIT(irqd_to_hwirq(d));
56 writel(intmask, altera_gc->regs + ALTERA_GPIO_IRQ_MASK);
57 raw_spin_unlock_irqrestore(&altera_gc->gpio_lock, flags);
58 }
59
altera_gpio_irq_mask(struct irq_data * d)60 static void altera_gpio_irq_mask(struct irq_data *d)
61 {
62 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
63 struct altera_gpio_chip *altera_gc = gpiochip_get_data(gc);
64 unsigned long flags;
65 u32 intmask;
66
67 raw_spin_lock_irqsave(&altera_gc->gpio_lock, flags);
68 intmask = readl(altera_gc->regs + ALTERA_GPIO_IRQ_MASK);
69 /* Clear ALTERA_GPIO_IRQ_MASK bit to mask */
70 intmask &= ~BIT(irqd_to_hwirq(d));
71 writel(intmask, altera_gc->regs + ALTERA_GPIO_IRQ_MASK);
72 raw_spin_unlock_irqrestore(&altera_gc->gpio_lock, flags);
73
74 gpiochip_disable_irq(gc, irqd_to_hwirq(d));
75 }
76
77 /*
78 * This controller's IRQ type is synthesized in hardware, so this function
79 * just checks if the requested set_type matches the synthesized IRQ type
80 */
altera_gpio_irq_set_type(struct irq_data * d,unsigned int type)81 static int altera_gpio_irq_set_type(struct irq_data *d,
82 unsigned int type)
83 {
84 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
85 struct altera_gpio_chip *altera_gc = gpiochip_get_data(gc);
86
87 if (type == IRQ_TYPE_NONE) {
88 irq_set_handler_locked(d, handle_bad_irq);
89 return 0;
90 }
91 if (type == altera_gc->interrupt_trigger) {
92 if (type == IRQ_TYPE_LEVEL_HIGH)
93 irq_set_handler_locked(d, handle_level_irq);
94 else
95 irq_set_handler_locked(d, handle_simple_irq);
96 return 0;
97 }
98 irq_set_handler_locked(d, handle_bad_irq);
99 return -EINVAL;
100 }
101
altera_gpio_irq_startup(struct irq_data * d)102 static unsigned int altera_gpio_irq_startup(struct irq_data *d)
103 {
104 altera_gpio_irq_unmask(d);
105
106 return 0;
107 }
108
altera_gpio_irq_edge_handler(struct irq_desc * desc)109 static void altera_gpio_irq_edge_handler(struct irq_desc *desc)
110 {
111 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
112 struct altera_gpio_chip *altera_gc = gpiochip_get_data(gc);
113 struct irq_domain *irqdomain = gc->irq.domain;
114 struct irq_chip *chip;
115 unsigned long status;
116 int i;
117
118 chip = irq_desc_get_chip(desc);
119
120 chained_irq_enter(chip, desc);
121
122 while ((status =
123 (readl(altera_gc->regs + ALTERA_GPIO_EDGE_CAP) &
124 readl(altera_gc->regs + ALTERA_GPIO_IRQ_MASK)))) {
125 writel(status, altera_gc->regs + ALTERA_GPIO_EDGE_CAP);
126 for_each_set_bit(i, &status, gc->ngpio)
127 generic_handle_domain_irq(irqdomain, i);
128 }
129
130 chained_irq_exit(chip, desc);
131 }
132
altera_gpio_irq_leveL_high_handler(struct irq_desc * desc)133 static void altera_gpio_irq_leveL_high_handler(struct irq_desc *desc)
134 {
135 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
136 struct altera_gpio_chip *altera_gc = gpiochip_get_data(gc);
137 struct irq_domain *irqdomain = gc->irq.domain;
138 struct irq_chip *chip;
139 unsigned long status;
140 int i;
141
142 chip = irq_desc_get_chip(desc);
143
144 chained_irq_enter(chip, desc);
145
146 status = readl(altera_gc->regs + ALTERA_GPIO_DATA);
147 status &= readl(altera_gc->regs + ALTERA_GPIO_IRQ_MASK);
148
149 for_each_set_bit(i, &status, gc->ngpio)
150 generic_handle_domain_irq(irqdomain, i);
151
152 chained_irq_exit(chip, desc);
153 }
154
155 static const struct irq_chip altera_gpio_irq_chip = {
156 .name = "altera-gpio",
157 .irq_mask = altera_gpio_irq_mask,
158 .irq_unmask = altera_gpio_irq_unmask,
159 .irq_set_type = altera_gpio_irq_set_type,
160 .irq_startup = altera_gpio_irq_startup,
161 .irq_shutdown = altera_gpio_irq_mask,
162 .flags = IRQCHIP_IMMUTABLE,
163 GPIOCHIP_IRQ_RESOURCE_HELPERS,
164 };
165
altera_gpio_probe(struct platform_device * pdev)166 static int altera_gpio_probe(struct platform_device *pdev)
167 {
168 struct gpio_generic_chip_config config;
169 struct device *dev = &pdev->dev;
170 int reg, ret;
171 struct altera_gpio_chip *altera_gc;
172 struct gpio_generic_chip *chip;
173 struct gpio_chip *gc;
174 struct gpio_irq_chip *girq;
175 int mapped_irq;
176
177 altera_gc = devm_kzalloc(&pdev->dev, sizeof(*altera_gc), GFP_KERNEL);
178 if (!altera_gc)
179 return -ENOMEM;
180
181 raw_spin_lock_init(&altera_gc->gpio_lock);
182
183 altera_gc->regs = devm_platform_ioremap_resource(pdev, 0);
184 if (IS_ERR(altera_gc->regs))
185 return dev_err_probe(dev, PTR_ERR(altera_gc->regs),
186 "failed to ioremap memory resource\n");
187
188 chip = &altera_gc->chip;
189
190 config = (struct gpio_generic_chip_config) {
191 .dev = dev,
192 .sz = 4,
193 .dat = altera_gc->regs + ALTERA_GPIO_DATA,
194 .set = altera_gc->regs + ALTERA_GPIO_DATA,
195 .dirout = altera_gc->regs + ALTERA_GPIO_DIR,
196 };
197
198 ret = gpio_generic_chip_init(chip, &config);
199 if (ret)
200 return dev_err_probe(dev, ret, "unable to init generic GPIO\n");
201
202 gc = &chip->gc;
203
204 if (device_property_read_u32(dev, "altr,ngpio", ®))
205 /* By default assume maximum ngpio */
206 gc->ngpio = ALTERA_GPIO_MAX_NGPIO;
207 else
208 gc->ngpio = reg;
209
210 if (gc->ngpio > ALTERA_GPIO_MAX_NGPIO) {
211 dev_warn(&pdev->dev,
212 "ngpio is greater than %d, defaulting to %d\n",
213 ALTERA_GPIO_MAX_NGPIO, ALTERA_GPIO_MAX_NGPIO);
214 gc->ngpio = ALTERA_GPIO_MAX_NGPIO;
215 }
216
217 gc->base = -1;
218 gc->label = devm_kasprintf(dev, GFP_KERNEL, "%pfw", dev_fwnode(dev));
219 if (!gc->label)
220 return -ENOMEM;
221
222 mapped_irq = platform_get_irq_optional(pdev, 0);
223 if (mapped_irq < 0)
224 goto skip_irq;
225
226 if (device_property_read_u32(dev, "altr,interrupt-type", ®)) {
227 dev_err(&pdev->dev,
228 "altr,interrupt-type value not set in device tree\n");
229 return -EINVAL;
230 }
231 altera_gc->interrupt_trigger = reg;
232
233 girq = &gc->irq;
234 gpio_irq_chip_set_chip(girq, &altera_gpio_irq_chip);
235
236 if (altera_gc->interrupt_trigger == IRQ_TYPE_LEVEL_HIGH)
237 girq->parent_handler = altera_gpio_irq_leveL_high_handler;
238 else
239 girq->parent_handler = altera_gpio_irq_edge_handler;
240 girq->num_parents = 1;
241 girq->parents = devm_kcalloc(&pdev->dev, 1, sizeof(*girq->parents),
242 GFP_KERNEL);
243 if (!girq->parents)
244 return -ENOMEM;
245 girq->default_type = IRQ_TYPE_NONE;
246 girq->handler = handle_bad_irq;
247 girq->parents[0] = mapped_irq;
248
249 skip_irq:
250 ret = devm_gpiochip_add_data(dev, gc, altera_gc);
251 if (ret) {
252 dev_err(&pdev->dev, "Failed adding memory mapped gpiochip\n");
253 return ret;
254 }
255
256 return 0;
257 }
258
259 static const struct of_device_id altera_gpio_of_match[] = {
260 { .compatible = "altr,pio-1.0", },
261 {},
262 };
263 MODULE_DEVICE_TABLE(of, altera_gpio_of_match);
264
265 static struct platform_driver altera_gpio_driver = {
266 .driver = {
267 .name = "altera_gpio",
268 .of_match_table = altera_gpio_of_match,
269 },
270 .probe = altera_gpio_probe,
271 };
272
altera_gpio_init(void)273 static int __init altera_gpio_init(void)
274 {
275 return platform_driver_register(&altera_gpio_driver);
276 }
277 subsys_initcall(altera_gpio_init);
278
altera_gpio_exit(void)279 static void __exit altera_gpio_exit(void)
280 {
281 platform_driver_unregister(&altera_gpio_driver);
282 }
283 module_exit(altera_gpio_exit);
284
285 MODULE_AUTHOR("Tien Hock Loh <thloh@altera.com>");
286 MODULE_DESCRIPTION("Altera GPIO driver");
287 MODULE_LICENSE("GPL");
288