1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * AD7606 ADC driver 4 * 5 * Copyright 2011 Analog Devices Inc. 6 */ 7 8 #ifndef IIO_ADC_AD7606_H_ 9 #define IIO_ADC_AD7606_H_ 10 11 #define AD760X_MAX_CHANNELS 16 12 13 #define AD7616_CONFIGURATION_REGISTER 0x02 14 #define AD7616_OS_MASK GENMASK(4, 2) 15 #define AD7616_BURST_MODE BIT(6) 16 #define AD7616_SEQEN_MODE BIT(5) 17 #define AD7616_RANGE_CH_A_ADDR_OFF 0x04 18 #define AD7616_RANGE_CH_B_ADDR_OFF 0x06 19 /* 20 * Range of channels from a group are stored in 2 registers. 21 * 0, 1, 2, 3 in a register followed by 4, 5, 6, 7 in second register. 22 * For channels from second group(8-15) the order is the same, only with 23 * an offset of 2 for register address. 24 */ 25 #define AD7616_RANGE_CH_ADDR(ch) ((ch) >> 2) 26 /* The range of the channel is stored in 2 bits */ 27 #define AD7616_RANGE_CH_MSK(ch) (0b11 << (((ch) & 0b11) * 2)) 28 #define AD7616_RANGE_CH_MODE(ch, mode) ((mode) << ((((ch) & 0b11)) * 2)) 29 30 #define AD7606_CONFIGURATION_REGISTER 0x02 31 #define AD7606_SINGLE_DOUT 0x00 32 33 /* 34 * Range for AD7606B channels are stored in registers starting with address 0x3. 35 * Each register stores range for 2 channels(4 bits per channel). 36 */ 37 #define AD7606_RANGE_CH_MSK(ch) (GENMASK(3, 0) << (4 * ((ch) & 0x1))) 38 #define AD7606_RANGE_CH_MODE(ch, mode) \ 39 ((GENMASK(3, 0) & (mode)) << (4 * ((ch) & 0x1))) 40 #define AD7606_RANGE_CH_ADDR(ch) (0x03 + ((ch) >> 1)) 41 #define AD7606_OS_MODE 0x08 42 43 struct ad7606_state; 44 45 typedef int (*ad7606_scale_setup_cb_t)(struct iio_dev *indio_dev, 46 struct iio_chan_spec *chan); 47 typedef int (*ad7606_sw_setup_cb_t)(struct iio_dev *indio_dev); 48 49 /** 50 * struct ad7606_chip_info - chip specific information 51 * @max_samplerate: maximum supported sample rate 52 * @name: device name 53 * @bits: data width in bits 54 * @num_adc_channels: the number of physical voltage inputs 55 * @scale_setup_cb: callback to setup the scales for each channel 56 * @sw_setup_cb: callback to setup the software mode if available. 57 * @oversampling_avail: pointer to the array which stores the available 58 * oversampling ratios. 59 * @oversampling_num: number of elements stored in oversampling_avail array 60 * @os_req_reset: some devices require a reset to update oversampling 61 * @init_delay_ms: required delay in milliseconds for initialization 62 * after a restart 63 * @offload_storagebits: storage bits used by the offload hw implementation 64 */ 65 struct ad7606_chip_info { 66 unsigned int max_samplerate; 67 const char *name; 68 unsigned int bits; 69 unsigned int num_adc_channels; 70 ad7606_scale_setup_cb_t scale_setup_cb; 71 ad7606_sw_setup_cb_t sw_setup_cb; 72 const unsigned int *oversampling_avail; 73 unsigned int oversampling_num; 74 bool os_req_reset; 75 unsigned long init_delay_ms; 76 u8 offload_storagebits; 77 }; 78 79 /** 80 * struct ad7606_chan_scale - channel scale configuration 81 * @scale_avail: pointer to the array which stores the available scales 82 * @num_scales: number of elements stored in the scale_avail array 83 * @range: voltage range selection, selects which scale to apply 84 * @reg_offset: offset for the register value, to be applied when 85 * writing the value of 'range' to the register value 86 */ 87 struct ad7606_chan_scale { 88 #define AD760X_MAX_SCALES 16 89 const unsigned int (*scale_avail)[2]; 90 unsigned int num_scales; 91 unsigned int range; 92 unsigned int reg_offset; 93 }; 94 95 /** 96 * struct ad7606_state - driver instance specific data 97 * @dev: pointer to kernel device 98 * @chip_info: entry in the table of chips that describes this device 99 * @bops: bus operations (SPI or parallel) 100 * @chan_scales: scale configuration for channels 101 * @oversampling: oversampling selection 102 * @cnvst_pwm: pointer to the PWM device connected to the cnvst pin 103 * @base_address: address from where to read data in parallel operation 104 * @sw_mode_en: software mode enabled 105 * @oversampling_avail: pointer to the array which stores the available 106 * oversampling ratios. 107 * @num_os_ratios: number of elements stored in oversampling_avail array 108 * @back: pointer to the iio_backend structure, if used 109 * @write_scale: pointer to the function which writes the scale 110 * @write_os: pointer to the function which writes the os 111 * @lock: protect sensor state from concurrent accesses to GPIOs 112 * @gpio_convst: GPIO descriptor for conversion start signal (CONVST) 113 * @gpio_reset: GPIO descriptor for device hard-reset 114 * @gpio_range: GPIO descriptor for range selection 115 * @gpio_standby: GPIO descriptor for stand-by signal (STBY), 116 * controls power-down mode of device 117 * @gpio_frstdata: GPIO descriptor for reading from device when data 118 * is being read on the first channel 119 * @gpio_os: GPIO descriptors to control oversampling on the device 120 * @trig: The IIO trigger associated with the device. 121 * @completion: completion to indicate end of conversion 122 * @data: buffer for reading data from the device 123 * @offload_en: SPI offload enabled 124 * @bus_data: bus-specific variables 125 * @d16: be16 buffer for reading data from the device 126 */ 127 struct ad7606_state { 128 struct device *dev; 129 const struct ad7606_chip_info *chip_info; 130 const struct ad7606_bus_ops *bops; 131 struct ad7606_chan_scale chan_scales[AD760X_MAX_CHANNELS]; 132 unsigned int oversampling; 133 struct pwm_device *cnvst_pwm; 134 void __iomem *base_address; 135 bool sw_mode_en; 136 const unsigned int *oversampling_avail; 137 unsigned int num_os_ratios; 138 struct iio_backend *back; 139 int (*write_scale)(struct iio_dev *indio_dev, int ch, int val); 140 int (*write_os)(struct iio_dev *indio_dev, int val); 141 142 struct mutex lock; /* protect sensor state */ 143 struct gpio_desc *gpio_convst; 144 struct gpio_desc *gpio_reset; 145 struct gpio_desc *gpio_range; 146 struct gpio_desc *gpio_standby; 147 struct gpio_desc *gpio_frstdata; 148 struct gpio_descs *gpio_os; 149 struct iio_trigger *trig; 150 struct completion completion; 151 152 bool offload_en; 153 void *bus_data; 154 155 /* 156 * DMA (thus cache coherency maintenance) may require the 157 * transfer buffers to live in their own cache lines. 158 * 16 * 16-bit samples for AD7616 159 * 8 * 32-bit samples for AD7616C-18 (and similar) 160 */ 161 struct { 162 union { 163 u16 buf16[16]; 164 u32 buf32[8]; 165 }; 166 aligned_s64 timestamp; 167 } data __aligned(IIO_DMA_MINALIGN); 168 __be16 d16[2]; 169 }; 170 171 /** 172 * struct ad7606_bus_ops - driver bus operations 173 * @iio_backend_config: function pointer for configuring the iio_backend for 174 * the compatibles that use it 175 * @read_block: function pointer for reading blocks of data 176 * @sw_mode_config: pointer to a function which configured the device 177 * for software mode 178 * @offload_config: function pointer for configuring offload support, 179 * where any 180 * @reg_read: function pointer for reading spi register 181 * @reg_write: function pointer for writing spi register 182 * @update_scan_mode: function pointer for handling the calls to iio_info's 183 * update_scan mode when enabling/disabling channels. 184 * @rd_wr_cmd: pointer to the function which calculates the spi address 185 */ 186 struct ad7606_bus_ops { 187 /* more methods added in future? */ 188 int (*iio_backend_config)(struct device *dev, struct iio_dev *indio_dev); 189 int (*offload_config)(struct device *dev, struct iio_dev *indio_dev); 190 int (*read_block)(struct device *dev, int num, void *data); 191 int (*sw_mode_config)(struct iio_dev *indio_dev); 192 int (*reg_read)(struct ad7606_state *st, unsigned int addr); 193 int (*reg_write)(struct ad7606_state *st, 194 unsigned int addr, 195 unsigned int val); 196 int (*update_scan_mode)(struct iio_dev *indio_dev, const unsigned long *scan_mask); 197 u16 (*rd_wr_cmd)(int addr, char is_write_op); 198 }; 199 200 /** 201 * struct ad7606_bus_info - aggregate ad7606_chip_info and ad7606_bus_ops 202 * @chip_info: entry in the table of chips that describes this device 203 * @bops: bus operations (SPI or parallel) 204 */ 205 struct ad7606_bus_info { 206 const struct ad7606_chip_info *chip_info; 207 const struct ad7606_bus_ops *bops; 208 }; 209 210 int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, 211 const struct ad7606_chip_info *info, 212 const struct ad7606_bus_ops *bops); 213 214 int ad7606_reset(struct ad7606_state *st); 215 int ad7606_pwm_set_swing(struct ad7606_state *st); 216 int ad7606_pwm_set_low(struct ad7606_state *st); 217 218 extern const struct ad7606_chip_info ad7605_4_info; 219 extern const struct ad7606_chip_info ad7606_8_info; 220 extern const struct ad7606_chip_info ad7606_6_info; 221 extern const struct ad7606_chip_info ad7606_4_info; 222 extern const struct ad7606_chip_info ad7606b_info; 223 extern const struct ad7606_chip_info ad7606c_16_info; 224 extern const struct ad7606_chip_info ad7606c_18_info; 225 extern const struct ad7606_chip_info ad7607_info; 226 extern const struct ad7606_chip_info ad7608_info; 227 extern const struct ad7606_chip_info ad7609_info; 228 extern const struct ad7606_chip_info ad7616_info; 229 230 #ifdef CONFIG_PM_SLEEP 231 extern const struct dev_pm_ops ad7606_pm_ops; 232 #define AD7606_PM_OPS (&ad7606_pm_ops) 233 #else 234 #define AD7606_PM_OPS NULL 235 #endif 236 237 #endif /* IIO_ADC_AD7606_H_ */ 238