1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * AD5760, AD5780, AD5781, AD5790, AD5791 Voltage Output Digital to Analog
4 * Converter
5 *
6 * Copyright 2011 Analog Devices Inc.
7 */
8
9 #include <linux/bitops.h>
10 #include <linux/delay.h>
11 #include <linux/device.h>
12 #include <linux/fs.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/regulator/consumer.h>
17 #include <linux/slab.h>
18 #include <linux/spi/offload/consumer.h>
19 #include <linux/spi/spi.h>
20 #include <linux/sysfs.h>
21 #include <linux/units.h>
22
23 #include <linux/iio/buffer-dmaengine.h>
24 #include <linux/iio/dac/ad5791.h>
25 #include <linux/iio/iio.h>
26 #include <linux/iio/sysfs.h>
27
28 #define AD5791_DAC_MASK GENMASK(19, 0)
29
30 #define AD5791_CMD_READ BIT(23)
31 #define AD5791_CMD_WRITE 0
32 #define AD5791_ADDR(addr) ((addr) << 20)
33
34 /* Registers */
35 #define AD5791_ADDR_NOOP 0
36 #define AD5791_ADDR_DAC0 1
37 #define AD5791_ADDR_CTRL 2
38 #define AD5791_ADDR_CLRCODE 3
39 #define AD5791_ADDR_SW_CTRL 4
40
41 /* Control Register */
42 #define AD5791_CTRL_RBUF BIT(1)
43 #define AD5791_CTRL_OPGND BIT(2)
44 #define AD5791_CTRL_DACTRI BIT(3)
45 #define AD5791_CTRL_BIN2SC BIT(4)
46 #define AD5791_CTRL_SDODIS BIT(5)
47 #define AD5761_CTRL_LINCOMP(x) ((x) << 6)
48
49 #define AD5791_LINCOMP_0_10 0
50 #define AD5791_LINCOMP_10_12 1
51 #define AD5791_LINCOMP_12_16 2
52 #define AD5791_LINCOMP_16_19 3
53 #define AD5791_LINCOMP_19_20 12
54
55 #define AD5780_LINCOMP_0_10 0
56 #define AD5780_LINCOMP_10_20 12
57
58 /* Software Control Register */
59 #define AD5791_SWCTRL_LDAC BIT(0)
60 #define AD5791_SWCTRL_CLR BIT(1)
61 #define AD5791_SWCTRL_RESET BIT(2)
62
63 #define AD5791_DAC_PWRDN_6K 0
64 #define AD5791_DAC_PWRDN_3STATE 1
65
66 /**
67 * struct ad5791_chip_info - chip specific information
68 * @name: name of the dac chip
69 * @channel: channel specification
70 * @channel_offload: channel specification for offload
71 * @get_lin_comp: function pointer to the device specific function
72 */
73 struct ad5791_chip_info {
74 const char *name;
75 const struct iio_chan_spec channel;
76 const struct iio_chan_spec channel_offload;
77 int (*get_lin_comp)(unsigned int span);
78 };
79
80 /**
81 * struct ad5791_state - driver instance specific data
82 * @spi: spi_device
83 * @reg_vdd: positive supply regulator
84 * @reg_vss: negative supply regulator
85 * @gpio_reset: reset gpio
86 * @gpio_clear: clear gpio
87 * @gpio_ldac: load dac gpio
88 * @chip_info: chip model specific constants
89 * @offload_msg: spi message used for offload
90 * @offload_xfer: spi transfer used for offload
91 * @offload: offload device
92 * @offload_trigger: offload trigger
93 * @offload_trigger_hz: offload sample rate
94 * @vref_mv: actual reference voltage used
95 * @vref_neg_mv: voltage of the negative supply
96 * @ctrl: control register cache
97 * @pwr_down_mode: current power down mode
98 * @pwr_down: true if device is powered down
99 * @data: spi transfer buffers
100 */
101 struct ad5791_state {
102 struct spi_device *spi;
103 struct regulator *reg_vdd;
104 struct regulator *reg_vss;
105 struct gpio_desc *gpio_reset;
106 struct gpio_desc *gpio_clear;
107 struct gpio_desc *gpio_ldac;
108 const struct ad5791_chip_info *chip_info;
109 struct spi_message offload_msg;
110 struct spi_transfer offload_xfer;
111 struct spi_offload *offload;
112 struct spi_offload_trigger *offload_trigger;
113 unsigned int offload_trigger_hz;
114 unsigned short vref_mv;
115 unsigned int vref_neg_mv;
116 unsigned ctrl;
117 unsigned pwr_down_mode;
118 bool pwr_down;
119
120 union {
121 __be32 d32;
122 u8 d8[4];
123 } data[3] __aligned(IIO_DMA_MINALIGN);
124 };
125
ad5791_spi_write(struct ad5791_state * st,u8 addr,u32 val)126 static int ad5791_spi_write(struct ad5791_state *st, u8 addr, u32 val)
127 {
128 st->data[0].d32 = cpu_to_be32(AD5791_CMD_WRITE |
129 AD5791_ADDR(addr) |
130 (val & AD5791_DAC_MASK));
131
132 return spi_write(st->spi, &st->data[0].d8[1], 3);
133 }
134
ad5791_spi_read(struct ad5791_state * st,u8 addr,u32 * val)135 static int ad5791_spi_read(struct ad5791_state *st, u8 addr, u32 *val)
136 {
137 int ret;
138 struct spi_transfer xfers[] = {
139 {
140 .tx_buf = &st->data[0].d8[1],
141 .len = 3,
142 .cs_change = 1,
143 }, {
144 .tx_buf = &st->data[1].d8[1],
145 .rx_buf = &st->data[2].d8[1],
146 .len = 3,
147 },
148 };
149
150 st->data[0].d32 = cpu_to_be32(AD5791_CMD_READ |
151 AD5791_ADDR(addr));
152 st->data[1].d32 = cpu_to_be32(AD5791_ADDR(AD5791_ADDR_NOOP));
153
154 ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
155
156 *val = be32_to_cpu(st->data[2].d32);
157
158 return ret;
159 }
160
161 static const char * const ad5791_powerdown_modes[] = {
162 "6kohm_to_gnd",
163 "three_state",
164 };
165
ad5791_get_powerdown_mode(struct iio_dev * indio_dev,const struct iio_chan_spec * chan)166 static int ad5791_get_powerdown_mode(struct iio_dev *indio_dev,
167 const struct iio_chan_spec *chan)
168 {
169 struct ad5791_state *st = iio_priv(indio_dev);
170
171 return st->pwr_down_mode;
172 }
173
ad5791_set_powerdown_mode(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,unsigned int mode)174 static int ad5791_set_powerdown_mode(struct iio_dev *indio_dev,
175 const struct iio_chan_spec *chan, unsigned int mode)
176 {
177 struct ad5791_state *st = iio_priv(indio_dev);
178
179 st->pwr_down_mode = mode;
180
181 return 0;
182 }
183
184 static const struct iio_enum ad5791_powerdown_mode_enum = {
185 .items = ad5791_powerdown_modes,
186 .num_items = ARRAY_SIZE(ad5791_powerdown_modes),
187 .get = ad5791_get_powerdown_mode,
188 .set = ad5791_set_powerdown_mode,
189 };
190
ad5791_read_dac_powerdown(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,char * buf)191 static ssize_t ad5791_read_dac_powerdown(struct iio_dev *indio_dev,
192 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
193 {
194 struct ad5791_state *st = iio_priv(indio_dev);
195
196 return sysfs_emit(buf, "%d\n", st->pwr_down);
197 }
198
ad5791_write_dac_powerdown(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,const char * buf,size_t len)199 static ssize_t ad5791_write_dac_powerdown(struct iio_dev *indio_dev,
200 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
201 size_t len)
202 {
203 bool pwr_down;
204 int ret;
205 struct ad5791_state *st = iio_priv(indio_dev);
206
207 ret = kstrtobool(buf, &pwr_down);
208 if (ret)
209 return ret;
210
211 if (!pwr_down) {
212 st->ctrl &= ~(AD5791_CTRL_OPGND | AD5791_CTRL_DACTRI);
213 } else {
214 if (st->pwr_down_mode == AD5791_DAC_PWRDN_6K)
215 st->ctrl |= AD5791_CTRL_OPGND;
216 else if (st->pwr_down_mode == AD5791_DAC_PWRDN_3STATE)
217 st->ctrl |= AD5791_CTRL_DACTRI;
218 }
219 st->pwr_down = pwr_down;
220
221 ret = ad5791_spi_write(st, AD5791_ADDR_CTRL, st->ctrl);
222
223 return ret ? ret : len;
224 }
225
ad5791_get_lin_comp(unsigned int span)226 static int ad5791_get_lin_comp(unsigned int span)
227 {
228 if (span <= 10000)
229 return AD5791_LINCOMP_0_10;
230 else if (span <= 12000)
231 return AD5791_LINCOMP_10_12;
232 else if (span <= 16000)
233 return AD5791_LINCOMP_12_16;
234 else if (span <= 19000)
235 return AD5791_LINCOMP_16_19;
236 else
237 return AD5791_LINCOMP_19_20;
238 }
239
ad5780_get_lin_comp(unsigned int span)240 static int ad5780_get_lin_comp(unsigned int span)
241 {
242 if (span <= 10000)
243 return AD5780_LINCOMP_0_10;
244 else
245 return AD5780_LINCOMP_10_20;
246 }
247
ad5791_set_sample_freq(struct ad5791_state * st,int val)248 static int ad5791_set_sample_freq(struct ad5791_state *st, int val)
249 {
250 struct spi_offload_trigger_config config = {
251 .type = SPI_OFFLOAD_TRIGGER_PERIODIC,
252 .periodic = {
253 .frequency_hz = val,
254 },
255 };
256 int ret;
257
258 ret = spi_offload_trigger_validate(st->offload_trigger, &config);
259 if (ret)
260 return ret;
261
262 st->offload_trigger_hz = config.periodic.frequency_hz;
263
264 return 0;
265 }
266
ad5791_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)267 static int ad5791_read_raw(struct iio_dev *indio_dev,
268 struct iio_chan_spec const *chan,
269 int *val,
270 int *val2,
271 long m)
272 {
273 struct ad5791_state *st = iio_priv(indio_dev);
274 u64 val64;
275 int ret;
276
277 switch (m) {
278 case IIO_CHAN_INFO_RAW:
279 ret = ad5791_spi_read(st, chan->address, val);
280 if (ret)
281 return ret;
282 *val &= AD5791_DAC_MASK;
283 *val >>= chan->scan_type.shift;
284 return IIO_VAL_INT;
285 case IIO_CHAN_INFO_SCALE:
286 *val = st->vref_mv;
287 *val2 = (1 << chan->scan_type.realbits) - 1;
288 return IIO_VAL_FRACTIONAL;
289 case IIO_CHAN_INFO_OFFSET:
290 val64 = (((u64)st->vref_neg_mv) << chan->scan_type.realbits);
291 do_div(val64, st->vref_mv);
292 *val = -val64;
293 return IIO_VAL_INT;
294 case IIO_CHAN_INFO_SAMP_FREQ:
295 *val = st->offload_trigger_hz;
296 return IIO_VAL_INT;
297 default:
298 return -EINVAL;
299 }
300
301 };
302
303 static const struct iio_chan_spec_ext_info ad5791_ext_info[] = {
304 {
305 .name = "powerdown",
306 .shared = IIO_SHARED_BY_TYPE,
307 .read = ad5791_read_dac_powerdown,
308 .write = ad5791_write_dac_powerdown,
309 },
310 IIO_ENUM("powerdown_mode", IIO_SHARED_BY_TYPE,
311 &ad5791_powerdown_mode_enum),
312 IIO_ENUM_AVAILABLE("powerdown_mode", IIO_SHARED_BY_TYPE, &ad5791_powerdown_mode_enum),
313 { }
314 };
315
316 #define AD5791_DEFINE_CHIP_INFO(_name, bits, _shift, _lin_comp) \
317 static const struct ad5791_chip_info _name##_chip_info = { \
318 .name = #_name, \
319 .get_lin_comp = &(_lin_comp), \
320 .channel = { \
321 .type = IIO_VOLTAGE, \
322 .output = 1, \
323 .indexed = 1, \
324 .address = AD5791_ADDR_DAC0, \
325 .channel = 0, \
326 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
327 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
328 BIT(IIO_CHAN_INFO_OFFSET), \
329 .scan_type = { \
330 .sign = 'u', \
331 .realbits = (bits), \
332 .storagebits = 32, \
333 .shift = (_shift), \
334 }, \
335 .ext_info = ad5791_ext_info, \
336 }, \
337 .channel_offload = { \
338 .type = IIO_VOLTAGE, \
339 .output = 1, \
340 .indexed = 1, \
341 .address = AD5791_ADDR_DAC0, \
342 .channel = 0, \
343 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
344 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
345 BIT(IIO_CHAN_INFO_OFFSET), \
346 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\
347 .scan_type = { \
348 .sign = 'u', \
349 .realbits = (bits), \
350 .storagebits = 32, \
351 .shift = (_shift), \
352 }, \
353 .ext_info = ad5791_ext_info, \
354 }, \
355 }
356
357 AD5791_DEFINE_CHIP_INFO(ad5760, 16, 4, ad5780_get_lin_comp);
358 AD5791_DEFINE_CHIP_INFO(ad5780, 18, 2, ad5780_get_lin_comp);
359 AD5791_DEFINE_CHIP_INFO(ad5781, 18, 2, ad5791_get_lin_comp);
360 AD5791_DEFINE_CHIP_INFO(ad5790, 20, 0, ad5791_get_lin_comp);
361 AD5791_DEFINE_CHIP_INFO(ad5791, 20, 0, ad5791_get_lin_comp);
362
ad5791_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)363 static int ad5791_write_raw(struct iio_dev *indio_dev,
364 struct iio_chan_spec const *chan,
365 int val,
366 int val2,
367 long mask)
368 {
369 struct ad5791_state *st = iio_priv(indio_dev);
370
371 switch (mask) {
372 case IIO_CHAN_INFO_RAW:
373 val &= GENMASK(chan->scan_type.realbits - 1, 0);
374 val <<= chan->scan_type.shift;
375
376 return ad5791_spi_write(st, chan->address, val);
377
378 case IIO_CHAN_INFO_SAMP_FREQ:
379 if (val < 1)
380 return -EINVAL;
381 return ad5791_set_sample_freq(st, val);
382 default:
383 return -EINVAL;
384 }
385 }
386
ad5791_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)387 static int ad5791_write_raw_get_fmt(struct iio_dev *indio_dev,
388 struct iio_chan_spec const *chan,
389 long mask)
390 {
391 switch (mask) {
392 case IIO_CHAN_INFO_SAMP_FREQ:
393 return IIO_VAL_INT;
394 default:
395 return IIO_VAL_INT_PLUS_MICRO;
396 }
397 }
398
ad5791_buffer_preenable(struct iio_dev * indio_dev)399 static int ad5791_buffer_preenable(struct iio_dev *indio_dev)
400 {
401 struct ad5791_state *st = iio_priv(indio_dev);
402 struct spi_offload_trigger_config config = {
403 .type = SPI_OFFLOAD_TRIGGER_PERIODIC,
404 .periodic = {
405 .frequency_hz = st->offload_trigger_hz,
406 },
407 };
408
409 if (st->pwr_down)
410 return -EINVAL;
411
412 return spi_offload_trigger_enable(st->offload, st->offload_trigger,
413 &config);
414 }
415
ad5791_buffer_postdisable(struct iio_dev * indio_dev)416 static int ad5791_buffer_postdisable(struct iio_dev *indio_dev)
417 {
418 struct ad5791_state *st = iio_priv(indio_dev);
419
420 spi_offload_trigger_disable(st->offload, st->offload_trigger);
421
422 return 0;
423 }
424
425 static const struct iio_buffer_setup_ops ad5791_buffer_setup_ops = {
426 .preenable = &ad5791_buffer_preenable,
427 .postdisable = &ad5791_buffer_postdisable,
428 };
429
ad5791_offload_setup(struct iio_dev * indio_dev)430 static int ad5791_offload_setup(struct iio_dev *indio_dev)
431 {
432 struct ad5791_state *st = iio_priv(indio_dev);
433 struct spi_device *spi = st->spi;
434 struct dma_chan *tx_dma;
435 int ret;
436
437 st->offload_trigger = devm_spi_offload_trigger_get(&spi->dev,
438 st->offload, SPI_OFFLOAD_TRIGGER_PERIODIC);
439 if (IS_ERR(st->offload_trigger))
440 return dev_err_probe(&spi->dev, PTR_ERR(st->offload_trigger),
441 "failed to get offload trigger\n");
442
443 ret = ad5791_set_sample_freq(st, 1 * MEGA);
444 if (ret)
445 return dev_err_probe(&spi->dev, ret,
446 "failed to init sample rate\n");
447
448 tx_dma = devm_spi_offload_tx_stream_request_dma_chan(&spi->dev,
449 st->offload);
450 if (IS_ERR(tx_dma))
451 return dev_err_probe(&spi->dev, PTR_ERR(tx_dma),
452 "failed to get offload TX DMA\n");
453
454 ret = devm_iio_dmaengine_buffer_setup_with_handle(&spi->dev,
455 indio_dev, tx_dma, IIO_BUFFER_DIRECTION_OUT);
456 if (ret)
457 return ret;
458
459 st->offload_xfer.len = 4;
460 st->offload_xfer.bits_per_word = 24;
461 st->offload_xfer.offload_flags = SPI_OFFLOAD_XFER_TX_STREAM;
462
463 spi_message_init_with_transfers(&st->offload_msg, &st->offload_xfer, 1);
464 st->offload_msg.offload = st->offload;
465
466 return devm_spi_optimize_message(&spi->dev, st->spi, &st->offload_msg);
467 }
468
469 static const struct iio_info ad5791_info = {
470 .read_raw = &ad5791_read_raw,
471 .write_raw = &ad5791_write_raw,
472 .write_raw_get_fmt = &ad5791_write_raw_get_fmt,
473 };
474
475 static const struct spi_offload_config ad5791_offload_config = {
476 .capability_flags = SPI_OFFLOAD_CAP_TRIGGER |
477 SPI_OFFLOAD_CAP_TX_STREAM_DMA,
478 };
479
ad5791_probe(struct spi_device * spi)480 static int ad5791_probe(struct spi_device *spi)
481 {
482 const struct ad5791_platform_data *pdata = dev_get_platdata(&spi->dev);
483 struct iio_dev *indio_dev;
484 struct ad5791_state *st;
485 int ret, pos_voltage_uv = 0, neg_voltage_uv = 0;
486 bool use_rbuf_gain2;
487
488 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
489 if (!indio_dev)
490 return -ENOMEM;
491 st = iio_priv(indio_dev);
492
493 st->gpio_reset = devm_gpiod_get_optional(&spi->dev, "reset",
494 GPIOD_OUT_HIGH);
495 if (IS_ERR(st->gpio_reset))
496 return PTR_ERR(st->gpio_reset);
497
498 st->gpio_clear = devm_gpiod_get_optional(&spi->dev, "clear",
499 GPIOD_OUT_LOW);
500 if (IS_ERR(st->gpio_clear))
501 return PTR_ERR(st->gpio_clear);
502
503 st->gpio_ldac = devm_gpiod_get_optional(&spi->dev, "ldac",
504 GPIOD_OUT_HIGH);
505 if (IS_ERR(st->gpio_ldac))
506 return PTR_ERR(st->gpio_ldac);
507
508 st->pwr_down = true;
509 st->spi = spi;
510
511 if (pdata)
512 use_rbuf_gain2 = pdata->use_rbuf_gain2;
513 else
514 use_rbuf_gain2 = device_property_read_bool(&spi->dev,
515 "adi,rbuf-gain2-en");
516
517 pos_voltage_uv = devm_regulator_get_enable_read_voltage(&spi->dev, "vdd");
518 if (pos_voltage_uv < 0 && pos_voltage_uv != -ENODEV)
519 return dev_err_probe(&spi->dev, pos_voltage_uv,
520 "failed to get vdd voltage\n");
521
522 neg_voltage_uv = devm_regulator_get_enable_read_voltage(&spi->dev, "vss");
523 if (neg_voltage_uv < 0 && neg_voltage_uv != -ENODEV)
524 return dev_err_probe(&spi->dev, neg_voltage_uv,
525 "failed to get vss voltage\n");
526
527 if (neg_voltage_uv >= 0 && pos_voltage_uv >= 0) {
528 st->vref_mv = (pos_voltage_uv + neg_voltage_uv) / 1000;
529 st->vref_neg_mv = neg_voltage_uv / 1000;
530 } else if (pdata) {
531 st->vref_mv = pdata->vref_pos_mv + pdata->vref_neg_mv;
532 st->vref_neg_mv = pdata->vref_neg_mv;
533 } else {
534 dev_warn(&spi->dev, "reference voltage unspecified\n");
535 }
536
537 if (st->gpio_reset) {
538 fsleep(20);
539 gpiod_set_value_cansleep(st->gpio_reset, 0);
540 } else {
541 ret = ad5791_spi_write(st, AD5791_ADDR_SW_CTRL, AD5791_SWCTRL_RESET);
542 if (ret)
543 return dev_err_probe(&spi->dev, ret, "fail to reset\n");
544 }
545
546 st->chip_info = spi_get_device_match_data(spi);
547 if (!st->chip_info)
548 return dev_err_probe(&spi->dev, -EINVAL, "no chip info\n");
549
550 st->ctrl = AD5761_CTRL_LINCOMP(st->chip_info->get_lin_comp(st->vref_mv))
551 | (use_rbuf_gain2 ? 0 : AD5791_CTRL_RBUF) |
552 AD5791_CTRL_BIN2SC;
553
554 ret = ad5791_spi_write(st, AD5791_ADDR_CTRL, st->ctrl |
555 AD5791_CTRL_OPGND | AD5791_CTRL_DACTRI);
556 if (ret)
557 return dev_err_probe(&spi->dev, ret, "fail to write ctrl register\n");
558
559 indio_dev->info = &ad5791_info;
560 indio_dev->modes = INDIO_DIRECT_MODE;
561 indio_dev->channels = &st->chip_info->channel;
562 indio_dev->num_channels = 1;
563 indio_dev->name = st->chip_info->name;
564
565 st->offload = devm_spi_offload_get(&spi->dev, spi, &ad5791_offload_config);
566 ret = PTR_ERR_OR_ZERO(st->offload);
567 if (ret && ret != -ENODEV)
568 return dev_err_probe(&spi->dev, ret, "failed to get offload\n");
569
570 if (ret != -ENODEV) {
571 indio_dev->channels = &st->chip_info->channel_offload;
572 indio_dev->setup_ops = &ad5791_buffer_setup_ops;
573 ret = ad5791_offload_setup(indio_dev);
574 if (ret)
575 return dev_err_probe(&spi->dev, ret,
576 "fail to setup offload\n");
577 }
578
579 return devm_iio_device_register(&spi->dev, indio_dev);
580 }
581
582 static const struct of_device_id ad5791_of_match[] = {
583 { .compatible = "adi,ad5760", .data = &ad5760_chip_info },
584 { .compatible = "adi,ad5780", .data = &ad5780_chip_info },
585 { .compatible = "adi,ad5781", .data = &ad5781_chip_info },
586 { .compatible = "adi,ad5790", .data = &ad5790_chip_info },
587 { .compatible = "adi,ad5791", .data = &ad5791_chip_info },
588 { }
589 };
590 MODULE_DEVICE_TABLE(of, ad5791_of_match);
591
592 static const struct spi_device_id ad5791_id[] = {
593 { "ad5760", (kernel_ulong_t)&ad5760_chip_info },
594 { "ad5780", (kernel_ulong_t)&ad5780_chip_info },
595 { "ad5781", (kernel_ulong_t)&ad5781_chip_info },
596 { "ad5790", (kernel_ulong_t)&ad5790_chip_info },
597 { "ad5791", (kernel_ulong_t)&ad5791_chip_info },
598 { }
599 };
600 MODULE_DEVICE_TABLE(spi, ad5791_id);
601
602 static struct spi_driver ad5791_driver = {
603 .driver = {
604 .name = "ad5791",
605 .of_match_table = ad5791_of_match,
606 },
607 .probe = ad5791_probe,
608 .id_table = ad5791_id,
609 };
610 module_spi_driver(ad5791_driver);
611
612 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
613 MODULE_DESCRIPTION("Analog Devices AD5760/AD5780/AD5781/AD5790/AD5791 DAC");
614 MODULE_LICENSE("GPL v2");
615 MODULE_IMPORT_NS("IIO_DMAENGINE_BUFFER");
616