1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Real Time Clock driver for AB-RTCMC-32.768kHz-EOZ9 chip.
4 * Copyright (C) 2019 Orolia
5 *
6 */
7
8 #include <linux/module.h>
9 #include <linux/rtc.h>
10 #include <linux/i2c.h>
11 #include <linux/bcd.h>
12 #include <linux/of.h>
13 #include <linux/regmap.h>
14 #include <linux/bitfield.h>
15 #include <linux/hwmon.h>
16 #include <linux/hwmon-sysfs.h>
17
18 #define ABEOZ9_REG_CTRL1 0x00
19 #define ABEOZ9_REG_CTRL1_MASK GENMASK(7, 0)
20 #define ABEOZ9_REG_CTRL1_WE BIT(0)
21 #define ABEOZ9_REG_CTRL1_TE BIT(1)
22 #define ABEOZ9_REG_CTRL1_TAR BIT(2)
23 #define ABEOZ9_REG_CTRL1_EERE BIT(3)
24 #define ABEOZ9_REG_CTRL1_SRON BIT(4)
25 #define ABEOZ9_REG_CTRL1_TD0 BIT(5)
26 #define ABEOZ9_REG_CTRL1_TD1 BIT(6)
27 #define ABEOZ9_REG_CTRL1_CLKINT BIT(7)
28
29 #define ABEOZ9_REG_CTRL_INT 0x01
30 #define ABEOZ9_REG_CTRL_INT_AIE BIT(0)
31 #define ABEOZ9_REG_CTRL_INT_TIE BIT(1)
32 #define ABEOZ9_REG_CTRL_INT_V1IE BIT(2)
33 #define ABEOZ9_REG_CTRL_INT_V2IE BIT(3)
34 #define ABEOZ9_REG_CTRL_INT_SRIE BIT(4)
35
36 #define ABEOZ9_REG_CTRL_INT_FLAG 0x02
37 #define ABEOZ9_REG_CTRL_INT_FLAG_AF BIT(0)
38 #define ABEOZ9_REG_CTRL_INT_FLAG_TF BIT(1)
39 #define ABEOZ9_REG_CTRL_INT_FLAG_V1IF BIT(2)
40 #define ABEOZ9_REG_CTRL_INT_FLAG_V2IF BIT(3)
41 #define ABEOZ9_REG_CTRL_INT_FLAG_SRF BIT(4)
42
43 #define ABEOZ9_REG_CTRL_STATUS 0x03
44 #define ABEOZ9_REG_CTRL_STATUS_V1F BIT(2)
45 #define ABEOZ9_REG_CTRL_STATUS_V2F BIT(3)
46 #define ABEOZ9_REG_CTRL_STATUS_SR BIT(4)
47 #define ABEOZ9_REG_CTRL_STATUS_PON BIT(5)
48 #define ABEOZ9_REG_CTRL_STATUS_EEBUSY BIT(7)
49
50 #define ABEOZ9_REG_SEC 0x08
51 #define ABEOZ9_REG_MIN 0x09
52 #define ABEOZ9_REG_HOURS 0x0A
53 #define ABEOZ9_HOURS_PM BIT(6)
54 #define ABEOZ9_REG_DAYS 0x0B
55 #define ABEOZ9_REG_WEEKDAYS 0x0C
56 #define ABEOZ9_REG_MONTHS 0x0D
57 #define ABEOZ9_REG_YEARS 0x0E
58
59 #define ABEOZ9_SEC_LEN 7
60
61 #define ABEOZ9_REG_ALARM_SEC 0x10
62 #define ABEOZ9_BIT_ALARM_SEC GENMASK(6, 0)
63 #define ABEOZ9_REG_ALARM_MIN 0x11
64 #define ABEOZ9_BIT_ALARM_MIN GENMASK(6, 0)
65 #define ABEOZ9_REG_ALARM_HOURS 0x12
66 #define ABEOZ9_BIT_ALARM_HOURS_PM BIT(5)
67 #define ABEOZ9_BIT_ALARM_HOURS GENMASK(5, 0)
68 #define ABEOZ9_REG_ALARM_DAYS 0x13
69 #define ABEOZ9_BIT_ALARM_DAYS GENMASK(5, 0)
70 #define ABEOZ9_REG_ALARM_WEEKDAYS 0x14
71 #define ABEOZ9_BIT_ALARM_WEEKDAYS GENMASK(2, 0)
72 #define ABEOZ9_REG_ALARM_MONTHS 0x15
73 #define ABEOZ9_BIT_ALARM_MONTHS GENMASK(4, 0)
74 #define ABEOZ9_REG_ALARM_YEARS 0x16
75
76 #define ABEOZ9_ALARM_LEN 7
77 #define ABEOZ9_BIT_ALARM_AE BIT(7)
78
79 #define ABEOZ9_REG_REG_TEMP 0x20
80 #define ABEOZ953_TEMP_MAX 120
81 #define ABEOZ953_TEMP_MIN -60
82
83 #define ABEOZ9_REG_EEPROM 0x30
84 #define ABEOZ9_REG_EEPROM_MASK GENMASK(8, 0)
85 #define ABEOZ9_REG_EEPROM_THP BIT(0)
86 #define ABEOZ9_REG_EEPROM_THE BIT(1)
87 #define ABEOZ9_REG_EEPROM_FD0 BIT(2)
88 #define ABEOZ9_REG_EEPROM_FD1 BIT(3)
89 #define ABEOZ9_REG_EEPROM_R1K BIT(4)
90 #define ABEOZ9_REG_EEPROM_R5K BIT(5)
91 #define ABEOZ9_REG_EEPROM_R20K BIT(6)
92 #define ABEOZ9_REG_EEPROM_R80K BIT(7)
93
94 struct abeoz9_rtc_data {
95 struct rtc_device *rtc;
96 struct regmap *regmap;
97 struct device *hwmon_dev;
98 };
99
abeoz9_check_validity(struct device * dev)100 static int abeoz9_check_validity(struct device *dev)
101 {
102 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
103 struct regmap *regmap = data->regmap;
104 int ret;
105 int val;
106
107 ret = regmap_read(regmap, ABEOZ9_REG_CTRL_STATUS, &val);
108 if (ret < 0) {
109 dev_err(dev,
110 "unable to get CTRL_STATUS register (%d)\n", ret);
111 return ret;
112 }
113
114 if (val & ABEOZ9_REG_CTRL_STATUS_PON) {
115 dev_warn(dev, "power-on reset detected, date is invalid\n");
116 return -EINVAL;
117 }
118
119 if (val & ABEOZ9_REG_CTRL_STATUS_V1F) {
120 dev_warn(dev,
121 "voltage drops below VLOW1 threshold, date is invalid\n");
122 return -EINVAL;
123 }
124
125 if ((val & ABEOZ9_REG_CTRL_STATUS_V2F)) {
126 dev_warn(dev,
127 "voltage drops below VLOW2 threshold, date is invalid\n");
128 return -EINVAL;
129 }
130
131 return 0;
132 }
133
abeoz9_reset_validity(struct regmap * regmap)134 static int abeoz9_reset_validity(struct regmap *regmap)
135 {
136 return regmap_update_bits(regmap, ABEOZ9_REG_CTRL_STATUS,
137 ABEOZ9_REG_CTRL_STATUS_V1F |
138 ABEOZ9_REG_CTRL_STATUS_V2F |
139 ABEOZ9_REG_CTRL_STATUS_PON,
140 0);
141 }
142
abeoz9_rtc_get_time(struct device * dev,struct rtc_time * tm)143 static int abeoz9_rtc_get_time(struct device *dev, struct rtc_time *tm)
144 {
145 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
146 u8 regs[ABEOZ9_SEC_LEN];
147 int ret;
148
149 ret = abeoz9_check_validity(dev);
150 if (ret)
151 return ret;
152
153 ret = regmap_bulk_read(data->regmap, ABEOZ9_REG_SEC,
154 regs,
155 sizeof(regs));
156 if (ret) {
157 dev_err(dev, "reading RTC time failed (%d)\n", ret);
158 return ret;
159 }
160
161 tm->tm_sec = bcd2bin(regs[ABEOZ9_REG_SEC - ABEOZ9_REG_SEC] & 0x7F);
162 tm->tm_min = bcd2bin(regs[ABEOZ9_REG_MIN - ABEOZ9_REG_SEC] & 0x7F);
163
164 if (regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] & ABEOZ9_HOURS_PM) {
165 tm->tm_hour =
166 bcd2bin(regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] & 0x1f);
167 if (regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] & ABEOZ9_HOURS_PM)
168 tm->tm_hour += 12;
169 } else {
170 tm->tm_hour = bcd2bin(regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC]);
171 }
172
173 tm->tm_mday = bcd2bin(regs[ABEOZ9_REG_DAYS - ABEOZ9_REG_SEC]);
174 tm->tm_wday = bcd2bin(regs[ABEOZ9_REG_WEEKDAYS - ABEOZ9_REG_SEC]);
175 tm->tm_mon = bcd2bin(regs[ABEOZ9_REG_MONTHS - ABEOZ9_REG_SEC]) - 1;
176 tm->tm_year = bcd2bin(regs[ABEOZ9_REG_YEARS - ABEOZ9_REG_SEC]) + 100;
177
178 return ret;
179 }
180
abeoz9_rtc_set_time(struct device * dev,struct rtc_time * tm)181 static int abeoz9_rtc_set_time(struct device *dev, struct rtc_time *tm)
182 {
183 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
184 struct regmap *regmap = data->regmap;
185 u8 regs[ABEOZ9_SEC_LEN];
186 int ret;
187
188 regs[ABEOZ9_REG_SEC - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_sec);
189 regs[ABEOZ9_REG_MIN - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_min);
190 regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_hour);
191 regs[ABEOZ9_REG_DAYS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_mday);
192 regs[ABEOZ9_REG_WEEKDAYS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_wday);
193 regs[ABEOZ9_REG_MONTHS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_mon + 1);
194 regs[ABEOZ9_REG_YEARS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_year - 100);
195
196 ret = regmap_bulk_write(data->regmap, ABEOZ9_REG_SEC,
197 regs,
198 sizeof(regs));
199
200 if (ret) {
201 dev_err(dev, "set RTC time failed (%d)\n", ret);
202 return ret;
203 }
204
205 return abeoz9_reset_validity(regmap);
206 }
207
abeoz9_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alarm)208 static int abeoz9_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
209 {
210 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
211 struct regmap *regmap = data->regmap;
212 u8 regs[ABEOZ9_ALARM_LEN];
213 u8 val[2];
214 int ret;
215
216 ret = abeoz9_check_validity(dev);
217 if (ret)
218 return ret;
219
220 ret = regmap_bulk_read(regmap, ABEOZ9_REG_CTRL_INT, val, sizeof(val));
221 if (ret)
222 return ret;
223
224 alarm->enabled = val[0] & ABEOZ9_REG_CTRL_INT_AIE;
225 alarm->pending = val[1] & ABEOZ9_REG_CTRL_INT_FLAG_AF;
226
227 ret = regmap_bulk_read(regmap, ABEOZ9_REG_ALARM_SEC, regs, sizeof(regs));
228 if (ret)
229 return ret;
230
231 alarm->time.tm_sec = bcd2bin(FIELD_GET(ABEOZ9_BIT_ALARM_SEC, regs[0]));
232 alarm->time.tm_min = bcd2bin(FIELD_GET(ABEOZ9_BIT_ALARM_MIN, regs[1]));
233 alarm->time.tm_hour = bcd2bin(FIELD_GET(ABEOZ9_BIT_ALARM_HOURS, regs[2]));
234
235 alarm->time.tm_mday = bcd2bin(FIELD_GET(ABEOZ9_BIT_ALARM_DAYS, regs[3]));
236
237 return 0;
238 }
239
abeoz9_rtc_alarm_irq_enable(struct device * dev,u32 enable)240 static int abeoz9_rtc_alarm_irq_enable(struct device *dev, u32 enable)
241 {
242 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
243
244 return regmap_update_bits(data->regmap, ABEOZ9_REG_CTRL_INT,
245 ABEOZ9_REG_CTRL_INT_AIE,
246 FIELD_PREP(ABEOZ9_REG_CTRL_INT_AIE, enable));
247 }
248
abeoz9_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alarm)249 static int abeoz9_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
250 {
251 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
252 u8 regs[ABEOZ9_ALARM_LEN] = {0};
253 int ret;
254
255 ret = regmap_update_bits(data->regmap, ABEOZ9_REG_CTRL_INT_FLAG,
256 ABEOZ9_REG_CTRL_INT_FLAG_AF, 0);
257 if (ret)
258 return ret;
259
260 regs[0] = ABEOZ9_BIT_ALARM_AE | FIELD_PREP(ABEOZ9_BIT_ALARM_SEC,
261 bin2bcd(alarm->time.tm_sec));
262 regs[1] = ABEOZ9_BIT_ALARM_AE | FIELD_PREP(ABEOZ9_BIT_ALARM_MIN,
263 bin2bcd(alarm->time.tm_min));
264 regs[2] = ABEOZ9_BIT_ALARM_AE | FIELD_PREP(ABEOZ9_BIT_ALARM_HOURS,
265 bin2bcd(alarm->time.tm_hour));
266 regs[3] = ABEOZ9_BIT_ALARM_AE | FIELD_PREP(ABEOZ9_BIT_ALARM_DAYS,
267 bin2bcd(alarm->time.tm_mday));
268
269 ret = regmap_bulk_write(data->regmap, ABEOZ9_REG_ALARM_SEC, regs,
270 sizeof(regs));
271 if (ret)
272 return ret;
273
274 return abeoz9_rtc_alarm_irq_enable(dev, alarm->enabled);
275 }
276
abeoz9_rtc_irq(int irq,void * dev)277 static irqreturn_t abeoz9_rtc_irq(int irq, void *dev)
278 {
279 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
280 unsigned int val;
281 int ret;
282
283 ret = regmap_read(data->regmap, ABEOZ9_REG_CTRL_INT_FLAG, &val);
284 if (ret)
285 return IRQ_NONE;
286
287 if (!FIELD_GET(ABEOZ9_REG_CTRL_INT_FLAG_AF, val))
288 return IRQ_NONE;
289
290 regmap_update_bits(data->regmap, ABEOZ9_REG_CTRL_INT_FLAG,
291 ABEOZ9_REG_CTRL_INT_FLAG_AF, 0);
292
293 rtc_update_irq(data->rtc, 1, RTC_IRQF | RTC_AF);
294
295 return IRQ_HANDLED;
296 }
297
abeoz9_trickle_parse_dt(struct device_node * node)298 static int abeoz9_trickle_parse_dt(struct device_node *node)
299 {
300 u32 ohms = 0;
301
302 if (of_property_read_u32(node, "trickle-resistor-ohms", &ohms))
303 return 0;
304
305 switch (ohms) {
306 case 1000:
307 return ABEOZ9_REG_EEPROM_R1K;
308 case 5000:
309 return ABEOZ9_REG_EEPROM_R5K;
310 case 20000:
311 return ABEOZ9_REG_EEPROM_R20K;
312 case 80000:
313 return ABEOZ9_REG_EEPROM_R80K;
314 default:
315 return 0;
316 }
317 }
318
abeoz9_rtc_setup(struct device * dev,struct device_node * node)319 static int abeoz9_rtc_setup(struct device *dev, struct device_node *node)
320 {
321 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
322 struct regmap *regmap = data->regmap;
323 int ret;
324
325 /* Enable Self Recovery, Clock for Watch and EEPROM refresh functions */
326 ret = regmap_update_bits(regmap, ABEOZ9_REG_CTRL1,
327 ABEOZ9_REG_CTRL1_MASK,
328 ABEOZ9_REG_CTRL1_WE |
329 ABEOZ9_REG_CTRL1_EERE |
330 ABEOZ9_REG_CTRL1_SRON);
331 if (ret < 0) {
332 dev_err(dev, "unable to set CTRL_1 register (%d)\n", ret);
333 return ret;
334 }
335
336 ret = regmap_write(regmap, ABEOZ9_REG_CTRL_INT, 0);
337 if (ret < 0) {
338 dev_err(dev,
339 "unable to set control CTRL_INT register (%d)\n",
340 ret);
341 return ret;
342 }
343
344 ret = regmap_write(regmap, ABEOZ9_REG_CTRL_INT_FLAG, 0);
345 if (ret < 0) {
346 dev_err(dev,
347 "unable to set control CTRL_INT_FLAG register (%d)\n",
348 ret);
349 return ret;
350 }
351
352 ret = abeoz9_trickle_parse_dt(node);
353
354 /* Enable built-in termometer */
355 ret |= ABEOZ9_REG_EEPROM_THE;
356
357 ret = regmap_update_bits(regmap, ABEOZ9_REG_EEPROM,
358 ABEOZ9_REG_EEPROM_MASK,
359 ret);
360 if (ret < 0) {
361 dev_err(dev, "unable to set EEPROM register (%d)\n", ret);
362 return ret;
363 }
364
365 return ret;
366 }
367
368 static const struct rtc_class_ops rtc_ops = {
369 .read_time = abeoz9_rtc_get_time,
370 .set_time = abeoz9_rtc_set_time,
371 .read_alarm = abeoz9_rtc_read_alarm,
372 .set_alarm = abeoz9_rtc_set_alarm,
373 .alarm_irq_enable = abeoz9_rtc_alarm_irq_enable,
374 };
375
376 static const struct regmap_config abeoz9_rtc_regmap_config = {
377 .reg_bits = 8,
378 .val_bits = 8,
379 .max_register = 0x3f,
380 };
381
382 #if IS_REACHABLE(CONFIG_HWMON)
383
abeoz9z3_temp_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * temp)384 static int abeoz9z3_temp_read(struct device *dev,
385 enum hwmon_sensor_types type,
386 u32 attr, int channel, long *temp)
387 {
388 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
389 struct regmap *regmap = data->regmap;
390 int ret;
391 unsigned int val;
392
393 ret = regmap_read(regmap, ABEOZ9_REG_CTRL_STATUS, &val);
394 if (ret < 0)
395 return ret;
396
397 switch (attr) {
398 case hwmon_temp_input:
399 ret = regmap_read(regmap, ABEOZ9_REG_REG_TEMP, &val);
400 if (ret < 0)
401 return ret;
402 *temp = 1000 * (val + ABEOZ953_TEMP_MIN);
403 return 0;
404 case hwmon_temp_max:
405 *temp = 1000 * ABEOZ953_TEMP_MAX;
406 return 0;
407 case hwmon_temp_min:
408 *temp = 1000 * ABEOZ953_TEMP_MIN;
409 return 0;
410 default:
411 return -EOPNOTSUPP;
412 }
413 }
414
abeoz9_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)415 static umode_t abeoz9_is_visible(const void *data,
416 enum hwmon_sensor_types type,
417 u32 attr, int channel)
418 {
419 switch (attr) {
420 case hwmon_temp_input:
421 case hwmon_temp_max:
422 case hwmon_temp_min:
423 return 0444;
424 default:
425 return 0;
426 }
427 }
428
429 static const u32 abeoz9_chip_config[] = {
430 HWMON_C_REGISTER_TZ,
431 0
432 };
433
434 static const struct hwmon_channel_info abeoz9_chip = {
435 .type = hwmon_chip,
436 .config = abeoz9_chip_config,
437 };
438
439 static const u32 abeoz9_temp_config[] = {
440 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN,
441 0
442 };
443
444 static const struct hwmon_channel_info abeoz9_temp = {
445 .type = hwmon_temp,
446 .config = abeoz9_temp_config,
447 };
448
449 static const struct hwmon_channel_info * const abeoz9_info[] = {
450 &abeoz9_chip,
451 &abeoz9_temp,
452 NULL
453 };
454
455 static const struct hwmon_ops abeoz9_hwmon_ops = {
456 .is_visible = abeoz9_is_visible,
457 .read = abeoz9z3_temp_read,
458 };
459
460 static const struct hwmon_chip_info abeoz9_chip_info = {
461 .ops = &abeoz9_hwmon_ops,
462 .info = abeoz9_info,
463 };
464
abeoz9_hwmon_register(struct device * dev,struct abeoz9_rtc_data * data)465 static void abeoz9_hwmon_register(struct device *dev,
466 struct abeoz9_rtc_data *data)
467 {
468 data->hwmon_dev =
469 devm_hwmon_device_register_with_info(dev,
470 "abeoz9",
471 data,
472 &abeoz9_chip_info,
473 NULL);
474 if (IS_ERR(data->hwmon_dev)) {
475 dev_warn(dev, "unable to register hwmon device %ld\n",
476 PTR_ERR(data->hwmon_dev));
477 }
478 }
479
480 #else
481
abeoz9_hwmon_register(struct device * dev,struct abeoz9_rtc_data * data)482 static void abeoz9_hwmon_register(struct device *dev,
483 struct abeoz9_rtc_data *data)
484 {
485 }
486
487 #endif
488
abeoz9_probe(struct i2c_client * client)489 static int abeoz9_probe(struct i2c_client *client)
490 {
491 struct abeoz9_rtc_data *data = NULL;
492 struct device *dev = &client->dev;
493 struct regmap *regmap;
494 int ret;
495
496 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
497 I2C_FUNC_SMBUS_BYTE_DATA |
498 I2C_FUNC_SMBUS_I2C_BLOCK))
499 return -ENODEV;
500
501 regmap = devm_regmap_init_i2c(client, &abeoz9_rtc_regmap_config);
502 if (IS_ERR(regmap)) {
503 ret = PTR_ERR(regmap);
504 dev_err(dev, "regmap allocation failed: %d\n", ret);
505 return ret;
506 }
507
508 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
509 if (!data)
510 return -ENOMEM;
511
512 data->regmap = regmap;
513 dev_set_drvdata(dev, data);
514
515 ret = abeoz9_rtc_setup(dev, client->dev.of_node);
516 if (ret)
517 return ret;
518
519 data->rtc = devm_rtc_allocate_device(dev);
520 ret = PTR_ERR_OR_ZERO(data->rtc);
521 if (ret)
522 return ret;
523
524 data->rtc->ops = &rtc_ops;
525 data->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
526 data->rtc->range_max = RTC_TIMESTAMP_END_2099;
527 clear_bit(RTC_FEATURE_ALARM, data->rtc->features);
528
529 if (client->irq > 0) {
530 unsigned long irqflags = IRQF_TRIGGER_LOW;
531
532 if (dev_fwnode(&client->dev))
533 irqflags = 0;
534
535 ret = devm_request_threaded_irq(dev, client->irq, NULL,
536 abeoz9_rtc_irq,
537 irqflags | IRQF_ONESHOT,
538 dev_name(dev), dev);
539 if (ret) {
540 dev_err(dev, "failed to request alarm irq\n");
541 return ret;
542 }
543 } else {
544 clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, data->rtc->features);
545 }
546
547 if (client->irq > 0 || device_property_read_bool(dev, "wakeup-source")) {
548 ret = device_init_wakeup(dev, true);
549 set_bit(RTC_FEATURE_ALARM, data->rtc->features);
550 }
551
552 ret = devm_rtc_register_device(data->rtc);
553 if (ret)
554 return ret;
555
556 abeoz9_hwmon_register(dev, data);
557 return 0;
558 }
559
560 #ifdef CONFIG_OF
561 static const struct of_device_id abeoz9_dt_match[] = {
562 { .compatible = "abracon,abeoz9" },
563 { },
564 };
565 MODULE_DEVICE_TABLE(of, abeoz9_dt_match);
566 #endif
567
568 static const struct i2c_device_id abeoz9_id[] = {
569 { "abeoz9" },
570 { }
571 };
572
573 static struct i2c_driver abeoz9_driver = {
574 .driver = {
575 .name = "rtc-ab-eoz9",
576 .of_match_table = of_match_ptr(abeoz9_dt_match),
577 },
578 .probe = abeoz9_probe,
579 .id_table = abeoz9_id,
580 };
581
582 module_i2c_driver(abeoz9_driver);
583
584 MODULE_AUTHOR("Artem Panfilov <panfilov.artyom@gmail.com>");
585 MODULE_DESCRIPTION("Abracon AB-RTCMC-32.768kHz-EOZ9 RTC driver");
586 MODULE_LICENSE("GPL");
587