| /linux/drivers/net/wireless/quantenna/qtnfmac/pcie/ |
| H A D | pearl_pcie_regs.h | 8 #define PCIE_HDP_CTRL(base) ((base) + 0x2c00) argument
9 #define PCIE_HDP_AXI_CTRL(base) ((base) + 0x2c04) argument
10 #define PCIE_HDP_HOST_WR_DESC0(base) ((base) + 0x2c10) argument
11 #define PCIE_HDP_HOST_WR_DESC0_H(base) ((base) + 0x2c14) argument
12 #define PCIE_HDP_HOST_WR_DESC1(base) ((base) + 0x2c18) argument
13 #define PCIE_HDP_HOST_WR_DESC1_H(base) ((base) + 0x2c1c) argument
14 #define PCIE_HDP_HOST_WR_DESC2(base) ((base) + 0x2c20) argument
15 #define PCIE_HDP_HOST_WR_DESC2_H(base) ((base) + 0x2c24) argument
16 #define PCIE_HDP_HOST_WR_DESC3(base) ((base) + 0x2c28) argument
17 #define PCIE_HDP_HOST_WR_DESC4_H(base) ((base) + 0x2c2c) argument
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| H A D | topaz_pcie_regs.h | 8 #define PCIE_DMA_WR_INTR_STATUS(base) ((base) + 0x9bc) argument
9 #define PCIE_DMA_WR_INTR_MASK(base) ((base) + 0x9c4) argument
10 #define PCIE_DMA_WR_INTR_CLR(base) ((base) + 0x9c8) argument
11 #define PCIE_DMA_WR_ERR_STATUS(base) ((base) + 0x9cc) argument
12 #define PCIE_DMA_WR_DONE_IMWR_ADDR_LOW(base) ((base) + 0x9D0) argument
13 #define PCIE_DMA_WR_DONE_IMWR_ADDR_HIGH(base) ((base) + 0x9d4) argument
15 #define PCIE_DMA_RD_INTR_STATUS(base) ((base) + 0x310) argument
16 #define PCIE_DMA_RD_INTR_MASK(base) ((base) + 0x319) argument
17 #define PCIE_DMA_RD_INTR_CLR(base) ((base) + 0x31c) argument
18 #define PCIE_DMA_RD_ERR_STATUS_LOW(base) ((base) + 0x324) argument
[all …]
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| /linux/drivers/gpu/drm/xe/regs/ |
| H A D | xe_engine_regs.h | 46 #define RING_TAIL(base) XE_REG((base) + 0x30) argument
49 #define RING_HEAD(base) XE_REG((base) + 0x34) argument
52 #define RING_START(base) XE_REG((base) + 0x38) argument
54 #define RING_CTL(base) XE_REG((base) + 0x3c) argument
58 #define RING_START_UDW(base) XE_REG((base) + 0x48) argument
60 #define RING_PSMI_CTL(base) XE_REG((base) + 0x50, XE_REG_OPTION_MASKED) argument
65 #define RING_PWRCTX_MAXCNT(base) XE_REG((base) + 0x54) argument
68 #define RING_ACTHD_UDW(base) XE_REG((base) + 0x5c) argument
69 #define RING_DMA_FADD_UDW(base) XE_REG((base) + 0x60) argument
70 #define RING_IPEHR(base) XE_REG((base) + 0x68) argument
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| H A D | xe_gsc_regs.h | 19 #define HECI_H_CSR(base) XE_REG((base) + 0x4) argument
30 #define HECI_FWSTS1(base) XE_REG((base) + 0xc40) argument
35 #define HECI_FWSTS2(base) XE_REG((base) + 0xc48) argument
36 #define HECI_FWSTS3(base) XE_REG((base) + 0xc60) argument
37 #define HECI_FWSTS4(base) XE_REG((base) + 0xc64) argument
38 #define HECI_FWSTS5(base) XE_REG((base) + 0xc68) argument
40 #define HECI_FWSTS6(base) XE_REG((base) + 0xc6c) argument
42 #define HECI_H_GS1(base) XE_REG((base) + 0xc4c) argument
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| /linux/drivers/gpu/drm/sun4i/ |
| H A D | sun8i_vi_scaler.h | 30 #define SUN8I_SCALER_VSU_CTRL(base) ((base) + 0x0) argument
31 #define SUN50I_SCALER_VSU_SCALE_MODE(base) ((base) + 0x10) argument
32 #define SUN50I_SCALER_VSU_DIR_THR(base) ((base) + 0x20) argument
33 #define SUN50I_SCALER_VSU_EDGE_THR(base) ((base) + 0x24) argument
34 #define SUN50I_SCALER_VSU_EDSCL_CTRL(base) ((base) + 0x28) argument
35 #define SUN50I_SCALER_VSU_ANGLE_THR(base) ((base) + 0x2c) argument
36 #define SUN8I_SCALER_VSU_OUTSIZE(base) ((base) + 0x40) argument
37 #define SUN8I_SCALER_VSU_YINSIZE(base) ((base) + 0x80) argument
38 #define SUN8I_SCALER_VSU_YHSTEP(base) ((base) + 0x88) argument
39 #define SUN8I_SCALER_VSU_YVSTEP(base) ((base) + 0x8c) argument
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| H A D | sun8i_ui_layer.h | 17 #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR(base, layer) \ argument
19 #define SUN8I_MIXER_CHAN_UI_LAYER_SIZE(base, layer) \ argument
21 #define SUN8I_MIXER_CHAN_UI_LAYER_COORD(base, layer) \ argument
23 #define SUN8I_MIXER_CHAN_UI_LAYER_PITCH(base, layer) \ argument
25 #define SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(base, layer) \ argument
27 #define SUN8I_MIXER_CHAN_UI_LAYER_BOT_LADDR(base, layer) \ argument
29 #define SUN8I_MIXER_CHAN_UI_LAYER_FCOLOR(base, layer) \ argument
31 #define SUN8I_MIXER_CHAN_UI_TOP_HADDR(base) \ argument
33 #define SUN8I_MIXER_CHAN_UI_BOT_HADDR(base) \ argument
35 #define SUN8I_MIXER_CHAN_UI_OVL_SIZE(base) \ argument
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| H A D | sun8i_vi_layer.h | 11 #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR(base, layer) \ argument
13 #define SUN8I_MIXER_CHAN_VI_LAYER_SIZE(base, layer) \ argument
15 #define SUN8I_MIXER_CHAN_VI_LAYER_COORD(base, layer) \ argument
17 #define SUN8I_MIXER_CHAN_VI_LAYER_PITCH(base, layer, plane) \ argument
19 #define SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(base, layer, plane) \ argument
21 #define SUN8I_MIXER_CHAN_VI_OVL_SIZE(base) \ argument
23 #define SUN8I_MIXER_CHAN_VI_HDS_Y(base) \ argument
25 #define SUN8I_MIXER_CHAN_VI_HDS_UV(base) \ argument
27 #define SUN8I_MIXER_CHAN_VI_VDS_Y(base) \ argument
29 #define SUN8I_MIXER_CHAN_VI_VDS_UV(base) \ argument
|
| H A D | sun8i_ui_scaler.h | 26 #define SUN8I_SCALER_GSU_CTRL(base) ((base) + 0x0) argument
27 #define SUN8I_SCALER_GSU_OUTSIZE(base) ((base) + 0x40) argument
28 #define SUN8I_SCALER_GSU_INSIZE(base) ((base) + 0x80) argument
29 #define SUN8I_SCALER_GSU_HSTEP(base) ((base) + 0x88) argument
30 #define SUN8I_SCALER_GSU_VSTEP(base) ((base) + 0x8c) argument
31 #define SUN8I_SCALER_GSU_HPHASE(base) ((base) + 0x90) argument
32 #define SUN8I_SCALER_GSU_VPHASE(base) ((base) + 0x98) argument
33 #define SUN8I_SCALER_GSU_HCOEFF(base, index) ((base) + 0x200 + 0x4 * (index)) argument
|
| /linux/drivers/scsi/ |
| H A D | nsp32_io.h | 12 static inline void nsp32_write1(unsigned int base, in nsp32_write1()
19 static inline unsigned char nsp32_read1(unsigned int base, in nsp32_read1()
25 static inline void nsp32_write2(unsigned int base, in nsp32_write2()
32 static inline unsigned short nsp32_read2(unsigned int base, in nsp32_read2()
38 static inline void nsp32_write4(unsigned int base, in nsp32_write4()
45 static inline unsigned long nsp32_read4(unsigned int base, in nsp32_read4()
53 static inline void nsp32_mmio_write1(unsigned long base, in nsp32_mmio_write1()
64 static inline unsigned char nsp32_mmio_read1(unsigned long base, in nsp32_mmio_read1()
74 static inline void nsp32_mmio_write2(unsigned long base, in nsp32_mmio_write2()
85 static inline unsigned short nsp32_mmio_read2(unsigned long base, in nsp32_mmio_read2()
[all …]
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| H A D | aha1740.h | 19 #define HID0(base) (base + 0x0) argument
20 #define HID1(base) (base + 0x1) argument
21 #define HID2(base) (base + 0x2) argument
22 #define HID3(base) (base + 0x3) argument
23 #define EBCNTRL(base) (base + 0x4) argument
24 #define PORTADR(base) (base + 0x40) argument
25 #define BIOSADR(base) (base + 0x41) argument
26 #define INTDEF(base) (base + 0x42) argument
27 #define SCSIDEF(base) (base + 0x43) argument
28 #define BUSDEF(base) (base + 0x44) argument
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| H A D | myrb.c | 164 void __iomem *base = cb->io_base; in myrb_qcmd() local
807 void __iomem *base = cb->io_base; in myrb_enable_mmio() local
2516 static inline void DAC960_LA_hw_mbox_new_cmd(void __iomem *base) in DAC960_LA_hw_mbox_new_cmd()
2521 static inline void DAC960_LA_ack_hw_mbox_status(void __iomem *base) in DAC960_LA_ack_hw_mbox_status()
2526 static inline void DAC960_LA_reset_ctrl(void __iomem *base) in DAC960_LA_reset_ctrl()
2531 static inline void DAC960_LA_mem_mbox_new_cmd(void __iomem *base) in DAC960_LA_mem_mbox_new_cmd()
2536 static inline bool DAC960_LA_hw_mbox_is_full(void __iomem *base) in DAC960_LA_hw_mbox_is_full()
2543 static inline bool DAC960_LA_init_in_progress(void __iomem *base) in DAC960_LA_init_in_progress()
2550 static inline void DAC960_LA_ack_hw_mbox_intr(void __iomem *base) in DAC960_LA_ack_hw_mbox_intr()
2555 static inline void DAC960_LA_ack_intr(void __iomem *base) in DAC960_LA_ack_intr()
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| H A D | myrs.c | 106 void __iomem *base = cs->io_base; in myrs_qcmd() local
484 void __iomem *base = cs->io_base; in myrs_enable_mmio_mbox() local
2397 static inline void DAC960_GEM_hw_mbox_new_cmd(void __iomem *base) in DAC960_GEM_hw_mbox_new_cmd()
2404 static inline void DAC960_GEM_ack_hw_mbox_status(void __iomem *base) in DAC960_GEM_ack_hw_mbox_status()
2411 static inline void DAC960_GEM_reset_ctrl(void __iomem *base) in DAC960_GEM_reset_ctrl()
2418 static inline void DAC960_GEM_mem_mbox_new_cmd(void __iomem *base) in DAC960_GEM_mem_mbox_new_cmd()
2425 static inline bool DAC960_GEM_hw_mbox_is_full(void __iomem *base) in DAC960_GEM_hw_mbox_is_full()
2433 static inline bool DAC960_GEM_init_in_progress(void __iomem *base) in DAC960_GEM_init_in_progress()
2441 static inline void DAC960_GEM_ack_hw_mbox_intr(void __iomem *base) in DAC960_GEM_ack_hw_mbox_intr()
2448 static inline void DAC960_GEM_ack_intr(void __iomem *base) in DAC960_GEM_ack_intr()
[all …]
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| /linux/drivers/gpu/drm/i915/ |
| H A D | intel_gvt_mmio_table.c | 69 #define RING_REG(base) _MMIO((base) + 0x28) in iterate_generic_mmio() argument
73 #define RING_REG(base) _MMIO((base) + 0x134) in iterate_generic_mmio() argument
77 #define RING_REG(base) _MMIO((base) + 0x6c) in iterate_generic_mmio() argument
91 #define RING_REG(base) _MMIO((base) + 0x29c) in iterate_generic_mmio() argument
780 #define RING_REG(base) _MMIO((base) + 0xd0) in iterate_bdw_plus_mmio() argument
784 #define RING_REG(base) _MMIO((base) + 0x230) in iterate_bdw_plus_mmio() argument
788 #define RING_REG(base) _MMIO((base) + 0x234) in iterate_bdw_plus_mmio() argument
792 #define RING_REG(base) _MMIO((base) + 0x244) in iterate_bdw_plus_mmio() argument
796 #define RING_REG(base) _MMIO((base) + 0x370) in iterate_bdw_plus_mmio() argument
800 #define RING_REG(base) _MMIO((base) + 0x3a0) in iterate_bdw_plus_mmio() argument
[all …]
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| /linux/arch/loongarch/lib/ |
| H A D | xor_simd.c | 19 #define LD(reg, base, offset) \ argument
21 #define ST(reg, base, offset) \ argument
25 #define LD_INOUT_LINE(base) \ argument
31 #define LD_AND_XOR_LINE(base) \ argument
41 #define ST_LINE(base) \ argument
62 #define LD(reg, base, offset) \ argument
64 #define ST(reg, base, offset) \ argument
68 #define LD_INOUT_LINE(base) \ argument
72 #define LD_AND_XOR_LINE(base) \ argument
78 #define ST_LINE(base) \ argument
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| /linux/arch/arm/mm/ |
| H A D | cache-l2x0.c | 65 static void l2c_write_sec(unsigned long val, void __iomem *base, unsigned reg) in l2c_write_sec()
80 static inline void l2c_set_debug(void __iomem *base, unsigned long val) in l2c_set_debug()
91 static inline void l2c_unlock(void __iomem *base, unsigned num) in l2c_unlock()
103 static void l2c_configure(void __iomem *base) in l2c_configure()
112 static void l2c_enable(void __iomem *base, unsigned num_lock) in l2c_enable()
134 void __iomem *base = l2x0_base; in l2c_disable() local
143 static void l2c_save(void __iomem *base) in l2c_save()
150 void __iomem *base = l2x0_base; in l2c_resume() local
173 static void __l2c210_cache_sync(void __iomem *base) in __l2c210_cache_sync()
189 void __iomem *base = l2x0_base; in l2c210_inv_range() local
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| /linux/include/linux/ |
| H A D | kstrtox.h | 30 static inline int __must_check kstrtoul(const char *s, unsigned int base, unsigned long *res) in kstrtoul()
58 static inline int __must_check kstrtol(const char *s, unsigned int base, long *res) in kstrtol()
74 static inline int __must_check kstrtou64(const char *s, unsigned int base, u64 *res) in kstrtou64()
79 static inline int __must_check kstrtos64(const char *s, unsigned int base, s64 *res) in kstrtos64()
84 static inline int __must_check kstrtou32(const char *s, unsigned int base, u32 *res) in kstrtou32()
89 static inline int __must_check kstrtos32(const char *s, unsigned int base, s32 *res) in kstrtos32()
112 …t __must_check kstrtou64_from_user(const char __user *s, size_t count, unsigned int base, u64 *res) in kstrtou64_from_user()
117 …t __must_check kstrtos64_from_user(const char __user *s, size_t count, unsigned int base, s64 *res) in kstrtos64_from_user()
122 …t __must_check kstrtou32_from_user(const char __user *s, size_t count, unsigned int base, u32 *res) in kstrtou32_from_user()
127 …t __must_check kstrtos32_from_user(const char __user *s, size_t count, unsigned int base, s32 *res) in kstrtos32_from_user()
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| /linux/lib/ |
| H A D | kstrtox.c | 26 const char *_parse_integer_fixup_radix(const char *s, unsigned int *base) in _parse_integer_fixup_radix()
52 unsigned int _parse_integer_limit(const char *s, unsigned int base, unsigned long long *p, in _parse_integer_limit()
91 unsigned int _parse_integer(const char *s, unsigned int base, unsigned long long *p) in _parse_integer()
96 static int _kstrtoull(const char *s, unsigned int base, unsigned long long *res) in _kstrtoull()
132 int kstrtoull(const char *s, unsigned int base, unsigned long long *res) in kstrtoull()
156 int kstrtoll(const char *s, unsigned int base, long long *res) in kstrtoll()
181 int _kstrtoul(const char *s, unsigned int base, unsigned long *res) in _kstrtoul()
197 int _kstrtol(const char *s, unsigned int base, long *res) in _kstrtol()
228 int kstrtouint(const char *s, unsigned int base, unsigned int *res) in kstrtouint()
259 int kstrtoint(const char *s, unsigned int base, int *res) in kstrtoint()
[all …]
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| /linux/drivers/scsi/pcmcia/ |
| H A D | nsp_io.h | 30 static inline void nsp_write(unsigned int base, in nsp_write()
37 static inline unsigned char nsp_read(unsigned int base, in nsp_read()
75 static inline void nsp_fifo8_read(unsigned int base, in nsp_fifo8_read()
94 static inline void nsp_fifo16_read(unsigned int base, in nsp_fifo16_read()
113 static inline void nsp_fifo32_read(unsigned int base, in nsp_fifo32_read()
132 static inline void nsp_fifo8_write(unsigned int base, in nsp_fifo8_write()
150 static inline void nsp_fifo16_write(unsigned int base, in nsp_fifo16_write()
168 static inline void nsp_fifo32_write(unsigned int base, in nsp_fifo32_write()
178 static inline void nsp_mmio_write(unsigned long base, in nsp_mmio_write()
187 static inline unsigned char nsp_mmio_read(unsigned long base, in nsp_mmio_read()
[all …]
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| /linux/arch/powerpc/kernel/ |
| H A D | fpu.S | 26 #define __REST_1FPVSR(n,c,base) \ argument
35 #define __REST_32FPVSRS(n,c,base) \ argument
44 #define __SAVE_32FPVSRS(n,c,base) \ argument
53 #define __REST_1FPVSR(n,b,base) REST_FPR(n, base) argument
54 #define __REST_32FPVSRS(n,b,base) REST_32FPRS(n, base) argument
55 #define __SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base) argument
57 #define REST_1FPVSR(n,c,base) __REST_1FPVSR(n,__REG_##c,__REG_##base) argument
58 #define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base) argument
59 #define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base) argument
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| /linux/drivers/i3c/master/mipi-i3c-hci/ |
| H A D | ext_caps.c | 24 static int hci_extcap_hardware_id(struct i3c_hci *hci, void __iomem *base) in hci_extcap_hardware_id()
45 static int hci_extcap_master_config(struct i3c_hci *hci, void __iomem *base) in hci_extcap_master_config()
59 static int hci_extcap_multi_bus(struct i3c_hci *hci, void __iomem *base) in hci_extcap_multi_bus()
68 static int hci_extcap_xfer_modes(struct i3c_hci *hci, void __iomem *base) in hci_extcap_xfer_modes()
88 static int hci_extcap_xfer_rates(struct i3c_hci *hci, void __iomem *base) in hci_extcap_xfer_rates()
116 static int hci_extcap_auto_command(struct i3c_hci *hci, void __iomem *base) in hci_extcap_auto_command()
130 static int hci_extcap_debug(struct i3c_hci *hci, void __iomem *base) in hci_extcap_debug()
137 static int hci_extcap_scheduled_cmd(struct i3c_hci *hci, void __iomem *base) in hci_extcap_scheduled_cmd()
144 static int hci_extcap_non_curr_master(struct i3c_hci *hci, void __iomem *base) in hci_extcap_non_curr_master()
151 static int hci_extcap_ccc_resp_conf(struct i3c_hci *hci, void __iomem *base) in hci_extcap_ccc_resp_conf()
[all …]
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| /linux/drivers/media/platform/mediatek/mdp3/ |
| H A D | mtk-mdp3-comp.c | 62 phys_addr_t base = ctx->comp->reg_base; in init_rdma() local
94 phys_addr_t base = ctx->comp->reg_base; in config_rdma_frame() local
294 phys_addr_t base = ctx->comp->reg_base; in config_rdma_subfrm() local
382 phys_addr_t base = ctx->comp->reg_base; in wait_rdma_event() local
410 phys_addr_t base = ctx->comp->reg_base; in init_rsz() local
434 phys_addr_t base = ctx->comp->reg_base; in config_rsz_frame() local
488 phys_addr_t base = ctx->comp->reg_base; in config_rsz_subfrm() local
624 phys_addr_t base = ctx->comp->reg_base; in advance_rsz_subfrm() local
654 phys_addr_t base = ctx->comp->reg_base; in init_wrot() local
675 phys_addr_t base = ctx->comp->reg_base; in config_wrot_frame() local
[all …]
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| /linux/arch/mips/alchemy/common/ |
| H A D | usb.c | 98 static inline void __au1300_usb_phyctl(void __iomem *base, int enable) in __au1300_usb_phyctl()
123 static inline void __au1300_ohci_control(void __iomem *base, int enable, int id) in __au1300_ohci_control()
163 static inline void __au1300_ehci_control(void __iomem *base, int enable) in __au1300_ehci_control()
204 static inline void __au1300_udc_control(void __iomem *base, int enable) in __au1300_udc_control()
235 static inline void __au1300_otg_control(void __iomem *base, int enable) in __au1300_otg_control()
267 void __iomem *base = in au1300_usb_control() local
295 void __iomem *base = in au1300_usb_init() local
316 static inline void __au1200_ohci_control(void __iomem *base, int enable) in __au1200_ohci_control()
330 static inline void __au1200_ehci_control(void __iomem *base, int enable) in __au1200_ehci_control()
346 static inline void __au1200_udc_control(void __iomem *base, int enable) in __au1200_udc_control()
[all …]
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/bar/ |
| H A D | nv50.c | 32 nv50_bar_flush(struct nvkm_bar *base) in nv50_bar_flush()
47 nv50_bar_bar1_vmm(struct nvkm_bar *base) in nv50_bar_bar1_vmm()
53 nv50_bar_bar1_wait(struct nvkm_bar *base) in nv50_bar_bar1_wait()
65 nv50_bar_bar1_init(struct nvkm_bar *base) in nv50_bar_bar1_init()
73 nv50_bar_bar2_vmm(struct nvkm_bar *base) in nv50_bar_bar2_vmm()
85 nv50_bar_bar2_init(struct nvkm_bar *base) in nv50_bar_bar2_init()
95 nv50_bar_init(struct nvkm_bar *base) in nv50_bar_init()
106 nv50_bar_oneinit(struct nvkm_bar *base) in nv50_bar_oneinit()
204 nv50_bar_dtor(struct nvkm_bar *base) in nv50_bar_dtor()
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| /linux/arch/arm/plat-orion/ |
| H A D | pcie.c | 55 u32 orion_pcie_dev_id(void __iomem *base) in orion_pcie_dev_id()
60 u32 orion_pcie_rev(void __iomem *base) in orion_pcie_rev()
65 int orion_pcie_link_up(void __iomem *base) in orion_pcie_link_up()
70 int __init orion_pcie_x4_mode(void __iomem *base) in orion_pcie_x4_mode()
75 int orion_pcie_get_local_bus_nr(void __iomem *base) in orion_pcie_get_local_bus_nr()
82 void __init orion_pcie_set_local_bus_nr(void __iomem *base, int nr) in orion_pcie_set_local_bus_nr()
92 void __init orion_pcie_reset(void __iomem *base) in orion_pcie_reset()
123 static void __init orion_pcie_setup_wins(void __iomem *base) in orion_pcie_setup_wins()
181 void __init orion_pcie_setup(void __iomem *base) in orion_pcie_setup()
208 int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, in orion_pcie_rd_conf()
[all …]
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| /linux/drivers/block/ |
| H A D | swim.c | 63 #define swim_write(base, reg, v) out_8(&(base)->write_##reg, (v)) argument
64 #define swim_read(base, reg) in_8(&(base)->read_##reg) argument
87 #define iwm_write(base, reg, v) out_8(&(base)->reg, (v)) argument
88 #define iwm_read(base, reg) in_8(&(base)->reg) argument
211 struct swim __iomem *base; member
223 static inline void set_swim_mode(struct swim __iomem *base, int enable) in set_swim_mode()
248 static inline int get_swim_mode(struct swim __iomem *base) in get_swim_mode()
270 static inline void swim_select(struct swim __iomem *base, int sel) in swim_select()
279 static inline void swim_action(struct swim __iomem *base, int action) in swim_action()
295 static inline int swim_readbit(struct swim __iomem *base, int bit) in swim_readbit()
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