| /linux/drivers/net/wireless/quantenna/qtnfmac/pcie/ |
| H A D | pearl_pcie_regs.h | 8 #define PCIE_HDP_CTRL(base) ((base) + 0x2c00) argument 9 #define PCIE_HDP_AXI_CTRL(base) ((base) + 0x2c04) argument 10 #define PCIE_HDP_HOST_WR_DESC0(base) ((base) + 0x2c10) argument 11 #define PCIE_HDP_HOST_WR_DESC0_H(base) ((base) + 0x2c14) argument 12 #define PCIE_HDP_HOST_WR_DESC1(base) ((base) + 0x2c18) argument 13 #define PCIE_HDP_HOST_WR_DESC1_H(base) ((base) + 0x2c1c) argument 14 #define PCIE_HDP_HOST_WR_DESC2(base) ((base) + 0x2c20) argument 15 #define PCIE_HDP_HOST_WR_DESC2_H(base) ((base) + 0x2c24) argument 16 #define PCIE_HDP_HOST_WR_DESC3(base) ((base) + 0x2c28) argument 17 #define PCIE_HDP_HOST_WR_DESC4_H(base) ((base) + 0x2c2c) argument [all …]
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| H A D | topaz_pcie_regs.h | 8 #define PCIE_DMA_WR_INTR_STATUS(base) ((base) + 0x9bc) argument 9 #define PCIE_DMA_WR_INTR_MASK(base) ((base) + 0x9c4) argument 10 #define PCIE_DMA_WR_INTR_CLR(base) ((base) + 0x9c8) argument 11 #define PCIE_DMA_WR_ERR_STATUS(base) ((base) + 0x9cc) argument 12 #define PCIE_DMA_WR_DONE_IMWR_ADDR_LOW(base) ((base) + 0x9D0) argument 13 #define PCIE_DMA_WR_DONE_IMWR_ADDR_HIGH(base) ((base) + 0x9d4) argument 15 #define PCIE_DMA_RD_INTR_STATUS(base) ((base) + 0x310) argument 16 #define PCIE_DMA_RD_INTR_MASK(base) ((base) + 0x319) argument 17 #define PCIE_DMA_RD_INTR_CLR(base) ((base) + 0x31c) argument 18 #define PCIE_DMA_RD_ERR_STATUS_LOW(base) ((base) + 0x324) argument [all …]
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| /linux/drivers/scsi/ |
| H A D | nsp32_io.h | 12 static inline void nsp32_write1(unsigned int base, in nsp32_write1() 19 static inline unsigned char nsp32_read1(unsigned int base, in nsp32_read1() 25 static inline void nsp32_write2(unsigned int base, in nsp32_write2() 32 static inline unsigned short nsp32_read2(unsigned int base, in nsp32_read2() 38 static inline void nsp32_write4(unsigned int base, in nsp32_write4() 45 static inline unsigned long nsp32_read4(unsigned int base, in nsp32_read4() 53 static inline void nsp32_mmio_write1(unsigned long base, in nsp32_mmio_write1() 64 static inline unsigned char nsp32_mmio_read1(unsigned long base, in nsp32_mmio_read1() 74 static inline void nsp32_mmio_write2(unsigned long base, in nsp32_mmio_write2() 85 static inline unsigned short nsp32_mmio_read2(unsigned long base, in nsp32_mmio_read2() [all …]
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| H A D | aha1740.h | 19 #define HID0(base) (base + 0x0) argument 20 #define HID1(base) (base + 0x1) argument 21 #define HID2(base) (base + 0x2) argument 22 #define HID3(base) (base + 0x3) argument 23 #define EBCNTRL(base) (base + 0x4) argument 24 #define PORTADR(base) (base + 0x40) argument 25 #define BIOSADR(base) (base + 0x41) argument 26 #define INTDEF(base) (base + 0x42) argument 27 #define SCSIDEF(base) (base + 0x43) argument 28 #define BUSDEF(base) (base + 0x44) argument [all …]
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| /linux/arch/loongarch/lib/ |
| H A D | xor_simd.c | 19 #define LD(reg, base, offset) \ argument 21 #define ST(reg, base, offset) \ argument 25 #define LD_INOUT_LINE(base) \ argument 31 #define LD_AND_XOR_LINE(base) \ argument 41 #define ST_LINE(base) \ argument 62 #define LD(reg, base, offset) \ argument 64 #define ST(reg, base, offset) \ argument 68 #define LD_INOUT_LINE(base) \ argument 72 #define LD_AND_XOR_LINE(base) \ argument 78 #define ST_LINE(base) \ argument
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| /linux/arch/arm/mm/ |
| H A D | cache-l2x0.c | 66 static void l2c_write_sec(unsigned long val, void __iomem *base, unsigned reg) in l2c_write_sec() 81 static inline void l2c_set_debug(void __iomem *base, unsigned long val) in l2c_set_debug() 92 static inline void l2c_unlock(void __iomem *base, unsigned num) in l2c_unlock() 104 static void l2c_configure(void __iomem *base) in l2c_configure() 113 static void l2c_enable(void __iomem *base, unsigned num_lock) in l2c_enable() 135 void __iomem *base = l2x0_base; in l2c_disable() local 144 static void l2c_save(void __iomem *base) in l2c_save() 151 void __iomem *base = l2x0_base; in l2c_resume() local 174 static void __l2c210_cache_sync(void __iomem *base) in __l2c210_cache_sync() 190 void __iomem *base = l2x0_base; in l2c210_inv_range() local [all …]
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| /linux/lib/ |
| H A D | kstrtox.c | 26 const char *_parse_integer_fixup_radix(const char *s, unsigned int *base) in _parse_integer_fixup_radix() 52 unsigned int _parse_integer_limit(const char *s, unsigned int base, unsigned long long *p, in _parse_integer_limit() 91 unsigned int _parse_integer(const char *s, unsigned int base, unsigned long long *p) in _parse_integer() 96 static int _kstrtoull(const char *s, unsigned int base, unsigned long long *res) in _kstrtoull() 132 int kstrtoull(const char *s, unsigned int base, unsigned long long *res) in kstrtoull() 156 int kstrtoll(const char *s, unsigned int base, long long *res) in kstrtoll() 181 int _kstrtoul(const char *s, unsigned int base, unsigned long *res) in _kstrtoul() 197 int _kstrtol(const char *s, unsigned int base, long *res) in _kstrtol() 228 int kstrtouint(const char *s, unsigned int base, unsigned int *res) in kstrtouint() 259 int kstrtoint(const char *s, unsigned int base, int *res) in kstrtoint() [all …]
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| /linux/drivers/scsi/pcmcia/ |
| H A D | nsp_io.h | 30 static inline void nsp_write(unsigned int base, in nsp_write() 37 static inline unsigned char nsp_read(unsigned int base, in nsp_read() 75 static inline void nsp_fifo8_read(unsigned int base, in nsp_fifo8_read() 94 static inline void nsp_fifo16_read(unsigned int base, in nsp_fifo16_read() 113 static inline void nsp_fifo32_read(unsigned int base, in nsp_fifo32_read() 132 static inline void nsp_fifo8_write(unsigned int base, in nsp_fifo8_write() 150 static inline void nsp_fifo16_write(unsigned int base, in nsp_fifo16_write() 168 static inline void nsp_fifo32_write(unsigned int base, in nsp_fifo32_write() 178 static inline void nsp_mmio_write(unsigned long base, in nsp_mmio_write() 187 static inline unsigned char nsp_mmio_read(unsigned long base, in nsp_mmio_read() [all …]
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| /linux/arch/powerpc/kernel/ |
| H A D | fpu.S | 26 #define __REST_1FPVSR(n,c,base) \ argument 35 #define __REST_32FPVSRS(n,c,base) \ argument 44 #define __SAVE_32FPVSRS(n,c,base) \ argument 53 #define __REST_1FPVSR(n,b,base) REST_FPR(n, base) argument 54 #define __REST_32FPVSRS(n,b,base) REST_32FPRS(n, base) argument 55 #define __SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base) argument 57 #define REST_1FPVSR(n,c,base) __REST_1FPVSR(n,__REG_##c,__REG_##base) argument 58 #define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base) argument 59 #define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base) argument
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| H A D | tm.S | 20 #define __SAVE_32FPRS_VSRS(n,c,base) \ argument 28 #define __REST_32FPRS_VSRS(n,c,base) \ argument 37 #define __SAVE_32FPRS_VSRS(n,c,base) SAVE_32FPRS(n, base) argument 38 #define __REST_32FPRS_VSRS(n,c,base) REST_32FPRS(n, base) argument 40 #define SAVE_32FPRS_VSRS(n,c,base) \ argument 42 #define REST_32FPRS_VSRS(n,c,base) \ argument
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| /linux/arch/mips/alchemy/common/ |
| H A D | usb.c | 98 static inline void __au1300_usb_phyctl(void __iomem *base, int enable) in __au1300_usb_phyctl() 123 static inline void __au1300_ohci_control(void __iomem *base, int enable, int id) in __au1300_ohci_control() 163 static inline void __au1300_ehci_control(void __iomem *base, int enable) in __au1300_ehci_control() 204 static inline void __au1300_udc_control(void __iomem *base, int enable) in __au1300_udc_control() 235 static inline void __au1300_otg_control(void __iomem *base, int enable) in __au1300_otg_control() 267 void __iomem *base = in au1300_usb_control() local 295 void __iomem *base = in au1300_usb_init() local 316 static inline void __au1200_ohci_control(void __iomem *base, int enable) in __au1200_ohci_control() 330 static inline void __au1200_ehci_control(void __iomem *base, int enable) in __au1200_ehci_control() 346 static inline void __au1200_udc_control(void __iomem *base, int enable) in __au1200_udc_control() [all …]
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| H A D | irq.c | 291 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_unmask() local 301 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_unmask() local 311 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_mask() local 321 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_mask() local 331 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_ack() local 345 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_ack() local 359 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_maskack() local 371 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_maskack() local 432 void __iomem *base; in au1x_ic_settype() local 715 static inline void ic_init(void __iomem *base) in ic_init() [all …]
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| /linux/arch/arm/plat-orion/ |
| H A D | pcie.c | 55 u32 orion_pcie_dev_id(void __iomem *base) in orion_pcie_dev_id() 60 u32 orion_pcie_rev(void __iomem *base) in orion_pcie_rev() 65 int orion_pcie_link_up(void __iomem *base) in orion_pcie_link_up() 70 int __init orion_pcie_x4_mode(void __iomem *base) in orion_pcie_x4_mode() 75 int orion_pcie_get_local_bus_nr(void __iomem *base) in orion_pcie_get_local_bus_nr() 82 void __init orion_pcie_set_local_bus_nr(void __iomem *base, int nr) in orion_pcie_set_local_bus_nr() 92 void __init orion_pcie_reset(void __iomem *base) in orion_pcie_reset() 123 static void __init orion_pcie_setup_wins(void __iomem *base) in orion_pcie_setup_wins() 181 void __init orion_pcie_setup(void __iomem *base) in orion_pcie_setup() 208 int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, in orion_pcie_rd_conf() [all …]
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| /linux/drivers/clocksource/ |
| H A D | timer-rtl-otto.c | 57 static inline unsigned int rttm_get_counter(void __iomem *base) in rttm_get_counter() 62 static inline void rttm_set_period(void __iomem *base, unsigned int period) in rttm_set_period() 67 static inline void rttm_disable_timer(void __iomem *base) in rttm_disable_timer() 72 static inline void rttm_enable_timer(void __iomem *base, u32 mode, u32 divisor) in rttm_enable_timer() 77 static inline void rttm_ack_irq(void __iomem *base) in rttm_ack_irq() 82 static inline void rttm_enable_irq(void __iomem *base) in rttm_enable_irq() 87 static inline void rttm_disable_irq(void __iomem *base) in rttm_disable_irq() 93 #define RTTM_DEBUG(base) \ argument 109 static void rttm_bounce_timer(void __iomem *base, u32 mode) in rttm_bounce_timer() 125 static void rttm_stop_timer(void __iomem *base) in rttm_stop_timer() [all …]
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| H A D | timer-gx6605s.c | 28 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_interrupt() local 40 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_set_oneshot() local 55 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_set_next_event() local 69 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_shutdown() local 96 void __iomem *base; in gx6605s_sched_clock_read() local 103 static void gx6605s_clkevt_init(void __iomem *base) in gx6605s_clkevt_init() 112 static int gx6605s_clksrc_init(void __iomem *base) in gx6605s_clksrc_init()
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| H A D | timer-goldfish.c | 16 void __iomem *base; member 32 void __iomem *base = timerdrv->base; in goldfish_timer_read() local 51 void __iomem *base = timerdrv->base; in goldfish_timer_set_oneshot() local 63 void __iomem *base = timerdrv->base; in goldfish_timer_shutdown() local 74 void __iomem *base = timerdrv->base; in goldfish_timer_next_event() local 91 void __iomem *base = timerdrv->base; in goldfish_timer_irq() local 100 int __init goldfish_timer_init(int irq, void __iomem *base) in goldfish_timer_init()
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| /linux/drivers/gpu/drm/i915/ |
| H A D | i915_perf_oa_regs.h | 100 #define GEN12_OACTXCONTROL(base) _MMIO((base) + 0x360) argument 172 #define GEN12_OAM_MMIO_TRG(base) \ argument 175 #define GEN12_OAM_HEAD_POINTER(base) \ argument 177 #define GEN12_OAM_TAIL_POINTER(base) \ argument 179 #define GEN12_OAM_BUFFER(base) \ argument 181 #define GEN12_OAM_CONTEXT_CONTROL(base) \ argument 183 #define GEN12_OAM_CONTROL(base) \ argument 185 #define GEN12_OAM_DEBUG(base) \ argument 187 #define GEN12_OAM_STATUS(base) \ argument 192 #define GEN12_OAM_CEC0_0(base) \ argument [all …]
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| /linux/drivers/gpio/ |
| H A D | gpio-winbond.c | 131 unsigned long base; member 142 static int winbond_sio_enter(unsigned long base) in winbond_sio_enter() 157 static void winbond_sio_select_logical(unsigned long base, u8 dev) in winbond_sio_select_logical() 163 static void winbond_sio_leave(unsigned long base) in winbond_sio_leave() 170 static void winbond_sio_reg_write(unsigned long base, u8 reg, u8 data) in winbond_sio_reg_write() 176 static u8 winbond_sio_reg_read(unsigned long base, u8 reg) in winbond_sio_reg_read() 182 static void winbond_sio_reg_bset(unsigned long base, u8 reg, u8 bit) in winbond_sio_reg_bset() 191 static void winbond_sio_reg_bclear(unsigned long base, u8 reg, u8 bit) in winbond_sio_reg_bclear() 200 static bool winbond_sio_reg_btest(unsigned long base, u8 reg, u8 bit) in winbond_sio_reg_btest() 385 unsigned long *base = gpiochip_get_data(gc); in winbond_gpio_get() local [all …]
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| /linux/arch/loongarch/kernel/ |
| H A D | fpu.S | 29 .macro sc_save_fp base argument 64 .macro sc_restore_fp base argument 200 .macro sc_save_lsx base argument 237 .macro sc_restore_lsx base argument 274 .macro sc_save_lasx base argument 311 .macro sc_restore_lasx base argument
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| /linux/drivers/watchdog/ |
| H A D | nv_tco.h | 30 #define TCO_RLD(base) ((base) + 0x00) /* TCO Timer Reload and Current Value */ argument 31 #define TCO_TMR(base) ((base) + 0x01) /* TCO Timer Initial Value */ argument 33 #define TCO_STS(base) ((base) + 0x04) /* TCO Status Register */ argument 49 #define TCO_CNT(base) ((base) + 0x08) /* TCO Control Register */ argument 59 #define MCP51_SMI_EN(base) ((base) - 0x40 + 0x04) argument
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| /linux/drivers/rtc/ |
| H A D | rtc-goldfish.c | 17 void __iomem *base; member 28 void __iomem *base; in goldfish_rtc_read_alarm() local 57 void __iomem *base; in goldfish_rtc_set_alarm() local 84 void __iomem *base; in goldfish_rtc_alarm_irq_enable() local 101 void __iomem *base = rtcdrv->base; in goldfish_rtc_interrupt() local 113 void __iomem *base; in goldfish_rtc_read_time() local 135 void __iomem *base; in goldfish_rtc_set_time() local
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/ |
| H A D | busgf119.c | 28 struct nvkm_i2c_bus base; member 33 gf119_i2c_bus_drive_scl(struct nvkm_i2c_bus *base, int state) in gf119_i2c_bus_drive_scl() 41 gf119_i2c_bus_drive_sda(struct nvkm_i2c_bus *base, int state) in gf119_i2c_bus_drive_sda() 49 gf119_i2c_bus_sense_scl(struct nvkm_i2c_bus *base) in gf119_i2c_bus_sense_scl() 57 gf119_i2c_bus_sense_sda(struct nvkm_i2c_bus *base) in gf119_i2c_bus_sense_sda() 65 gf119_i2c_bus_init(struct nvkm_i2c_bus *base) in gf119_i2c_bus_init()
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| H A D | busnv50.c | 30 struct nvkm_i2c_bus base; member 36 nv50_i2c_bus_drive_scl(struct nvkm_i2c_bus *base, int state) in nv50_i2c_bus_drive_scl() 46 nv50_i2c_bus_drive_sda(struct nvkm_i2c_bus *base, int state) in nv50_i2c_bus_drive_sda() 56 nv50_i2c_bus_sense_scl(struct nvkm_i2c_bus *base) in nv50_i2c_bus_sense_scl() 64 nv50_i2c_bus_sense_sda(struct nvkm_i2c_bus *base) in nv50_i2c_bus_sense_sda() 72 nv50_i2c_bus_init(struct nvkm_i2c_bus *base) in nv50_i2c_bus_init()
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| /linux/drivers/irqchip/ |
| H A D | irq-vic.c | 62 void __iomem *base; member 88 static void vic_init2(void __iomem *base) in vic_init2() 103 void __iomem *base = vic->base; in resume_one_vic() local 133 void __iomem *base = vic->base; in suspend_one_vic() local 271 static void __init vic_register(void __iomem *base, unsigned int parent_irq, in vic_register() 312 void __iomem *base = irq_data_get_irq_chip_data(d); in vic_ack_irq() local 321 void __iomem *base = irq_data_get_irq_chip_data(d); in vic_mask_irq() local 328 void __iomem *base = irq_data_get_irq_chip_data(d); in vic_unmask_irq() local 379 static void __init vic_disable(void __iomem *base) in vic_disable() 388 static void __init vic_clear_interrupts(void __iomem *base) in vic_clear_interrupts() [all …]
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| /linux/drivers/net/ethernet/mellanox/mlxbf_gige/ |
| H A D | mlxbf_gige_rx.c | 16 void __iomem *base = priv->base; in mlxbf_gige_enable_multicast_rx() local 26 void __iomem *base = priv->base; in mlxbf_gige_disable_multicast_rx() local 37 void __iomem *base = priv->base; in mlxbf_gige_enable_mac_rx_filter() local 49 void __iomem *base = priv->base; in mlxbf_gige_disable_mac_rx_filter() local 61 void __iomem *base = priv->base; in mlxbf_gige_set_mac_rx_filter() local 71 void __iomem *base = priv->base; in mlxbf_gige_get_mac_rx_filter() local 80 void __iomem *base = priv->base; in mlxbf_gige_enable_promisc() local 99 void __iomem *base = priv->base; in mlxbf_gige_disable_promisc() local
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