| /linux/drivers/net/wireless/quantenna/qtnfmac/pcie/ |
| H A D | pearl_pcie_regs.h | 8 #define PCIE_HDP_CTRL(base) ((base) + 0x2c00) argument
9 #define PCIE_HDP_AXI_CTRL(base) ((base) + 0x2c04) argument
10 #define PCIE_HDP_HOST_WR_DESC0(base) ((base) + 0x2c10) argument
11 #define PCIE_HDP_HOST_WR_DESC0_H(base) ((base) + 0x2c14) argument
12 #define PCIE_HDP_HOST_WR_DESC1(base) ((base) + 0x2c18) argument
13 #define PCIE_HDP_HOST_WR_DESC1_H(base) ((base) + 0x2c1c) argument
14 #define PCIE_HDP_HOST_WR_DESC2(base) ((base) + 0x2c20) argument
15 #define PCIE_HDP_HOST_WR_DESC2_H(base) ((base) + 0x2c24) argument
16 #define PCIE_HDP_HOST_WR_DESC3(base) ((base) + 0x2c28) argument
17 #define PCIE_HDP_HOST_WR_DESC4_H(base) ((base) + 0x2c2c) argument
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| H A D | topaz_pcie_regs.h | 8 #define PCIE_DMA_WR_INTR_STATUS(base) ((base) + 0x9bc) argument
9 #define PCIE_DMA_WR_INTR_MASK(base) ((base) + 0x9c4) argument
10 #define PCIE_DMA_WR_INTR_CLR(base) ((base) + 0x9c8) argument
11 #define PCIE_DMA_WR_ERR_STATUS(base) ((base) + 0x9cc) argument
12 #define PCIE_DMA_WR_DONE_IMWR_ADDR_LOW(base) ((base) + 0x9D0) argument
13 #define PCIE_DMA_WR_DONE_IMWR_ADDR_HIGH(base) ((base) + 0x9d4) argument
15 #define PCIE_DMA_RD_INTR_STATUS(base) ((base) + 0x310) argument
16 #define PCIE_DMA_RD_INTR_MASK(base) ((base) + 0x319) argument
17 #define PCIE_DMA_RD_INTR_CLR(base) ((base) + 0x31c) argument
18 #define PCIE_DMA_RD_ERR_STATUS_LOW(base) ((base) + 0x324) argument
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| /linux/drivers/gpu/drm/sun4i/ |
| H A D | sun8i_vi_scaler.h | 30 #define SUN8I_SCALER_VSU_CTRL(base) ((base) + 0x0) argument
31 #define SUN50I_SCALER_VSU_SCALE_MODE(base) ((base) + 0x10) argument
32 #define SUN50I_SCALER_VSU_DIR_THR(base) ((base) + 0x20) argument
33 #define SUN50I_SCALER_VSU_EDGE_THR(base) ((base) + 0x24) argument
34 #define SUN50I_SCALER_VSU_EDSCL_CTRL(base) ((base) + 0x28) argument
35 #define SUN50I_SCALER_VSU_ANGLE_THR(base) ((base) + 0x2c) argument
36 #define SUN8I_SCALER_VSU_OUTSIZE(base) ((base) + 0x40) argument
37 #define SUN8I_SCALER_VSU_YINSIZE(base) ((base) + 0x80) argument
38 #define SUN8I_SCALER_VSU_YHSTEP(base) ((base) + 0x88) argument
39 #define SUN8I_SCALER_VSU_YVSTEP(base) ((base) + 0x8c) argument
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| H A D | sun8i_ui_layer.h | 17 #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR(base, layer) \ argument
19 #define SUN8I_MIXER_CHAN_UI_LAYER_SIZE(base, layer) \ argument
21 #define SUN8I_MIXER_CHAN_UI_LAYER_COORD(base, layer) \ argument
23 #define SUN8I_MIXER_CHAN_UI_LAYER_PITCH(base, layer) \ argument
25 #define SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(base, layer) \ argument
27 #define SUN8I_MIXER_CHAN_UI_LAYER_BOT_LADDR(base, layer) \ argument
29 #define SUN8I_MIXER_CHAN_UI_LAYER_FCOLOR(base, layer) \ argument
31 #define SUN8I_MIXER_CHAN_UI_TOP_HADDR(base) \ argument
33 #define SUN8I_MIXER_CHAN_UI_BOT_HADDR(base) \ argument
35 #define SUN8I_MIXER_CHAN_UI_OVL_SIZE(base) \ argument
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| H A D | sun8i_vi_layer.h | 11 #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR(base, layer) \ argument
13 #define SUN8I_MIXER_CHAN_VI_LAYER_SIZE(base, layer) \ argument
15 #define SUN8I_MIXER_CHAN_VI_LAYER_COORD(base, layer) \ argument
17 #define SUN8I_MIXER_CHAN_VI_LAYER_PITCH(base, layer, plane) \ argument
19 #define SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(base, layer, plane) \ argument
21 #define SUN8I_MIXER_CHAN_VI_OVL_SIZE(base) \ argument
23 #define SUN8I_MIXER_CHAN_VI_HDS_Y(base) \ argument
25 #define SUN8I_MIXER_CHAN_VI_HDS_UV(base) \ argument
27 #define SUN8I_MIXER_CHAN_VI_VDS_Y(base) \ argument
29 #define SUN8I_MIXER_CHAN_VI_VDS_UV(base) \ argument
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| H A D | sun8i_ui_scaler.h | 26 #define SUN8I_SCALER_GSU_CTRL(base) ((base) + 0x0) argument
27 #define SUN8I_SCALER_GSU_OUTSIZE(base) ((base) + 0x40) argument
28 #define SUN8I_SCALER_GSU_INSIZE(base) ((base) + 0x80) argument
29 #define SUN8I_SCALER_GSU_HSTEP(base) ((base) + 0x88) argument
30 #define SUN8I_SCALER_GSU_VSTEP(base) ((base) + 0x8c) argument
31 #define SUN8I_SCALER_GSU_HPHASE(base) ((base) + 0x90) argument
32 #define SUN8I_SCALER_GSU_VPHASE(base) ((base) + 0x98) argument
33 #define SUN8I_SCALER_GSU_HCOEFF(base, index) ((base) + 0x200 + 0x4 * (index)) argument
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| /linux/drivers/scsi/ |
| H A D | nsp32_io.h | 12 static inline void nsp32_write1(unsigned int base, in nsp32_write1()
19 static inline unsigned char nsp32_read1(unsigned int base, in nsp32_read1()
25 static inline void nsp32_write2(unsigned int base, in nsp32_write2()
32 static inline unsigned short nsp32_read2(unsigned int base, in nsp32_read2()
38 static inline void nsp32_write4(unsigned int base, in nsp32_write4()
45 static inline unsigned long nsp32_read4(unsigned int base, in nsp32_read4()
53 static inline void nsp32_mmio_write1(unsigned long base, in nsp32_mmio_write1()
64 static inline unsigned char nsp32_mmio_read1(unsigned long base, in nsp32_mmio_read1()
74 static inline void nsp32_mmio_write2(unsigned long base, in nsp32_mmio_write2()
85 static inline unsigned short nsp32_mmio_read2(unsigned long base, in nsp32_mmio_read2()
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| H A D | aha1740.h | 19 #define HID0(base) (base + 0x0) argument
20 #define HID1(base) (base + 0x1) argument
21 #define HID2(base) (base + 0x2) argument
22 #define HID3(base) (base + 0x3) argument
23 #define EBCNTRL(base) (base + 0x4) argument
24 #define PORTADR(base) (base + 0x40) argument
25 #define BIOSADR(base) (base + 0x41) argument
26 #define INTDEF(base) (base + 0x42) argument
27 #define SCSIDEF(base) (base + 0x43) argument
28 #define BUSDEF(base) (base + 0x44) argument
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| H A D | myrs.c | 106 void __iomem *base = cs->io_base; in myrs_qcmd() local
484 void __iomem *base = cs->io_base; in myrs_enable_mmio_mbox() local
2398 static inline void DAC960_GEM_hw_mbox_new_cmd(void __iomem *base) in DAC960_GEM_hw_mbox_new_cmd()
2405 static inline void DAC960_GEM_ack_hw_mbox_status(void __iomem *base) in DAC960_GEM_ack_hw_mbox_status()
2412 static inline void DAC960_GEM_reset_ctrl(void __iomem *base) in DAC960_GEM_reset_ctrl()
2419 static inline void DAC960_GEM_mem_mbox_new_cmd(void __iomem *base) in DAC960_GEM_mem_mbox_new_cmd()
2426 static inline bool DAC960_GEM_hw_mbox_is_full(void __iomem *base) in DAC960_GEM_hw_mbox_is_full()
2434 static inline bool DAC960_GEM_init_in_progress(void __iomem *base) in DAC960_GEM_init_in_progress()
2442 static inline void DAC960_GEM_ack_hw_mbox_intr(void __iomem *base) in DAC960_GEM_ack_hw_mbox_intr()
2449 static inline void DAC960_GEM_ack_intr(void __iomem *base) in DAC960_GEM_ack_intr()
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| /linux/arch/arm/mm/ |
| H A D | cache-l2x0.c | 65 static void l2c_write_sec(unsigned long val, void __iomem *base, unsigned reg) in l2c_write_sec()
80 static inline void l2c_set_debug(void __iomem *base, unsigned long val) in l2c_set_debug()
91 static inline void l2c_unlock(void __iomem *base, unsigned num) in l2c_unlock()
103 static void l2c_configure(void __iomem *base) in l2c_configure()
112 static void l2c_enable(void __iomem *base, unsigned num_lock) in l2c_enable()
134 void __iomem *base = l2x0_base; in l2c_disable() local
143 static void l2c_save(void __iomem *base) in l2c_save()
150 void __iomem *base = l2x0_base; in l2c_resume() local
173 static void __l2c210_cache_sync(void __iomem *base) in __l2c210_cache_sync()
189 void __iomem *base = l2x0_base; in l2c210_inv_range() local
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| /linux/arch/loongarch/lib/ |
| H A D | xor_simd.c | 19 #define LD(reg, base, offset) \ argument
21 #define ST(reg, base, offset) \ argument
25 #define LD_INOUT_LINE(base) \ argument
31 #define LD_AND_XOR_LINE(base) \ argument
41 #define ST_LINE(base) \ argument
62 #define LD(reg, base, offset) \ argument
64 #define ST(reg, base, offset) \ argument
68 #define LD_INOUT_LINE(base) \ argument
72 #define LD_AND_XOR_LINE(base) \ argument
78 #define ST_LINE(base) \ argument
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| /linux/lib/ |
| H A D | kstrtox.c | 26 const char *_parse_integer_fixup_radix(const char *s, unsigned int *base) in _parse_integer_fixup_radix()
52 unsigned int _parse_integer_limit(const char *s, unsigned int base, unsigned long long *p, in _parse_integer_limit()
91 unsigned int _parse_integer(const char *s, unsigned int base, unsigned long long *p) in _parse_integer()
96 static int _kstrtoull(const char *s, unsigned int base, unsigned long long *res) in _kstrtoull()
132 int kstrtoull(const char *s, unsigned int base, unsigned long long *res) in kstrtoull()
156 int kstrtoll(const char *s, unsigned int base, long long *res) in kstrtoll()
181 int _kstrtoul(const char *s, unsigned int base, unsigned long *res) in _kstrtoul()
197 int _kstrtol(const char *s, unsigned int base, long *res) in _kstrtol()
228 int kstrtouint(const char *s, unsigned int base, unsigned int *res) in kstrtouint()
259 int kstrtoint(const char *s, unsigned int base, int *res) in kstrtoint()
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| /linux/drivers/scsi/pcmcia/ |
| H A D | nsp_io.h | 30 static inline void nsp_write(unsigned int base, in nsp_write()
37 static inline unsigned char nsp_read(unsigned int base, in nsp_read()
75 static inline void nsp_fifo8_read(unsigned int base, in nsp_fifo8_read()
94 static inline void nsp_fifo16_read(unsigned int base, in nsp_fifo16_read()
113 static inline void nsp_fifo32_read(unsigned int base, in nsp_fifo32_read()
132 static inline void nsp_fifo8_write(unsigned int base, in nsp_fifo8_write()
150 static inline void nsp_fifo16_write(unsigned int base, in nsp_fifo16_write()
168 static inline void nsp_fifo32_write(unsigned int base, in nsp_fifo32_write()
178 static inline void nsp_mmio_write(unsigned long base, in nsp_mmio_write()
187 static inline unsigned char nsp_mmio_read(unsigned long base, in nsp_mmio_read()
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| /linux/arch/powerpc/kernel/ |
| H A D | fpu.S | 26 #define __REST_1FPVSR(n,c,base) \ argument
35 #define __REST_32FPVSRS(n,c,base) \ argument
44 #define __SAVE_32FPVSRS(n,c,base) \ argument
53 #define __REST_1FPVSR(n,b,base) REST_FPR(n, base) argument
54 #define __REST_32FPVSRS(n,b,base) REST_32FPRS(n, base) argument
55 #define __SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base) argument
57 #define REST_1FPVSR(n,c,base) __REST_1FPVSR(n,__REG_##c,__REG_##base) argument
58 #define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base) argument
59 #define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base) argument
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| H A D | tm.S | 20 #define __SAVE_32FPRS_VSRS(n,c,base) \ argument
28 #define __REST_32FPRS_VSRS(n,c,base) \ argument
37 #define __SAVE_32FPRS_VSRS(n,c,base) SAVE_32FPRS(n, base) argument
38 #define __REST_32FPRS_VSRS(n,c,base) REST_32FPRS(n, base) argument
40 #define SAVE_32FPRS_VSRS(n,c,base) \ argument
42 #define REST_32FPRS_VSRS(n,c,base) \ argument
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| /linux/drivers/s390/block/ |
| H A D | dasd_ioctl.c | 42 struct dasd_device *base; in dasd_ioctl_enable() local
63 struct dasd_device *base; in dasd_ioctl_disable() local
95 struct dasd_device *base; in dasd_ioctl_quiesce() local
116 struct dasd_device *base; in dasd_ioctl_resume() local
139 struct dasd_device *base; in dasd_ioctl_abortio() local
174 struct dasd_device *base; in dasd_ioctl_allowio() local
195 struct dasd_device *base; in dasd_format() local
233 struct dasd_device *base; in dasd_check_format() local
253 struct dasd_device *base; in dasd_ioctl_format() local
291 struct dasd_device *base; in dasd_ioctl_check_format() local
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| /linux/arch/mips/alchemy/common/ |
| H A D | usb.c | 98 static inline void __au1300_usb_phyctl(void __iomem *base, int enable) in __au1300_usb_phyctl()
123 static inline void __au1300_ohci_control(void __iomem *base, int enable, int id) in __au1300_ohci_control()
163 static inline void __au1300_ehci_control(void __iomem *base, int enable) in __au1300_ehci_control()
204 static inline void __au1300_udc_control(void __iomem *base, int enable) in __au1300_udc_control()
235 static inline void __au1300_otg_control(void __iomem *base, int enable) in __au1300_otg_control()
267 void __iomem *base = in au1300_usb_control() local
295 void __iomem *base = in au1300_usb_init() local
316 static inline void __au1200_ohci_control(void __iomem *base, int enable) in __au1200_ohci_control()
330 static inline void __au1200_ehci_control(void __iomem *base, int enable) in __au1200_ehci_control()
346 static inline void __au1200_udc_control(void __iomem *base, int enable) in __au1200_udc_control()
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| /linux/arch/arm/plat-orion/ |
| H A D | pcie.c | 55 u32 orion_pcie_dev_id(void __iomem *base) in orion_pcie_dev_id()
60 u32 orion_pcie_rev(void __iomem *base) in orion_pcie_rev()
65 int orion_pcie_link_up(void __iomem *base) in orion_pcie_link_up()
70 int __init orion_pcie_x4_mode(void __iomem *base) in orion_pcie_x4_mode()
75 int orion_pcie_get_local_bus_nr(void __iomem *base) in orion_pcie_get_local_bus_nr()
82 void __init orion_pcie_set_local_bus_nr(void __iomem *base, int nr) in orion_pcie_set_local_bus_nr()
92 void __init orion_pcie_reset(void __iomem *base) in orion_pcie_reset()
123 static void __init orion_pcie_setup_wins(void __iomem *base) in orion_pcie_setup_wins()
181 void __init orion_pcie_setup(void __iomem *base) in orion_pcie_setup()
208 int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, in orion_pcie_rd_conf()
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| /linux/drivers/clocksource/ |
| H A D | timer-rtl-otto.c | 57 static inline unsigned int rttm_get_counter(void __iomem *base) in rttm_get_counter()
62 static inline void rttm_set_period(void __iomem *base, unsigned int period) in rttm_set_period()
67 static inline void rttm_disable_timer(void __iomem *base) in rttm_disable_timer()
72 static inline void rttm_enable_timer(void __iomem *base, u32 mode, u32 divisor) in rttm_enable_timer()
77 static inline void rttm_ack_irq(void __iomem *base) in rttm_ack_irq()
82 static inline void rttm_enable_irq(void __iomem *base) in rttm_enable_irq()
87 static inline void rttm_disable_irq(void __iomem *base) in rttm_disable_irq()
93 #define RTTM_DEBUG(base) \ argument
109 static void rttm_bounce_timer(void __iomem *base, u32 mode) in rttm_bounce_timer()
125 static void rttm_stop_timer(void __iomem *base) in rttm_stop_timer()
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| H A D | timer-gx6605s.c | 28 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_interrupt() local
40 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_set_oneshot() local
55 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_set_next_event() local
69 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_shutdown() local
96 void __iomem *base; in gx6605s_sched_clock_read() local
103 static void gx6605s_clkevt_init(void __iomem *base) in gx6605s_clkevt_init()
112 static int gx6605s_clksrc_init(void __iomem *base) in gx6605s_clksrc_init()
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| H A D | timer-goldfish.c | 16 void __iomem *base; member
32 void __iomem *base = timerdrv->base; in goldfish_timer_read() local
51 void __iomem *base = timerdrv->base; in goldfish_timer_set_oneshot() local
63 void __iomem *base = timerdrv->base; in goldfish_timer_shutdown() local
74 void __iomem *base = timerdrv->base; in goldfish_timer_next_event() local
91 void __iomem *base = timerdrv->base; in goldfish_timer_irq() local
100 int __init goldfish_timer_init(int irq, void __iomem *base) in goldfish_timer_init()
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| /linux/drivers/gpu/drm/i915/ |
| H A D | i915_perf_oa_regs.h | 100 #define GEN12_OACTXCONTROL(base) _MMIO((base) + 0x360) argument
172 #define GEN12_OAM_MMIO_TRG(base) \ argument
175 #define GEN12_OAM_HEAD_POINTER(base) \ argument
177 #define GEN12_OAM_TAIL_POINTER(base) \ argument
179 #define GEN12_OAM_BUFFER(base) \ argument
181 #define GEN12_OAM_CONTEXT_CONTROL(base) \ argument
183 #define GEN12_OAM_CONTROL(base) \ argument
185 #define GEN12_OAM_DEBUG(base) \ argument
187 #define GEN12_OAM_STATUS(base) \ argument
192 #define GEN12_OAM_CEC0_0(base) \ argument
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| /linux/drivers/gpio/ |
| H A D | gpio-winbond.c | 131 unsigned long base; member
142 static int winbond_sio_enter(unsigned long base) in winbond_sio_enter()
157 static void winbond_sio_select_logical(unsigned long base, u8 dev) in winbond_sio_select_logical()
163 static void winbond_sio_leave(unsigned long base) in winbond_sio_leave()
170 static void winbond_sio_reg_write(unsigned long base, u8 reg, u8 data) in winbond_sio_reg_write()
176 static u8 winbond_sio_reg_read(unsigned long base, u8 reg) in winbond_sio_reg_read()
182 static void winbond_sio_reg_bset(unsigned long base, u8 reg, u8 bit) in winbond_sio_reg_bset()
191 static void winbond_sio_reg_bclear(unsigned long base, u8 reg, u8 bit) in winbond_sio_reg_bclear()
200 static bool winbond_sio_reg_btest(unsigned long base, u8 reg, u8 bit) in winbond_sio_reg_btest()
385 unsigned long *base = gpiochip_get_data(gc); in winbond_gpio_get() local
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| /linux/kernel/time/ |
| H A D | hrtimer.c | 113 static inline bool hrtimer_base_is_online(struct hrtimer_cpu_base *base) in hrtimer_base_is_online()
159 struct hrtimer_clock_base *base; in lock_hrtimer_base() local
215 static inline struct hrtimer_cpu_base *get_target_base(struct hrtimer_cpu_base *base, int pinned) in get_target_base()
243 switch_hrtimer_base(struct hrtimer *timer, struct hrtimer_clock_base *base, in switch_hrtimer_base()
297 struct hrtimer_clock_base *base = timer->base; in lock_hrtimer_base() local
501 #define for_each_active_base(base, cpu_base, active) \ argument
509 struct hrtimer_clock_base *base; in __hrtimer_next_event_base() local
627 static inline ktime_t hrtimer_update_base(struct hrtimer_cpu_base *base) in hrtimer_update_base()
732 struct hrtimer_cpu_base *base = this_cpu_ptr(&hrtimer_bases); in hrtimer_switch_to_hres() local
768 struct hrtimer_cpu_base *base = this_cpu_ptr(&hrtimer_bases); in retrigger_next_event() local
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| /linux/arch/loongarch/kernel/ |
| H A D | fpu.S | 29 .macro sc_save_fp base argument
64 .macro sc_restore_fp base argument
156 .macro sc_save_lsx base argument
193 .macro sc_restore_lsx base argument
230 .macro sc_save_lasx base argument
267 .macro sc_restore_lasx base argument
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