Lines Matching +full:0 +full:x401000
56 TEST_ASSERT(val == want, "%s; want '0x%x', got '0x%x'", msg, want, val);
62 GUEST_SYNC(0);
71 return __vcpu_run(vcpu) ? -errno : 0;
113 .size = 0x10000,
114 .alignment = 0x10000,
119 .size = NR_VCPUS * 0x20000,
120 .alignment = 0x10000,
125 .size = 0x1000,
126 .alignment = 0x1000,
131 .size = 0x2000,
132 .alignment = 0x1000,
139 * used hence the overlap. In the case of GICv3, A RDIST region is set at @0x0
140 * and a DIST region is set @0x70000. The GICv2 case sets a CPUIF @0x0 and a
141 * DIST region @0x1000.
165 addr = dist.alignment / 0x10;
170 addr = rdist.alignment / 0x10;
192 /* set REDIST base address @0x0*/
193 addr = 0x00000;
198 addr = 0xE0000;
207 addr = REDIST_REGION_ATTR_ADDR(NR_VCPUS, 0x100000, 0, 0);
233 addr = REDIST_REGION_ATTR_ADDR(NR_VCPUS, 0x100000, 2, 0);
236 TEST_ASSERT(ret && errno == EINVAL, "redist region attr value with flags != 0");
238 addr = REDIST_REGION_ATTR_ADDR(0, 0x100000, 0, 0);
241 TEST_ASSERT(ret && errno == EINVAL, "redist region attr value with count== 0");
243 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 1);
247 "attempt to register the first rdist region with index != 0");
249 addr = REDIST_REGION_ATTR_ADDR(2, 0x201000, 0, 1);
254 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 0);
258 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 1);
263 addr = REDIST_REGION_ATTR_ADDR(1, 0x210000, 0, 2);
269 addr = REDIST_REGION_ATTR_ADDR(1, 0x240000, 0, 2);
274 addr = REDIST_REGION_ATTR_ADDR(1, 0x240000, 0, 1);
278 addr = REDIST_REGION_ATTR_ADDR(1, max_phys_size, 0, 2);
285 addr = REDIST_REGION_ATTR_ADDR(2, max_phys_size - 0x30000, 0, 2);
291 addr = 0x260000;
299 * region 0 @ 0x200000 2 redists
300 * region 1 @ 0x240000 1 redist
304 addr = REDIST_REGION_ATTR_ADDR(0, 0, 0, 0);
305 expected_addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 0);
308 TEST_ASSERT(!ret && addr == expected_addr, "read characteristics of region #0");
310 addr = REDIST_REGION_ATTR_ADDR(0, 0, 0, 1);
311 expected_addr = REDIST_REGION_ATTR_ADDR(1, 0x240000, 0, 1);
316 addr = REDIST_REGION_ATTR_ADDR(0, 0, 0, 2);
321 addr = 0x260000;
325 addr = REDIST_REGION_ATTR_ADDR(1, 0x260000, 0, 2);
376 #define GIC_CPU_CTRL 0x00
381 u64 val = 0;
388 KVM_VGIC_V2_ATTR(GIC_CPU_CTRL, 0));
393 KVM_VGIC_V2_ATTR(GIC_CPU_CTRL, 0), &val);
398 KVM_VGIC_V2_ATTR(GIC_CPU_CTRL, 0), &val);
428 addr = REDIST_REGION_ATTR_ADDR(1, 0x280000, 0, 2);
447 addr = REDIST_REGION_ATTR_ADDR(1, 0x280000, 0, 2);
467 (void)vm_vcpu_add(v.vm, 0, guest_code);
486 for (i = 0; i < NR_VCPUS ; i++) {
487 v3_redist_reg_get(v.gic_fd, i, GICR_TYPER, i * 0x100,
491 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 0);
495 /* The 2 first rdists should be put there (vcpu 0 and 3) */
496 v3_redist_reg_get(v.gic_fd, 0, GICR_TYPER, 0x0, "read typer of rdist #0");
497 v3_redist_reg_get(v.gic_fd, 3, GICR_TYPER, 0x310, "read typer of rdist #1");
499 addr = REDIST_REGION_ATTR_ADDR(10, 0x100000, 0, 1);
504 v3_redist_reg_get(v.gic_fd, 1, GICR_TYPER, 0x100,
506 v3_redist_reg_get(v.gic_fd, 2, GICR_TYPER, 0x200,
509 addr = REDIST_REGION_ATTR_ADDR(10, 0x20000, 0, 1);
513 v3_redist_reg_get(v.gic_fd, 1, GICR_TYPER, 0x100, "read typer of rdist #1");
514 v3_redist_reg_get(v.gic_fd, 2, GICR_TYPER, 0x210,
527 for (i = 0; i < nr_vcpus; i++)
538 * rdist region #0 @0x100000 2 rdist capacity
539 * rdists: 0, 3 (Last)
540 * rdist region #1 @0x240000 2 rdist capacity
542 * rdist region #2 @0x200000 2 rdist capacity
547 uint32_t vcpuids[] = { 0, 3, 5, 4, 1, 2 };
556 addr = REDIST_REGION_ATTR_ADDR(2, 0x100000, 0, 0);
560 addr = REDIST_REGION_ATTR_ADDR(2, 0x240000, 0, 1);
564 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 2);
568 v3_redist_reg_get(v.gic_fd, 0, GICR_TYPER, 0x000, "read typer of rdist #0");
569 v3_redist_reg_get(v.gic_fd, 1, GICR_TYPER, 0x100, "read typer of rdist #1");
570 v3_redist_reg_get(v.gic_fd, 2, GICR_TYPER, 0x200, "read typer of rdist #2");
571 v3_redist_reg_get(v.gic_fd, 3, GICR_TYPER, 0x310, "read typer of rdist #3");
572 v3_redist_reg_get(v.gic_fd, 5, GICR_TYPER, 0x500, "read typer of rdist #5");
573 v3_redist_reg_get(v.gic_fd, 4, GICR_TYPER, 0x410, "read typer of rdist #4");
581 uint32_t vcpuids[] = { 0, 3, 5, 4, 1, 2 };
590 addr = 0x10000;
594 v3_redist_reg_get(v.gic_fd, 0, GICR_TYPER, 0x000, "read typer of rdist #0");
595 v3_redist_reg_get(v.gic_fd, 3, GICR_TYPER, 0x300, "read typer of rdist #1");
596 v3_redist_reg_get(v.gic_fd, 5, GICR_TYPER, 0x500, "read typer of rdist #2");
597 v3_redist_reg_get(v.gic_fd, 1, GICR_TYPER, 0x100, "read typer of rdist #3");
598 v3_redist_reg_get(v.gic_fd, 2, GICR_TYPER, 0x210, "read typer of rdist #3");
614 addr = max_phys_size - (3 * 2 * 0x10000);
618 addr = 0x00000;
647 addr = 0x401000;
659 addr = max_phys_size - 0x10000;
666 addr = 0x400000;
670 addr = 0x300000;
718 * Returns 0 if it's possible to create GIC device of a given type (V2 or V3).
730 ret = __kvm_test_create_device(v.vm, 0);
740 TEST_ASSERT(ret < 0 && errno == EEXIST, "create GIC device twice");
748 TEST_ASSERT(ret < 0 && (errno == EINVAL || errno == EEXIST),
754 return 0;
827 for (int i = 0; i < nr; i++) {
832 /* Assume MPIDR_EL1.Aff*=0 */
846 TEST_ASSERT(ret == 0, "%s unavailable", sr[i].name);
851 TEST_ASSERT(ret == 0 || !check(gic, &sr[i], "read"), "%s unreadable", sr[i].name);
854 TEST_ASSERT(ret == 0 || !check(gic, &sr[i], "write"), "%s unwritable", sr[i].name);
866 TEST_ASSERT(ret == 0, "ICC_CTLR_EL1 unreadable");
887 return 0;
894 return 0;
905 TEST_ASSERT(ret == 0, "ICH_VTR_EL2 unreadable");
933 return 0;
941 u32 feat = 0;
950 init.features[0] |= feat;
952 vcpu = aarch64_vcpu_add(vm, 0, &init, NULL);
956 TEST_ASSERT(gic >= 0, "No GIC???");
995 int cnt_impl = 0;
1020 return 0;