Lines Matching full:000
22 /* offset=0 */ "software\000"
23 /* offset=9 */ "cpu-clock\000software\000Per-CPU high-resolution timer based event\000config=0\000\…
24 …* offset=87 */ "task-clock\000software\000Per-task high-resolution timer based event\000config=1\0…
25 …t=167 */ "faults\000software\000Number of page faults [This event is an alias of page-faults]\000c…
26 …262 */ "page-faults\000software\000Number of page faults [This event is an alias of faults]\000con…
27 … "context-switches\000software\000Number of context switches [This event is an alias of cs]\000con…
28 …=458 */ "cs\000software\000Number of context switches [This event is an alias of context-switches]…
29 …ns\000software\000Number of times a process has migrated to a new CPU [This event is an alias of m…
30 …\000software\000Number of times a process has migrated to a new CPU [This event is an alias of cpu…
31 …minor-faults\000software\000Number of minor page faults. Minor faults don't require I/O to handle\…
32 …/ "major-faults\000software\000Number of major page faults. Major faults require I/O to handle\000…
33 …35 */ "alignment-faults\000software\000Number of kernel handled memory alignment faults\000config=…
34 …aults\000software\000Number of kernel handled unimplemented instruction faults handled through emu…
35 …* offset=1254 */ "dummy\000software\000A placeholder event that doesn't count anything\000config=9…
36 … */ "bpf-output\000software\000An event used by BPF programs to write to the perf ring buffer\000c…
37 … "cgroup-switches\000software\000Number of context switches to a task in a different cgroup\000con…
38 /* offset=1539 */ "tool\000"
39 …offset=1544 */ "duration_time\000tool\000Wall clock interval time in nanoseconds\000config=1\000\0…
40 /* offset=1620 */ "user_time\000tool\000User (non-kernel) time in nanoseconds\000config=2\000\00000…
41 /* offset=1690 */ "system_time\000tool\000System/kernel time in nanoseconds\000config=3\000\00000\0…
42 /* offset=1758 */ "has_pmem\000tool\0001 if persistent memory installed otherwise 0\000config=4\000…
43 …000tool\000Number of cores. A core consists of 1 or more thread, with each thread being associated…
44 … */ "num_cpus\000tool\000Number of logical Linux CPUs. There may be multiple such CPUs on a core\0…
45 …pus_online\000tool\000Number of online logical Linux CPUs. There may be multiple such CPUs on a co…
46 /* offset=2199 */ "num_dies\000tool\000Number of dies. Each die has 1 or more cores\000config=8\000…
47 …et=2275 */ "num_packages\000tool\000Number of packages. Each package has 1 or more die\000config=9…
48 …/ "slots\000tool\000Number of functional units that in parallel can execute parts of an instructio…
49 …*/ "smt_on\000tool\0001 if simultaneous multithreading (aka hyperthreading) is enable otherwise 0\…
50 …*/ "system_tsc_freq\000tool\000The amount a Time Stamp Counter (TSC) increases per second\000confi…
51 /* offset=2677 */ "default_core\000"
52 /* offset=2690 */ "bp_l1_btb_correct\000branch\000L1 BTB Correction\000event=0x8a\000\00000\000\000…
53 /* offset=2752 */ "bp_l2_btb_correct\000branch\000L2 BTB Correction\000event=0x8b\000\00000\000\000…
54 …4 */ "l3_cache_rd\000cache\000L3 cache access, read\000event=0x40\000\00000\000\000\000\000Attribu…
55 …egment_reg_loads.any\000other\000Number of segment register loads\000event=6,period=200000,umask=0…
56 ….any\000other\000Memory cluster signals to block micro-op dispatch for any reason\000event=9,perio…
57 …t_trans\000other\000Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions\000event=0…
58 /* offset=3265 */ "hisi_sccl,ddrc\000"
59 …set=3280 */ "uncore_hisi_ddrc.flux_wcmd\000uncore\000DDRC write commands\000event=2\000\00000\000\…
60 /* offset=3350 */ "uncore_cbox\000"
61 …n\000uncore\000A cross-core snoop resulted from L3 Eviction which misses in some processor core\00…
62 /* offset=3516 */ "event-hyphen\000uncore\000UNC_CBO_HYPHEN\000event=0xe0\000\00000\000\000\000\000…
63 /* offset=3570 */ "event-two-hyph\000uncore\000UNC_CBO_TWO_HYPH\000event=0xc0\000\00000\000\000\000…
64 /* offset=3628 */ "hisi_sccl,l3c\000"
65 …set=3642 */ "uncore_hisi_l3c.rd_hit_cpipe\000uncore\000Total read hits\000event=7\000\00000\000\00…
66 /* offset=3710 */ "uncore_imc_free_running\000"
67 …*/ "uncore_imc_free_running.cache_miss\000uncore\000Total cache misses\000event=0x12\000\00000\000…
68 /* offset=3814 */ "uncore_imc\000"
69 …* offset=3825 */ "uncore_imc.cache_hits\000uncore\000Total cache hits\000event=0x34\000\00000\000\…
70 /* offset=3890 */ "uncore_sys_ddr_pmu\000"
71 …t=3909 */ "sys_ddr_pmu.write_cycles\000uncore\000ddr write-cycles event\000event=0x2b\000v8\00000\…
72 /* offset=3985 */ "uncore_sys_ccn_pmu\000"
73 …t=4004 */ "sys_ccn_pmu.read_cycles\000uncore\000ccn read-cycles event\000config=0x2c\0000x01\00000…
74 /* offset=4081 */ "uncore_sys_cmn_pmu\000"
75 …ss\000uncore\000Counts total cache misses in first lookup result (high priority)\000eventid=1,type…
76 /* offset=4243 */ "CPI\000\0001 / IPC\000\000\000\000\000\000\000\00000"
77 /* offset=4265 */ "IPC\000group1\000inst_retired.any / cpu_clk_unhalted.thread\000\000\000\000\000\…
78 …000\000idq_uops_not_delivered.core / (4 * (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one…
79 /* offset=4494 */ "dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_retired.any\000\000\000\000\0…
80 /* offset=4558 */ "icache_miss_cycles\000\000l1i\\-loads\\-misses / inst_retired.any\000\000\000\00…
81 /* offset=4625 */ "cache_miss_cycles\000group1\000dcache_miss_cpi + icache_miss_cycles\000\000\000\…
82 …696 */ "DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit + l2_rqsts.pf_hit + l2_rqsts.rfo_hit…
83 …l_Miss\000\000max(l2_rqsts.all_demand_data_rd - l2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss…
84 /* offset=4924 */ "DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_All_Miss\000\000\000\000\000…
85 /* offset=4988 */ "DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCache_L2_All)\000\000\000\000…
86 /* offset=5056 */ "DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, DCache_L2_All)\000\000\000\0…
87 /* offset=5126 */ "M1\000\000ipc + M2\000\000\000\000\000\000\000\00000"
88 /* offset=5148 */ "M2\000\000ipc + M1\000\000\000\000\000\000\000\00000"
89 /* offset=5170 */ "M3\000\0001 / M3\000\000\000\000\000\000\000\00000"
90 /* offset=5190 */ "L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 / duration_time\000\000\000\…
94 … }, /* alignment-faults\000software\000Number of kernel handled memory alignment faults\000config=…
95 …, /* bpf-output\000software\000An event used by BPF programs to write to the perf ring buffer\000c…
96 …* cgroup-switches\000software\000Number of context switches to a task in a different cgroup\000con…
97 …* context-switches\000software\000Number of context switches [This event is an alias of cs]\000con…
98 { 9 }, /* cpu-clock\000software\000Per-CPU high-resolution timer based event\000config=0\000\00000\…
99 …ns\000software\000Number of times a process has migrated to a new CPU [This event is an alias of m…
100 …58 }, /* cs\000software\000Number of context switches [This event is an alias of context-switches]…
101 { 1254 }, /* dummy\000software\000A placeholder event that doesn't count anything\000config=9\000\0…
102 …aults\000software\000Number of kernel handled unimplemented instruction faults handled through emu…
103 …167 }, /* faults\000software\000Number of page faults [This event is an alias of page-faults]\000c…
104 …/* major-faults\000software\000Number of major page faults. Major faults require I/O to handle\000…
105 …\000software\000Number of times a process has migrated to a new CPU [This event is an alias of cpu…
106 …minor-faults\000software\000Number of minor page faults. Minor faults don't require I/O to handle\…
107 …2 }, /* page-faults\000software\000Number of page faults [This event is an alias of faults]\000con…
108 { 87 }, /* task-clock\000software\000Per-task high-resolution timer based event\000config=1\000\000…
111 { 1544 }, /* duration_time\000tool\000Wall clock interval time in nanoseconds\000config=1\000\00000…
112 { 1758 }, /* has_pmem\000tool\0001 if persistent memory installed otherwise 0\000config=4\000\00000…
113 …000tool\000Number of cores. A core consists of 1 or more thread, with each thread being associated…
114 …, /* num_cpus\000tool\000Number of logical Linux CPUs. There may be multiple such CPUs on a core\0…
115 …pus_online\000tool\000Number of online logical Linux CPUs. There may be multiple such CPUs on a co…
116 { 2199 }, /* num_dies\000tool\000Number of dies. Each die has 1 or more cores\000config=8\000\00000…
117 … 2275 }, /* num_packages\000tool\000Number of packages. Each package has 1 or more die\000config=9…
118 …/* slots\000tool\000Number of functional units that in parallel can execute parts of an instructio…
119 … /* smt_on\000tool\0001 if simultaneous multithreading (aka hyperthreading) is enable otherwise 0\…
120 { 1690 }, /* system_time\000tool\000System/kernel time in nanoseconds\000config=3\000\00000\000\000…
121 … /* system_tsc_freq\000tool\000The amount a Time Stamp Counter (TSC) increases per second\000confi…
122 { 1620 }, /* user_time\000tool\000User (non-kernel) time in nanoseconds\000config=2\000\00000\000\0…
130 .pmu_name = { 0 /* software\000 */ },
135 .pmu_name = { 1539 /* tool\000 */ },
140 { 2690 }, /* bp_l1_btb_correct\000branch\000L1 BTB Correction\000event=0x8a\000\00000\000\000\000\0…
141 { 2752 }, /* bp_l2_btb_correct\000branch\000L2 BTB Correction\000event=0x8b\000\00000\000\000\000\0…
142 ….any\000other\000Memory cluster signals to block micro-op dispatch for any reason\000event=9,perio…
143 …t_trans\000other\000Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions\000event=0…
144 …}, /* l3_cache_rd\000cache\000L3 cache access, read\000event=0x40\000\00000\000\000\000\000Attribu…
145 …egment_reg_loads.any\000other\000Number of segment register loads\000event=6,period=200000,umask=0…
148 { 3280 }, /* uncore_hisi_ddrc.flux_wcmd\000uncore\000DDRC write commands\000event=2\000\00000\000\0…
151 { 3642 }, /* uncore_hisi_l3c.rd_hit_cpipe\000uncore\000Total read hits\000event=7\000\00000\000\000…
154 { 3516 }, /* event-hyphen\000uncore\000UNC_CBO_HYPHEN\000event=0xe0\000\00000\000\000\000\000\000 */
155 { 3570 }, /* event-two-hyph\000uncore\000UNC_CBO_TWO_HYPH\000event=0xc0\000\00000\000\000\000\000\0…
156 …n\000uncore\000A cross-core snoop resulted from L3 Eviction which misses in some processor core\00…
159 { 3825 }, /* uncore_imc.cache_hits\000uncore\000Total cache hits\000event=0x34\000\00000\000\000\00…
162 … /* uncore_imc_free_running.cache_miss\000uncore\000Total cache misses\000event=0x12\000\00000\000…
170 .pmu_name = { 2677 /* default_core\000 */ },
175 .pmu_name = { 3265 /* hisi_sccl,ddrc\000 */ },
180 .pmu_name = { 3628 /* hisi_sccl,l3c\000 */ },
185 .pmu_name = { 3350 /* uncore_cbox\000 */ },
190 .pmu_name = { 3814 /* uncore_imc\000 */ },
195 .pmu_name = { 3710 /* uncore_imc_free_running\000 */ },
200 { 4243 }, /* CPI\000\0001 / IPC\000\000\000\000\000\000\000\00000 */
201 { 4924 }, /* DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_All_Miss\000\000\000\000\000\000\0…
202 …6 }, /* DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit + l2_rqsts.pf_hit + l2_rqsts.rfo_hit…
203 …l_Miss\000\000max(l2_rqsts.all_demand_data_rd - l2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss…
204 { 4988 }, /* DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCache_L2_All)\000\000\000\000\000\0…
205 { 5056 }, /* DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, DCache_L2_All)\000\000\000\000\000…
206 …000\000idq_uops_not_delivered.core / (4 * (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one…
207 { 4265 }, /* IPC\000group1\000inst_retired.any / cpu_clk_unhalted.thread\000\000\000\000\000\000\00…
208 { 5190 }, /* L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 / duration_time\000\000\000\000\00…
209 { 5126 }, /* M1\000\000ipc + M2\000\000\000\000\000\000\000\00000 */
210 { 5148 }, /* M2\000\000ipc + M1\000\000\000\000\000\000\000\00000 */
211 { 5170 }, /* M3\000\0001 / M3\000\000\000\000\000\000\000\00000 */
212 { 4625 }, /* cache_miss_cycles\000group1\000dcache_miss_cpi + icache_miss_cycles\000\000\000\000\00…
213 { 4494 }, /* dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000…
214 { 4558 }, /* icache_miss_cycles\000\000l1i\\-loads\\-misses / inst_retired.any\000\000\000\000\000\…
222 .pmu_name = { 2677 /* default_core\000 */ },
227 …4004 }, /* sys_ccn_pmu.read_cycles\000uncore\000ccn read-cycles event\000config=0x2c\0000x01\00000…
230 …ss\000uncore\000Counts total cache misses in first lookup result (high priority)\000eventid=1,type…
233 …3909 }, /* sys_ddr_pmu.write_cycles\000uncore\000ddr write-cycles event\000event=0x2b\000v8\00000\…
241 .pmu_name = { 3985 /* uncore_sys_ccn_pmu\000 */ },
246 .pmu_name = { 4081 /* uncore_sys_cmn_pmu\000 */ },
251 .pmu_name = { 3890 /* uncore_sys_ddr_pmu\000 */ },