Lines Matching +full:software +full:- +full:initiated

7 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",
45 …-demand loads and gets hit at least once by demand. The valid outstanding interval is defined unti…
78 …"BriefDescription": "Non-modified cache lines that are silently dropped by L2 cache when triggered…
82 …y an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.",
100 …quests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses t…
136 …"PublicDescription": "Counts the number of demand Data Read requests initiated by load instruction…
145 …ublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss exc…
150         "BriefDescription": "Read requests with true-miss in L2 cache",
154 …ublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss exc…
163 …"PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excl…
172         "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",
181         "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",
190 …"PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFET…
199 …"PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFE…
222 …"BriefDescription": "Core-originated cacheable requests that missed L3  (Except hardware prefetche…
226 … "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Reques…
259         "PublicDescription": "Counts all retired memory instructions - loads and stores.",
303 …"PublicDescription": "Number of retired load instructions that (start a) miss in the 2nd-level TLB…
314 …"PublicDescription": "Number of retired store instructions that (start a) miss in the 2nd-level TL…
319 …"BriefDescription": "Snoop hit a modified(HITM) or clean line(HIT_W_FWD) in another on-pkg core wh…
325 …"PublicDescription": "Counts retired load instructions where a cross-core snoop hit in another cor…
330 …tired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core …
336 …tired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core …
352 …"BriefDescription": "Snoop hit without forwarding in another on-pkg core due to a retired load ins…
358 …unts retired load instructions in which the L3 supplied the data and a cross-core snoop hit in ano…
369 …ired instructions with at least one load to uncacheable memory-type, or at least one cache-line sp…
374 …hit the FB(fill buffer), because a preceding miss to the same cacheline initiated the line to be b…
471 …"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for …
494 … "Counts memory transactions reached the super queue including requests initiated by the core, all…
521 …ng state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corr…
531 …ng state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corr…
541 …utstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation).",
556 …      "BriefDescription": "Demand Data Read transactions pending for off-core. Highly correlated.",
560 …-core outstanding Demand Data Read transactions every cycle. A transaction is considered to be in …
574         "BriefDescription": "Store Read transactions pending for off-core. Highly correlated.",
578 … number of off-core outstanding read-for-ownership (RFO) store transactions every cycle. An RFO tr…