Lines Matching +full:3 +full:- +full:point

3 …riefDescription": "Counts once for most SIMD 128-bit packed computational double precision floatin…
4 "Counter": "0,1,2,3",
7-bit packed computational double precision floating-point instructions retired; some instructions …
12 …riefDescription": "Counts once for most SIMD 128-bit packed computational single precision floatin…
13 "Counter": "0,1,2,3",
16-bit packed computational single precision floating-point instructions retired; some instructions …
21 …riefDescription": "Counts once for most SIMD 256-bit packed double computational precision floatin…
22 "Counter": "0,1,2,3",
25-bit packed double computational precision floating-point instructions retired; some instructions …
30 …riefDescription": "Counts once for most SIMD 256-bit packed single computational precision floatin…
31 "Counter": "0,1,2,3",
34-bit packed single computational precision floating-point instructions retired; some instructions …
39 …"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed doub…
40 "Counter": "0,1,2,3",
43-bit packed single precision and 256-bit packed double precision floating-point instructions reti…
48 …"BriefDescription": "Counts once for most SIMD scalar computational floating-point instructions re…
49 "Counter": "0,1,2,3",
52-point instructions retired; some instructions will count twice as noted below. Each count repres…
57 …"Counts once for most SIMD scalar computational double precision floating-point instructions retir…
58 "Counter": "0,1,2,3",
61-point instructions retired; some instructions will count twice as noted below. Each count repres…
66 …"Counts once for most SIMD scalar computational single precision floating-point instructions retir…
67 "Counter": "0,1,2,3",
70-point instructions retired; some instructions will count twice as noted below. Each count repres…
76 "Counter": "0,1,2,3",
84 "Counter": "0,1,2,3",