Lines Matching +full:0 +full:x13

4         "Counter": "0,1,2,3",
5         "EventCode": "0x12",
7 …ds that miss the DTLB (Data TLB) and hit the STLB (Second level TLB). Available PDIST counters: 0",
9         "UMask": "0x20"
13         "Counter": "0,1,2,3",
15         "EventCode": "0x12",
17 …e PMH (Page Miss Handler) is busy with a page walk for a demand load. Available PDIST counters: 0",
19         "UMask": "0x10"
23         "Counter": "0,1,2,3",
24         "EventCode": "0x12",
26 …further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",
28         "UMask": "0xe"
32         "Counter": "0,1,2,3",
33         "EventCode": "0x12",
35 …further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",
37         "UMask": "0x8"
41         "Counter": "0,1,2,3",
42         "EventCode": "0x12",
44 …further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",
46         "UMask": "0x4"
50         "Counter": "0,1,2,3",
51         "EventCode": "0x12",
53 …further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",
55         "UMask": "0x2"
59         "Counter": "0,1,2,3",
60         "EventCode": "0x12",
62 …standing for a demand load in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",
64         "UMask": "0x10"
68         "Counter": "0,1,2,3",
69         "EventCode": "0x13",
71 …tores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB). Available PDIST counters: 0",
73         "UMask": "0x20"
77         "Counter": "0,1,2,3",
79         "EventCode": "0x13",
81 …ast one PMH (Page Miss Handler) is busy with a page walk for a store. Available PDIST counters: 0",
83         "UMask": "0x10"
87         "Counter": "0,1,2,3",
88         "EventCode": "0x13",
90 …further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",
92         "UMask": "0xe"
96         "Counter": "0,1,2,3",
97         "EventCode": "0x13",
99 …further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",
101         "UMask": "0x8"
105         "Counter": "0,1,2,3",
106         "EventCode": "0x13",
108 …further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",
110         "UMask": "0x4"
114         "Counter": "0,1,2,3",
115         "EventCode": "0x13",
117 …further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",
119         "UMask": "0x2"
123         "Counter": "0,1,2,3",
124         "EventCode": "0x13",
126 …ks outstanding for a store in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",
128         "UMask": "0x10"
132         "Counter": "0,1,2,3",
133         "EventCode": "0x11",
135 … miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB). Available PDIST counters: 0",
137         "UMask": "0x20"
141         "Counter": "0,1,2,3",
143         "EventCode": "0x11",
145 …ler) is busy with a page walk for a code (instruction fetch) request. Available PDIST counters: 0",
147         "UMask": "0x10"
151         "Counter": "0,1,2,3",
152         "EventCode": "0x11",
154 …further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",
156         "UMask": "0xe"
160         "Counter": "0,1,2,3",
161         "EventCode": "0x11",
163 …further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",
165         "UMask": "0x4"
169         "Counter": "0,1,2,3",
170         "EventCode": "0x11",
172 …further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",
174         "UMask": "0x2"
178         "Counter": "0,1,2,3",
179         "EventCode": "0x11",
181 …instruction fetch) request in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",
183         "UMask": "0x10"