Lines Matching +full:1 +full:- +full:3
4 "Counter": "0,1,2,3",
12 "Counter": "0,1,2,3",
13 "CounterMask": "1",
14 "EdgeDetect": "1",
17 "Invert": "1",
23 "Counter": "0,1,2,3",
31 "Counter": "0,1,2,3",
39 "Counter": "0,1,2,3",
47 "Counter": "0,1,2,3",
55 "Counter": "0,1,2,3",
63 "Counter": "0,1,2,3",
71 "Counter": "0,1,2,3",
79 "Counter": "0,1,2,3",
87 "Counter": "0,1,2,3",
95 "Counter": "0,1,2,3",
103 "Counter": "0,1,2,3",
111 "Counter": "0,1,2,3",
119 "Counter": "0,1,2,3",
127 "Counter": "0,1,2,3",
135 "Counter": "0,1,2,3",
143 "Counter": "0,1,2,3",
151 "Counter": "0,1,2,3",
159 "Counter": "0,1,2,3",
167 "Counter": "0,1,2,3",
170 "PEBS": "1",
176 "Counter": "0,1,2,3",
179 "PEBS": "1",
185 "Counter": "0,1,2,3",
188 "PEBS": "1",
194 "Counter": "0,1,2,3",
202 "Counter": "0,1,2,3",
210 "Counter": "0,1,2,3",
218 "Counter": "0,1,2,3",
226 "Counter": "0,1,2,3",
234 "Counter": "0,1,2,3",
242 "Counter": "0,1,2,3",
250 "Counter": "0,1,2,3",
258 "Counter": "0,1,2,3",
266 "Counter": "0,1,2,3",
274 "Counter": "0,1,2,3",
277 "PEBS": "1",
283 "Counter": "Fixed counter 3",
289 "Counter": "0,1,2,3",
303 "Counter": "0,1,2,3",
310 "Counter": "0,1,2,3",
314 "Invert": "1",
319 "Counter": "0,1,2,3",
327 "Counter": "0,1,2,3",
335 "Counter": "0,1,2,3",
343 "Counter": "0,1,2,3",
351 "Counter": "0,1,2,3",
359 "Counter": "0,1,2,3",
367 "Counter": "0,1,2,3",
375 "Counter": "0,1,2,3",
383 "Counter": "Fixed counter 1",
389 "Counter": "0,1,2,3",
392 "PEBS": "1",
398 "Counter": "0,1,2,3",
401 "PEBS": "1",
407 "Counter": "0,1,2,3",
411 "Invert": "1",
412 "PEBS": "1",
418 "Counter": "0,1,2,3",
422 "Invert": "1",
428 "BriefDescription": "Retired floating-point operations (Precise Event)",
429 "Counter": "0,1,2,3",
432 "PEBS": "1",
438 "Counter": "0,1",
446 "Counter": "0,1,2,3",
447 "CounterMask": "1",
455 "Counter": "0,1,2,3",
456 "CounterMask": "1",
459 "Invert": "1",
465 "Counter": "0,1,2,3",
473 "Counter": "0,1,2,3",
481 "Counter": "0,1,2,3",
488 "BriefDescription": "Self-Modifying Code detected",
489 "Counter": "0,1,2,3",
497 "Counter": "0,1,2,3",
505 "Counter": "0,1,2,3",
513 "Counter": "0,1,2,3",
521 "Counter": "0,1,2,3",
529 "Counter": "0,1,2,3",
537 "Counter": "0,1,2,3",
545 "Counter": "0,1,2,3",
553 "Counter": "0,1,2,3",
561 "Counter": "0,1,2,3",
569 "Counter": "0,1,2,3",
577 "Counter": "0,1,2,3",
585 "Counter": "0,1,2,3",
593 "Counter": "0,1,2,3",
600 "BriefDescription": "SIMD Packed-Double Uops retired (Precise Event)",
601 "Counter": "0,1,2,3",
604 "PEBS": "1",
609 "BriefDescription": "SIMD Packed-Single Uops retired (Precise Event)",
610 "Counter": "0,1,2,3",
613 "PEBS": "1",
618 "BriefDescription": "SIMD Scalar-Double Uops retired (Precise Event)",
619 "Counter": "0,1,2,3",
622 "PEBS": "1",
627 "BriefDescription": "SIMD Scalar-Single Uops retired (Precise Event)",
628 "Counter": "0,1,2,3",
631 "PEBS": "1",
637 "Counter": "0,1,2,3",
640 "PEBS": "1",
646 "Counter": "0,1,2,3",
654 "Counter": "0,1,2,3",
662 "Counter": "0,1,2,3",
663 "CounterMask": "1",
671 "Counter": "0,1,2,3",
672 "CounterMask": "1",
675 "Invert": "1",
680 "AnyThread": "1",
682 "Counter": "0,1,2,3",
683 "CounterMask": "1",
690 "AnyThread": "1",
691 "BriefDescription": "Cycles Uops executed on ports 0-4 (core count)",
692 "Counter": "0,1,2,3",
693 "CounterMask": "1",
700 "AnyThread": "1",
702 "Counter": "0,1,2,3",
703 "CounterMask": "1",
704 "EdgeDetect": "1",
707 "Invert": "1",
712 "AnyThread": "1",
713 "BriefDescription": "Uops executed on ports 0-4 (core count)",
714 "Counter": "0,1,2,3",
715 "CounterMask": "1",
716 "EdgeDetect": "1",
719 "Invert": "1",
724 "AnyThread": "1",
726 "Counter": "0,1,2,3",
727 "CounterMask": "1",
730 "Invert": "1",
735 "AnyThread": "1",
736 "BriefDescription": "Cycles no Uops issued on ports 0-4 (core count)",
737 "Counter": "0,1,2,3",
738 "CounterMask": "1",
741 "Invert": "1",
747 "Counter": "0,1,2,3",
754 "BriefDescription": "Uops issued on ports 0, 1 or 5",
755 "Counter": "0,1,2,3",
762 "BriefDescription": "Cycles no Uops issued on ports 0, 1 or 5",
763 "Counter": "0,1,2,3",
764 "CounterMask": "1",
767 "Invert": "1",
772 "BriefDescription": "Uops executed on port 1",
773 "Counter": "0,1,2,3",
780 "AnyThread": "1",
781 "BriefDescription": "Uops issued on ports 2, 3 or 4",
782 "Counter": "0,1,2,3",
789 "AnyThread": "1",
791 "Counter": "0,1,2,3",
798 "AnyThread": "1",
799 "BriefDescription": "Uops executed on port 3 (core count)",
800 "Counter": "0,1,2,3",
807 "AnyThread": "1",
809 "Counter": "0,1,2,3",
817 "Counter": "0,1,2,3",
825 "Counter": "0,1,2,3",
832 "AnyThread": "1",
834 "Counter": "0,1,2,3",
835 "CounterMask": "1",
838 "Invert": "1",
843 "AnyThread": "1",
845 "Counter": "0,1,2,3",
846 "CounterMask": "1",
854 "Counter": "0,1,2,3",
862 "Counter": "0,1,2,3",
863 "CounterMask": "1",
866 "Invert": "1",
872 "Counter": "0,1,2,3",
873 "CounterMask": "1",
876 "PEBS": "1",
882 "Counter": "0,1,2,3",
885 "PEBS": "1",
890 "BriefDescription": "Macro-fused Uops retired (Precise Event)",
891 "Counter": "0,1,2,3",
894 "PEBS": "1",
900 "Counter": "0,1,2,3",
903 "PEBS": "1",
909 "Counter": "0,1,2,3",
910 "CounterMask": "1",
913 "Invert": "1",
914 "PEBS": "1",
920 "Counter": "0,1,2,3",
924 "Invert": "1",
925 "PEBS": "1",
931 "Counter": "0,1,2,3",