Lines Matching +full:micro +full:- +full:tlb
4 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
11 "MetricExpr": "cstate_core@c3\\-residency@ / TSC",
18 "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",
25 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
32 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
39 "MetricExpr": "cstate_core@c7\\-residency@ / TSC",
46 "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",
59 "MetricExpr": "((msr@aperf@ - cycles) / msr@aperf@ if msr@smi@ > 0 else 0)",
75 "MetricExpr": "1 - (tma_frontend_bound + tma_bad_speculation + tma_retiring)",
80 …-of-order scheduler dispatches ready uops into their respective execution units; and once complete…
85 …"MetricExpr": "(UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (INT_MISC.RECOVERY_CYCLES_ANY / …
90 …s for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For…
101 …etched from an incorrectly speculated program path; or stalls when the out-of-order part of the ma…
110 … corrected path; following all sorts of miss-predicted branches. For example; branchy code with lo…
114 …"BriefDescription": "This metric represents fraction of slots where Core non-memory issues were of…
116 "MetricExpr": "tma_backend_bound - tma_memory_bound",
121 …-memory issues were of a bottleneck. Shortage in hardware compute resources; or dependencies in s…
136 …"MetricExpr": "(1 - MEM_LOAD_UOPS_RETIRED.LLC_HIT / (MEM_LOAD_UOPS_RETIRED.LLC_HIT + 7 * MEM_LOAD_…
149 …SB to MITE pipelines. The DSB (decoded i-cache) is a Uop Cache where the front-end directly delive…
153 …ion": "This metric roughly estimates the fraction of cycles where the Data TLB (DTLB) was missed b…
158 …TLB (DTLB) was missed by load accesses. TLBs (Translation Look-aside Buffers) are processor caches…
163 "MetricExpr": "tma_frontend_bound - tma_fetch_latency",
178 …he CPU was stalled due to Frontend latency issues. For example; instruction-cache misses; iTLB mi…
182 …"BriefDescription": "This metric represents overall arithmetic floating-point (FP) operations frac…
187 …-point (FP) operations fraction the CPU has executed (retired). Note this metric's value may excee…
191 …"BriefDescription": "This metric approximates arithmetic floating-point (FP) scalar uops fraction …
196 …"PublicDescription": "This metric approximates arithmetic floating-point (FP) scalar uops fraction…
200 …"BriefDescription": "This metric approximates arithmetic floating-point (FP) vector uops fraction …
205 …"PublicDescription": "This metric approximates arithmetic floating-point (FP) vector uops fraction…
209 …tric approximates arithmetic FP vector uops fraction the CPU has retired for 128-bit wide vectors",
214 … approximates arithmetic FP vector uops fraction the CPU has retired for 128-bit wide vectors. May…
218 …tric approximates arithmetic FP vector uops fraction the CPU has retired for 256-bit wide vectors",
223 … approximates arithmetic FP vector uops fraction the CPU has retired for 256-bit wide vectors. May…
233 …-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi…
237 … slots where the CPU was retiring heavy-weight operations -- instructions that require two or more…
243 …he CPU was retiring heavy-weight operations -- instructions that require two or more uops or micro…
253 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)",
265 …efDescription": "Instruction-Level-Parallelism (average number of uops executed when there is exec…
321 …egate across all supported options of: FP precisions, scalar and vector instructions, vector-width"
355 …y (in nanoseconds). Accounts for demand loads and L1/L2 prefetches. ([RKL+]memory-controller only)"
359 …"MetricExpr": "(1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / (CPU_CLK_UNHALTED.REF_XCLK_ANY / 2) if #S…
382 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
394 "BriefDescription": "The ratio of Executed- by Issued-Uops",
398 …"PublicDescription": "The ratio of Executed- by Issued-Uops. Ratio > 1 suggests high rate of uop m…
407 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor…
420 …his metric represents fraction of cycles the CPU was stalled due to Instruction TLB (ITLB) misses",
425 …etric represents fraction of cycles the CPU was stalled due to Instruction TLB (ITLB) misses. Samp…
448 …slots where the CPU was retiring light-weight operations -- instructions that require no more than…
449 "MetricExpr": "tma_retiring - tma_heavy_operations",
454 …-weight operations -- instructions that require no more than one uop (micro-operation). This corre…
460 "MetricExpr": "tma_bad_speculation - tma_branch_mispredicts",
465 …-of-order portion of the machine needs to recover its state after the clear. For example; this can…
469 …as likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM…
474 …- DRAM ([SPR-HBM] and/or HBM). The underlying heuristic assumes that a similar off-core traffic i…
478 …e the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM…
479 …EAD, OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD) / tma_info_thread_clks - tma_mem_bandwidth",
483 …e the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM…
489 …EAD\\,cmask\\=1@ - (cpu@UOPS_DISPATCHED.THREAD\\,cmask\\=3@ if tma_info_thread_ipc > 1.8 else cpu@…
494 …o demand load or store instructions. This accounts mainly for (1) non-completed in-flight memory d…
512 … Commonly used instructions are optimized for delivery by the DSB (decoded i-cache) or MITE (legac…
516 … the CPU performance was potentially limited due to Core computation issues (non divider-related)",
518 …- (cpu@UOPS_DISPATCHED.THREAD\\,cmask\\=3@ if tma_info_thread_ipc > 1.8 else cpu@UOPS_DISPATCHED.T…
522 …-related). Two distinct categories can be attributed into this metric: (1) heavy data-dependency …
532 …ions-per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is …
536 … CPU was stalled due to RFO store memory accesses; RFO store issue a read-for-ownership request b…
541 …ses; RFO store issue a read-for-ownership request before the write. Even though store accesses do …