Lines Matching +full:cycle +full:- +full:3

4         "Counter": "0,1,2,3",
14 "Counter": "0,1,2,3",
23 "Counter": "0,1,2,3",
32 "Counter": "0,1,2,3",
41 "Counter": "0,1,2,3",
49 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issue…
50 "Counter": "0,1,2,3",
53 …PublicDescription": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issue…
58 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issue…
59 "Counter": "0,1,2,3",
62 …PublicDescription": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issue…
67 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar double-precision uops issue…
68 "Counter": "0,1,2,3",
71 … "PublicDescription": "Counts number of SSE* or AVX-128 double precision FP scalar uops executed.",
76 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issue…
77 "Counter": "0,1,2,3",
80 …PublicDescription": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issue…
85 …"BriefDescription": "Number of FP Computational Uops Executed this cycle. The number of FADD, FSUB…
86 "Counter": "0,1,2,3",
95 "Counter": "0,1,2,3",
103 "Counter": "0,1,2,3",
110 … assist is being invoked whenever the hardware is unable to properly handle GSSE-256b operations.",
111 "Counter": "0,1,2,3",
114 "PublicDescription": "Number of assists associated with 256-bit AVX store operations.",
119 … "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.",
120 "Counter": "0,1,2,3",
127 "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.",
128 "Counter": "0,1,2,3",
135 … "BriefDescription": "number of AVX-256 Computational FP double precision uops issued this cycle",
136 "Counter": "0,1,2,3",
139 "PublicDescription": "Counts 256-bit packed double-precision floating-point instructions.",
144 … "BriefDescription": "number of GSSE-256 Computational FP single precision uops issued this cycle",
145 "Counter": "0,1,2,3",
148 "PublicDescription": "Counts 256-bit packed single-precision floating-point instructions.",