Lines Matching full:average

164         "BriefDescription": "Average latency of a last level cache (LLC) demand and prefetch data read miss (read memory access) in nano seconds",
170         "BriefDescription": "Average latency of a last level cache (LLC) demand and prefetch data read miss (read memory access) addressed to local memory in nano seconds",
176         "BriefDescription": "Average latency of a last level cache (LLC) demand and prefetch data read miss (read memory access) addressed to remote memory in nano seconds",
532         "BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is execution) per thread (logical-processor)",
607         "BriefDescription": "Average per-core data fill bandwidth to the L1 data cache [GB / sec]",
613         "BriefDescription": "Average per-core data fill bandwidth to the L2 cache [GB / sec]",
619         "BriefDescription": "Average per-core data fill bandwidth to the L3 cache [GB / sec]",
625         "BriefDescription": "Average per-thread data fill bandwidth to the L1 data cache [GB / sec]",
637         "BriefDescription": "Average per-thread data fill bandwidth to the L2 cache [GB / sec]",
655         "BriefDescription": "Average per-thread data fill bandwidth to the L3 cache [GB / sec]",
667         "BriefDescription": "Average Parallel L2 cache miss data reads",
673         "BriefDescription": "Average Latency for L2 cache miss demand Loads",
679         "BriefDescription": "Average Parallel L2 cache miss demand Loads",
685         "BriefDescription": "Actual Average Latency for L1 data-cache miss demand load operations (in core cycles)",
692         "BriefDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is at least one such miss",
697         "PublicDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is at least one such miss. Per-Logical Processor)"
707         "BriefDescription": "Average number of Uops retired in cycles where at least one uop has retired",
713         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",
719         "BriefDescription": "Average CPU Utilization (percentage)",
725         "BriefDescription": "Average number of utilized CPUs",
731         "BriefDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]",
735         "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_fb_full, tma_mem_bandwidth, tma_sq_full"
759         "BriefDescription": "Average number of parallel data read requests to external memory",
763         "PublicDescription": "Average number of parallel data read requests to external memory. Accounts for demand loads and L1/L2 prefetches"
766         "BriefDescription": "Average latency of data read request to external memory (in nanoseconds)",
770         "PublicDescription": "Average latency of data read request to external memory (in nanoseconds). Accounts for demand loads and L1/L2 prefetches. ([RKL+]memory-controller only)"
805         "BriefDescription": "Average Frequency Utilization relative nominal frequency",
811         "BriefDescription": "Measured Average Uncore Frequency for the SoC [GHz]",