Lines Matching +full:6 +full:a
4 "Counter": "0,1,2,3,4,5,6,7",
14 "Counter": "0,1,2,3,4,5,6,7",
22 … "BriefDescription": "Number of occurrences where a microcode assist is invoked by hardware.",
23 "Counter": "0,1,2,3,4,5,6,7",
26 …"PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hard…
32 "Counter": "0,1,2,3,4,5,6,7",
41 "Counter": "0,1,2,3,4,5,6,7",
51 "Counter": "0,1,2,3,4,5,6,7",
61 "Counter": "0,1,2,3,4,5,6,7",
71 "Counter": "0,1,2,3,4,5,6,7",
81 "Counter": "0,1,2,3,4,5,6,7",
91 "Counter": "0,1,2,3,4,5,6,7",
101 "Counter": "0,1,2,3,4,5,6,7",
111 "Counter": "0,1,2,3,4,5,6,7",
121 "Counter": "0,1,2,3,4,5,6,7",
125 …ll the retired branch instructions that were mispredicted by the processor. A branch misprediction…
130 "Counter": "0,1,2,3,4,5,6,7",
139 "Counter": "0,1,2,3,4,5,6,7",
149 "Counter": "0,1,2,3,4,5,6,7",
158 "Counter": "0,1,2,3,4,5,6,7",
168 "Counter": "0,1,2,3,4,5,6,7",
177 "Counter": "0,1,2,3,4,5,6,7",
187 "Counter": "0,1,2,3,4,5,6,7",
196 "Counter": "0,1,2,3,4,5,6,7",
206 "Counter": "0,1,2,3,4,5,6,7",
216 "Counter": "0,1,2,3,4,5,6,7",
225 "Counter": "0,1,2,3,4,5,6,7",
234 "Counter": "0,1,2,3,4,5,6,7",
244 "Counter": "0,1,2,3,4,5,6,7",
253 "Counter": "0,1,2,3,4,5,6,7",
257 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
263 "Counter": "0,1,2,3,4,5,6,7",
272 "Counter": "0,1,2,3,4,5,6,7",
281 "Counter": "0,1,2,3,4,5,6,7",
289 …"BriefDescription": "Core clocks when the thread is in the C0.1 or C0.2 or running a PAUSE in C0 A…
290 "Counter": "0,1,2,3,4,5,6,7",
299 "Counter": "0,1,2,3,4,5,6,7",
302 …t distributes cycle counts between active hyperthreads, i.e., those in C0. A hyperthread becomes …
308 "Counter": "0,1,2,3,4,5,6,7",
317 "Counter": "0,1,2,3,4,5,6,7",
325 "Counter": "0,1,2,3,4,5,6,7",
335 "Counter": "0,1,2,3,4,5,6,7",
338 …ose in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructio…
346 …a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT i…
352 "Counter": "0,1,2,3,4,5,6,7",
355 …a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT i…
363 …a halt state. The thread enters the halt state when it is running the HLT instruction. This event …
369 "Counter": "0,1,2,3,4,5,6,7",
372 …a halt state. The thread enters the halt state when it is running the HLT instruction. The core fr…
395 "Counter": "0,1,2,3,4,5,6,7",
422 "Counter": "0,1,2,3,4,5,6,7",
431 "Counter": "0,1,2,3,4,5,6,7",
434 …"PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Re…
440 "Counter": "0,1,2,3,4,5,6,7",
448 "Counter": "0,1,2,3,4,5,6,7",
451 …"PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and …
457 "Counter": "0,1,2,3,4,5,6,7",
466 "Counter": "0,1,2,3,4,5,6,7",
475 "Counter": "0,1,2,3,4,5,6,7",
484 "Counter": "0,1,2,3,4,5,6,7",
494 "Counter": "0,1,2,3,4,5,6,7",
502 "BriefDescription": "Instruction decoders utilized in a cycle",
506 …"PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline…
515 …ANY is counted by a designated fixed counter freeing up programmable counters to count other event…
521 "Counter": "0,1,2,3,4,5,6,7",
525 …ANY is counted by a designated fixed counter freeing up programmable counters to count other event…
530 "Counter": "0,1,2,3,4,5,6,7",
539 "Counter": "0,1,2,3,4,5,6,7",
552 …"PublicDescription": "A version of INST_RETIRED that allows for a precise distribution of samples …
558 "Counter": "0,1,2,3,4,5,6,7",
562 …a byte, word, and doubleword version and string instructions can be repeated using a repetition pr…
568 "Counter": "0,1,2,3,4,5,6,7",
578 …"BriefDescription": "Counts cycles after recovery from a branch misprediction or machine clear til…
579 "Counter": "0,1,2,3,4,5,6,7",
582 …"PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the …
588 "Counter": "0,1,2,3,4,5,6,7",
596 "Counter": "0,1,2,3,4,5,6,7",
605 "Counter": "0,1,2,3,4,5,6,7",
615 "Counter": "0,1,2,3,4,5,6,7",
624 "Counter": "0,1,2,3,4,5,6,7",
632 "Counter": "0,1,2,3,4,5,6,7",
640 "Counter": "0,1,2,3,4,5,6,7",
649 "Counter": "0,1,2,3,4,5,6,7",
658 "Counter": "0,1,2,3,4,5,6,7",
666 "Counter": "0,1,2,3,4,5,6,7",
674 "Counter": "0,1,2,3,4,5,6,7",
682 "Counter": "0,1,2,3,4,5,6,7",
693 …"PublicDescription": "Counts the number of times a load got blocked due to false dependencies in M…
707 …"BriefDescription": "Loads blocked due to overlapping with a preceding store that cannot be forwar…
711 … prevented for a load operation. The most common case is a load blocked due to the address of memo…
726 "Counter": "0,1,2,3,4,5,6,7",
736 "Counter": "0,1,2,3,4,5,6,7",
737 "CounterMask": "6",
746 "Counter": "0,1,2,3,4,5,6,7",
755 "Counter": "0,1,2,3,4,5,6,7",
766 "Counter": "0,1,2,3,4,5,6,7",
769 … "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",
775 "Counter": "0,1,2,3,4,5,6,7",
784 "Counter": "0,1,2,3,4,5,6,7",
793 "Counter": "0,1,2,3,4,5,6,7",
800 …s event counts a subset of the Topdown Slots event that were not consumed by the back-end pipeline…
801 "Counter": "0,1,2,3,4,5,6,7",
804 …s event counts a subset of the Topdown Slots event that were not consumed by the back-end pipeline…
822 …ere issued but not retired as well as the out-of-order engine recovery past a branch misprediction…
828 "Counter": "0,1,2,3,4,5,6,7",
838 …top-level metrics of the TMA method. This architectural event is counted on a designated fixed cou…
844 "Counter": "0,1,2,3,4,5,6,7",
862 "Counter": "0,1,2,3,4,5,6,7",
871 "Counter": "0,1,2,3,4,5,6,7",
880 "Counter": "0,1,2,3,4,5,6,7",
889 "Counter": "0,1,2,3,4,5,6,7",
898 "Counter": "0,1,2,3,4,5,6,7",
906 "BriefDescription": "Uops executed on port 6",
907 "Counter": "0,1,2,3,4,5,6,7",
910 "PublicDescription": "Number of uops dispatch to execution port 6.",
916 "Counter": "0,1,2,3,4,5,6,7",
925 "Counter": "0,1,2,3,4,5,6,7",
934 "Counter": "0,1,2,3,4,5,6,7",
944 "Counter": "0,1,2,3,4,5,6,7",
954 "Counter": "0,1,2,3,4,5,6,7",
964 "Counter": "0,1,2,3,4,5,6,7",
974 "Counter": "0,1,2,3,4,5,6,7",
984 "Counter": "0,1,2,3,4,5,6,7",
994 "Counter": "0,1,2,3,4,5,6,7",
1004 "Counter": "0,1,2,3,4,5,6,7",
1014 "Counter": "0,1,2,3,4,5,6,7",
1025 "Counter": "0,1,2,3,4,5,6,7",
1033 "Counter": "0,1,2,3,4,5,6,7",
1042 "Counter": "0,1,2,3,4,5,6,7",
1051 "Counter": "0,1,2,3,4,5,6,7",
1060 "Counter": "0,1,2,3,4,5,6,7",
1070 "Counter": "0,1,2,3,4,5,6,7",
1079 "Counter": "0,1,2,3,4,5,6,7",
1088 …"BriefDescription": "This event counts a subset of the Topdown Slots event that are utilized by op…
1089 "Counter": "0,1,2,3,4,5,6,7",
1092 …"PublicDescription": "This event counts a subset of the Topdown Slots event that are utilized by o…
1098 "Counter": "0,1,2,3,4,5,6,7",