Lines Matching +full:3 +full:- +full:point

3         "BriefDescription": "This event counts the cycles the floating point divider is busy.",
4 "Counter": "0,1,2,3,4,5,6,7",
13 "Counter": "0,1,2,3,4,5,6,7",
16 "PublicDescription": "Counts all microcode Floating Point assists.",
22 "Counter": "0,1,2,3,4,5,6,7",
30 "Counter": "0,1,2,3,4,5,6,7",
38 "Counter": "0,1,2,3,4,5,6,7",
46 "Counter": "0,1,2,3,4,5,6,7",
54 "Counter": "0,1,2,3,4,5,6,7",
62 "Counter": "0,1,2,3,4,5,6,7",
70 "Counter": "0,1,2,3,4,5,6,7",
77-bit packed double precision floating-point instructions retired; some instructions will count twi…
78 "Counter": "0,1,2,3,4,5,6,7",
81-bit packed double precision floating-point instructions retired; some instructions will count twi…
86-bit packed single precision floating-point instructions retired; some instructions will count twi…
87 "Counter": "0,1,2,3,4,5,6,7",
90-bit packed single precision floating-point instructions retired; some instructions will count twi…
95-bit packed double precision floating-point instructions retired; some instructions will count twi…
96 "Counter": "0,1,2,3,4,5,6,7",
99-bit packed double precision floating-point instructions retired; some instructions will count twi…
104-bit packed single precision floating-point instructions retired; some instructions will count twi…
105 "Counter": "0,1,2,3,4,5,6,7",
108-bit packed single precision floating-point instructions retired; some instructions will count twi…
113 …"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed doub…
114 "Counter": "0,1,2,3,4,5,6,7",
117-bit packed single precision and 256-bit packed double precision floating-point instructions reti…
122-bit packed double precision floating-point instructions retired; some instructions will count twi…
123 "Counter": "0,1,2,3,4,5,6,7",
126-bit packed double precision floating-point instructions retired; some instructions will count twi…
131-bit packed single precision floating-point instructions retired; some instructions will count twi…
132 "Counter": "0,1,2,3,4,5,6,7",
135-bit packed single precision floating-point instructions retired; some instructions will count twi…
140 …"BriefDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit p…
141 "Counter": "0,1,2,3,4,5,6,7",
144-bit packed single precision and 512-bit packed double precision floating-point instructions reti…
149-point instructions retired; some instructions will count twice as noted below. Applies to SSE* a…
150 "Counter": "0,1,2,3,4,5,6,7",
153-point instructions retired; some instructions will count twice as noted below. Each count repres…
158-point instructions retired; some instructions will count twice as noted below. Each count repres…
159 "Counter": "0,1,2,3,4,5,6,7",
162-point instructions retired; some instructions will count twice as noted below. Each count repres…
167-point instructions retired; some instructions will count twice as noted below. Each count repres…
168 "Counter": "0,1,2,3,4,5,6,7",
171-point instructions retired; some instructions will count twice as noted below. Each count repres…
177 "Counter": "0,1,2,3,4,5,6,7",
186 "Counter": "0,1,2,3,4,5,6,7",
194 "Counter": "0,1,2,3,4,5,6,7",
202 "Counter": "0,1,2,3,4,5,6,7",
210 "Counter": "0,1,2,3,4,5,6,7",
217 …"BriefDescription": "Number of all Scalar Half-Precision FP arithmetic instructions(1) retired - r…
218 "Counter": "0,1,2,3,4,5,6,7",
227 "Counter": "0,1,2,3,4,5,6,7",
234 …"BriefDescription": "Number of all Vector (also called packed) Half-Precision FP arithmetic instru…
235 "Counter": "0,1,2,3,4,5,6,7",