Lines Matching +full:software +full:- +full:initiated

15 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",
53 …-demand loads and gets hit at least once by demand. The valid outstanding interval is defined unti…
86 …"BriefDescription": "Non-modified cache lines that are silently dropped by L2 cache when triggered…
90 …y an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.",
108 …"PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excl…
122 …"BriefDescription": "Read requests with true-miss in L2 cache [This event is alias to L2_RQSTS.MIS…
126 …ublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss exc…
144 …quests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses t…
206 …"PublicDescription": "Counts the number of demand Data Read requests initiated by load instruction…
215 …ublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss exc…
237 …"BriefDescription": "Read requests with true-miss in L2 cache [This event is alias to L2_REQUEST.M…
241 …ublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss exc…
250 …"PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excl…
259         "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",
268         "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",
277 …"PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFET…
286 …"PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFE…
300 …"BriefDescription": "Core-originated cacheable requests that missed L3  (Except hardware prefetche…
304 … "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Reques…
309 …"BriefDescription": "Core-originated cacheable requests that refer to L3 (Except hardware prefetch…
313 …n": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests i…
346         "PublicDescription": "Counts all retired memory instructions - loads and stores.",
390 …"PublicDescription": "Number of retired load instructions with a clean hit in the 2nd-level TLB (S…
401 … "PublicDescription": "Number of retired store instructions that hit in the 2nd-level TLB (STLB).",
412 …"PublicDescription": "Number of retired load instructions that (start a) miss in the 2nd-level TLB…
423 …"PublicDescription": "Number of retired store instructions that (start a) miss in the 2nd-level TL…
428         "BriefDescription": "Completed demand load uops that miss the L1 d-cache.",
448 …tired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core …
454 …tired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core …
470 …: "Retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core c…
476 …ts retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core c…
529 …ired instructions with at least one load to uncacheable memory-type, or at least one cache-line sp…
534 …hit the FB(fill buffer), because a preceding miss to the same cacheline initiated the line to be b…
623 …"PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses",
678 …"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for …
688 …"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for …
712 … "Counts memory transactions reached the super queue including requests initiated by the core, all…
726         "BriefDescription": "Cacheable and Non-Cacheable code read requests",
730         "PublicDescription": "Counts both cacheable and Non-Cacheable code read requests.",
758 …ng state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corr…
818         "BriefDescription": "Store Read transactions pending for off-core. Highly correlated.",
822 … number of off-core outstanding read-for-ownership (RFO) store transactions every cycle. An RFO tr…