Lines Matching +full:3 +full:- +full:7
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110 "Counter": "0,1,2,3,4,5,6,7",
118 "Counter": "0,1,2,3,4,5,6,7",
121 …-speculative execution path is known. The branch prediction unit (BPU) predicts the target address…
126 "Counter": "0,1,2,3,4,5,6,7",
134 "Counter": "0,1,2,3,4,5,6,7",
142 "Counter": "0,1,2,3,4,5,6,7",
150 "Counter": "0,1,2,3,4,5,6,7",
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219 "Counter": "0,1,2,3,4,5,6,7",
234 "Counter": "0,1,2,3,4,5,6,7",
241 "Counter": "0,1,2,3,4,5,6,7",
249 "Counter": "0,1,2,3,4,5,6,7",
257 "Counter": "0,1,2,3,4,5,6,7",
265 "Counter": "0,1,2,3,4,5,6,7",
272 …ounts the number of machine clears due to a page fault. Counts both I-Side and D-Side (Loads/Stor…
273 "Counter": "0,1,2,3,4,5,6,7",
281 "Counter": "0,1,2,3,4,5,6,7",
290 "Counter": "0,1,2,3,4,5,6,7",
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306 "Counter": "0,1,2,3,4,5,6,7",
314 "Counter": "0,1,2,3,4,5,6,7",
322 "Counter": "0,1,2,3,4,5,6,7",
330 "Counter": "0,1,2,3,4,5,6,7",
338 "Counter": "0,1,2,3,4,5,6,7",
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354 "Counter": "0,1,2,3,4,5,6,7",
362 "Counter": "0,1,2,3,4,5,6,7",
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377 "Counter": "0,1,2,3,4,5,6,7",
384 "Counter": "0,1,2,3,4,5,6,7",
391 …y cycle that were not consumed by the backend due to IEC and FPC RAT stalls - which can be due to …
392 "Counter": "0,1,2,3,4,5,6,7",
400 "Counter": "0,1,2,3,4,5,6,7",
408 "Counter": "0,1,2,3,4,5,6,7",
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526 "Counter": "0,1,2,3,4,5,6,7",
533 "Counter": "0,1,2,3,4,5,6,7",
536 …he number of uops issued by the front end every cycle. When 4-uops are requested and only 2-uops a…
541 "Counter": "0,1,2,3,4,5,6,7",
548 "Counter": "0,1,2,3,4,5,6,7",
555 …ounts the number of uops that are from the complex flows issued by the micro-sequencer (MS). This…
556 "Counter": "0,1,2,3,4,5,6,7",
564 "Counter": "0,1,2,3,4,5,6,7",