Lines Matching full:requires

209 …"BriefDescription": "Requires MSR_OFFCORE_RESP[0,1] to specify request type and response. (duplica…
223 …"PublicDescription": "Counts data reads (demand & prefetch) that hit the L2 cache. Requires MSR_OF…
234 …iption": "Counts data reads (demand & prefetch) that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
245 …a snoop hit in the other processor module, data forwarding is required. Requires MSR_OFFCORE_RESP[…
256 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
267 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…
278 …nts data reads generated by L1 or L2 prefetchers that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
289 …ts data reads generated by L1 or L2 prefetchers that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
300 …a snoop hit in the other processor module, data forwarding is required. Requires MSR_OFFCORE_RESP[…
311 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
322 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…
333 …for ownership (RFO) requests (demand & prefetch) that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
344 …or ownership (RFO) requests (demand & prefetch) that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
355 …a snoop hit in the other processor module, data forwarding is required. Requires MSR_OFFCORE_RESP[…
366 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
377 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…
388 …ubsystem that have any transaction responses from the uncore subsystem. Requires MSR_OFFCORE_RESP[…
399 …ption": "Counts requests to the uncore subsystem that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
410 …a snoop hit in the other processor module, data forwarding is required. Requires MSR_OFFCORE_RESP[…
421 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
432 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…
443 …for ownership (RFO) requests (demand & prefetch) that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
454 …or ownership (RFO) requests (demand & prefetch) that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
465 …a snoop hit in the other processor module, data forwarding is required. Requires MSR_OFFCORE_RESP[…
476 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
487 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…
498 …requests that have any transaction responses from the uncore subsystem. Requires MSR_OFFCORE_RESP[…
509 … transactions caused by L1 or L2 cache evictions that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
520 …transactions caused by L1 or L2 cache evictions that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
531 …a snoop hit in the other processor module, data forwarding is required. Requires MSR_OFFCORE_RESP[…
542 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
553 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…
564 …refetch requests that miss the instruction cache that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
575 …efetch requests that miss the instruction cache that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
586 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
597 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…
608 …r cycle, from the time of the L2 miss to when any response is received. Requires MSR_OFFCORE_RESP[…
619 … demand cacheable data reads of full cache lines that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
630 …demand cacheable data reads of full cache lines that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
641 …a snoop hit in the other processor module, data forwarding is required. Requires MSR_OFFCORE_RESP[…
652 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
663 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…
674 …r cycle, from the time of the L2 miss to when any response is received. Requires MSR_OFFCORE_RESP[…
685 …sts generated by a write to full data cache line that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
696 …ts generated by a write to full data cache line that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
707 …a snoop hit in the other processor module, data forwarding is required. Requires MSR_OFFCORE_RESP[…
718 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
729 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…
740 …r cycle, from the time of the L2 miss to when any response is received. Requires MSR_OFFCORE_RESP[…
751 …y region and full cache-line non-temporal writes that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
762 … region and full cache-line non-temporal writes that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
773 …a snoop hit in the other processor module, data forwarding is required. Requires MSR_OFFCORE_RESP[…
784 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
795 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…
806 …uncacheable write combining (USWC) memory types that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
817 …ncacheable write combining (USWC) memory region  that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
828 …cacheable write combining (USWC) memory region  that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
839 …a snoop hit in the other processor module, data forwarding is required. Requires MSR_OFFCORE_RESP[…
850 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
861 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…
872 … (WT), and write protected (WP) types of memory that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
883 …s generated by hardware L1 data cache prefetcher that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
894 … generated by hardware L1 data cache prefetcher that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
905 …a snoop hit in the other processor module, data forwarding is required. Requires MSR_OFFCORE_RESP[…
916 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
927 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…
938 … reads generated by hardware L2 cache prefetcher that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
949 …reads generated by hardware L2 cache prefetcher that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
960 …a snoop hit in the other processor module, data forwarding is required. Requires MSR_OFFCORE_RESP[…
971 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
982 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…
993 …ership (RFO) requests generated by L2 prefetcher that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
1004 …rship (RFO) requests generated by L2 prefetcher that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
1015 …a snoop hit in the other processor module, data forwarding is required. Requires MSR_OFFCORE_RESP[…
1026 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
1037 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…
1048 …ncacheable write combining (USWC) memory region  that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
1059 …cacheable write combining (USWC) memory region  that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
1070 …lines requests by software prefetch instructions that hit the L2 cache. Requires MSR_OFFCORE_RESP[…
1081 …ines requests by software prefetch instructions that miss the L2 cache. Requires MSR_OFFCORE_RESP[…
1092 …a snoop hit in the other processor module, data forwarding is required. Requires MSR_OFFCORE_RESP[…
1103 …noop hit in the other processor module, no data forwarding is required. Requires MSR_OFFCORE_RESP[…
1114 …miss for the L2 cache with a snoop miss in the other processor module.  Requires MSR_OFFCORE_RESP[…