Lines Matching +full:0 +full:xc7
4 "Counter": "0,1,2,3,4,5",
5 "EventCode": "0xcd",
8 "UMask": "0x2",
13 "Counter": "0,1,2,3,4,5,6,7",
15 "EventCode": "0xb0",
17 "PublicDescription": "ARITH.FPDIV_ACTIVE Available PDIST counters: 0",
19 "UMask": "0x1",
24 "Counter": "0,1,2,3,4,5",
25 "EventCode": "0xcd",
28 "UMask": "0x8",
33 "Counter": "0,1,2,3,4,5,6,7",
34 "EventCode": "0xc1",
36 … "PublicDescription": "Counts all microcode Floating Point assists. Available PDIST counters: 0",
38 "UMask": "0x2",
43 "Counter": "0,1,2,3,4,5,6,7",
44 "EventCode": "0xc1",
46 "PublicDescription": "ASSISTS.SSE_AVX_MIX Available PDIST counters: 0",
48 "UMask": "0x10",
53 "Counter": "0,1,2,3,4,5,6,7",
54 "EventCode": "0xb3",
56 …ITH_DISPATCHED.PORT_0 [This event is alias to FP_ARITH_DISPATCHED.V0] Available PDIST counters: 0",
58 "UMask": "0x1",
63 "Counter": "0,1,2,3,4,5,6,7",
64 "EventCode": "0xb3",
66 …ITH_DISPATCHED.PORT_1 [This event is alias to FP_ARITH_DISPATCHED.V1] Available PDIST counters: 0",
68 "UMask": "0x2",
73 "Counter": "0,1,2,3,4,5,6,7",
74 "EventCode": "0xb3",
76 …ITH_DISPATCHED.PORT_5 [This event is alias to FP_ARITH_DISPATCHED.V2] Available PDIST counters: 0",
78 "UMask": "0x4",
83 "Counter": "0,1,2,3,4,5,6,7",
84 "EventCode": "0xb3",
86 …ITH_DISPATCHED.V0 [This event is alias to FP_ARITH_DISPATCHED.PORT_0] Available PDIST counters: 0",
88 "UMask": "0x1",
93 "Counter": "0,1,2,3,4,5,6,7",
94 "EventCode": "0xb3",
96 …ITH_DISPATCHED.V1 [This event is alias to FP_ARITH_DISPATCHED.PORT_1] Available PDIST counters: 0",
98 "UMask": "0x2",
103 "Counter": "0,1,2,3,4,5,6,7",
104 "EventCode": "0xb3",
106 …ITH_DISPATCHED.V2 [This event is alias to FP_ARITH_DISPATCHED.PORT_5] Available PDIST counters: 0",
108 "UMask": "0x4",
113 "Counter": "0,1,2,3,4,5,6,7",
114 "EventCode": "0xc7",
116 …Z flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",
118 "UMask": "0x4",
123 "Counter": "0,1,2,3,4,5,6,7",
124 "EventCode": "0xc7",
126 …Z flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",
128 "UMask": "0x8",
133 "Counter": "0,1,2,3,4,5,6,7",
134 "EventCode": "0xc7",
136 …Z flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",
138 "UMask": "0x10",
143 "Counter": "0,1,2,3,4,5,6,7",
144 "EventCode": "0xc7",
146 …Z flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",
148 "UMask": "0x20",
153 "Counter": "0,1,2,3,4,5,6,7",
154 "EventCode": "0xc7",
156 …Z flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",
158 "UMask": "0x18",
163 "Counter": "0,1,2,3,4,5,6,7",
164 "EventCode": "0xc7",
166 …Z flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",
168 "UMask": "0x3",
173 "Counter": "0,1,2,3,4,5,6,7",
174 "EventCode": "0xc7",
176 …Z flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",
178 "UMask": "0x1",
183 "Counter": "0,1,2,3,4,5,6,7",
184 "EventCode": "0xc7",
186 …Z flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",
188 "UMask": "0x2",
193 "Counter": "0,1,2,3,4,5,6,7",
194 "EventCode": "0xc7",
196 …Z flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",
198 "UMask": "0xfc",
203 "Counter": "0,1,2,3,4,5",
204 "EventCode": "0xc3",
208 "UMask": "0x4",
213 "Counter": "0,1,2,3,4,5",
214 "EventCode": "0xc2",
217 "UMask": "0x8",