Lines Matching full:misses

5 …sfy a demand miss. If MMCR1[16|17] is 1, this count includes both demand misses and prefetch reloa…
10 …his event counts only DERAT reloads for demand misses. When MMCR1[16]=1 this event includes demand…
15 … MMCR1[16]=0 this event counts only for demand misses. When MMCR1[16]=1 this event includes demand…
20 … MMCR1[16]=0 this event counts only for demand misses. When MMCR1[16]=1 this event includes demand…
30 … MMCR1[17]=0 this event counts only for demand misses. When MMCR1[17]=1 this event includes demand…
40 …sfy a demand miss. If MMCR1[16|17] is 1, this count includes both demand misses and prefetch reloa…
45 …his event counts only DERAT reloads for demand misses. When MMCR1[16]=1 this event includes demand…
50 … MMCR1[16]=0 this event counts only for demand misses. When MMCR1[16]=1 this event includes demand…
55 …his event counts only DERAT reloads for demand misses. When MMCR1[16]=1 this event includes demand…
60 …his event counts only DERAT reloads for demand misses. When MMCR1[16]=1 this event includes demand…
70 …sfy a demand miss. If MMCR1[16|17] is 1, this count includes both demand misses and prefetch reloa…
80 …his event counts only DERAT reloads for demand misses. When MMCR1[16]=1 this event includes demand…
85 … MMCR1[16]=0 this event counts only for demand misses. When MMCR1[16]=1 this event includes demand…
95 …store instruction in execution was missing from the TLB. This event only counts for demand misses."
105 …sfy a demand miss. If MMCR1[16|17] is 1, this count includes both demand misses and prefetch reloa…
110 … MMCR1[16]=0 this event counts only for demand misses. When MMCR1[16]=1 this event includes demand…
115 … MMCR1[16]=0 this event counts only for demand misses. When MMCR1[16]=1 this event includes demand…