Lines Matching full:l3
20 …"BriefDescription": "The processor's L1 data cache was reloaded from beyond the local core's L3 du…
160 …"BriefDescription": "The processor's instruction cache was reloaded from the local core's L3 due t…
165 …"BriefDescription": "The processor's L1 data cache was reloaded from the local core's L3 due to a …
170 …"BriefDescription": "The processor's instruction cache was reloaded from the local core's L3 due t…
175 …"BriefDescription": "The processor's L1 data cache was reloaded from the local core's L3 due to a …
180 …t dispatch conflicts with data NOT in the MEPF state from the local core's L3 due to a demand miss…
185 …t dispatch conflicts with data NOT in the MEPF state from the local core's L3 due to a demand miss…
190 …th data in the MEPF state without dispatch conflicts from the local core's L3 due to a demand miss…
195 …th data in the MEPF state without dispatch conflicts from the local core's L3 due to a demand miss…
200 …"BriefDescription": "The processor's L1 data cache was reloaded from the local core's L3 due to a …
205 …"BriefDescription": "The processor's L1 data cache was reloaded from the local core's L3 due to a …
210 …he processor's instruction cache was reloaded from beyond the local core's L3 due to a demand miss…
215 …"BriefDescription": "The processor's L1 data cache was reloaded from beyond the local core's L3 du…
220 …he processor's instruction cache was reloaded from beyond the local core's L3 due to a demand miss…
225 …"BriefDescription": "The processor's L1 data cache was reloaded from beyond the local core's L3 du…
270 …h a valid line that was not in the M (exclusive) state from another core's L3 on the same chip in …
275 …h a valid line that was not in the M (exclusive) state from another core's L3 on the same chip in …
280 …he was reloaded with a line in the M (exclusive) state from another core's L3 on the same chip in …
285 …he was reloaded with a line in the M (exclusive) state from another core's L3 on the same chip in …
290 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 on the …
295 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 on the same…
300 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 on the …
305 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 on the same…
310 …lid line that was not in the M (exclusive) state from another core's L2 or L3 on the same chip in …
315 …lid line that was not in the M (exclusive) state from another core's L2 or L3 on the same chip in …
320 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 on the same chip in …
325 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 on the same chip in …
330 … "The processor's instruction cache was reloaded from another core's L2 or L3 on the same chip in …
335 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 on th…
340 … "The processor's instruction cache was reloaded from another core's L2 or L3 on the same chip in …
345 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 on th…
390 …h a valid line that was not in the M (exclusive) state from another core's L3 on the same chip in …
395 …h a valid line that was not in the M (exclusive) state from another core's L3 on the same chip in …
400 …he was reloaded with a line in the M (exclusive) state from another core's L3 on the same chip in …
405 …he was reloaded with a line in the M (exclusive) state from another core's L3 on the same chip in …
410 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 on the …
415 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 on the same…
420 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 on the …
425 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 on the same…
430 …lid line that was not in the M (exclusive) state from another core's L2 or L3 on the same chip in …
435 …lid line that was not in the M (exclusive) state from another core's L2 or L3 on the same chip in …
440 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 on the same chip in …
445 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 on the same chip in …
450 … "The processor's instruction cache was reloaded from another core's L2 or L3 on the same chip in …
455 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 on th…
460 … "The processor's instruction cache was reloaded from another core's L2 or L3 on the same chip in …
465 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 on th…
570 …h a valid line that was not in the M (exclusive) state from another core's L3 from a remote chip d…
575 …h a valid line that was not in the M (exclusive) state from another core's L3 from a remote chip d…
580 …he was reloaded with a line in the M (exclusive) state from another core's L3 from a remote chip d…
585 …he was reloaded with a line in the M (exclusive) state from another core's L3 from a remote chip d…
590 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 from a …
595 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 from a remo…
600 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 from a …
605 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 from a remo…
610 …lid line that was not in the M (exclusive) state from another core's L2 or L3 from a remote chip d…
615 …lid line that was not in the M (exclusive) state from another core's L2 or L3 from a remote chip d…
620 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 from a remote chip d…
625 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 from a remote chip d…
630 … "The processor's instruction cache was reloaded from another core's L2 or L3 from a remote chip d…
635 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
640 … "The processor's instruction cache was reloaded from another core's L2 or L3 from a remote chip d…
645 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
750 …h a valid line that was not in the M (exclusive) state from another core's L3 from a distant chip …
755 …h a valid line that was not in the M (exclusive) state from another core's L3 from a distant chip …
760 …he was reloaded with a line in the M (exclusive) state from another core's L3 from a distant chip …
765 …he was reloaded with a line in the M (exclusive) state from another core's L3 from a distant chip …
770 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 from a …
775 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 from a dist…
780 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 from a …
785 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 from a dist…
790 …lid line that was not in the M (exclusive) state from another core's L2 or L3 from a distant chip …
795 …lid line that was not in the M (exclusive) state from another core's L2 or L3 from a distant chip …
800 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 from a distant chip …
805 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 from a distant chip …
810 … "The processor's instruction cache was reloaded from another core's L2 or L3 from a distant chip …
815 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
820 … "The processor's instruction cache was reloaded from another core's L2 or L3 from a distant chip …
825 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
890 … "The processor's instruction cache was reloaded from another core's L2 or L3 from the same chip d…
895 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
900 … "The processor's instruction cache was reloaded from another core's L2 or L3 from the same chip d…
905 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
910 … "The processor's instruction cache was reloaded from another core's L2 or L3 from a different chi…
915 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
920 … "The processor's instruction cache was reloaded from another core's L2 or L3 from a different chi…
925 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
1050 …"BriefDescription": "The processor's instruction cache was reloaded from the local core's L3 due t…
1055 …"BriefDescription": "The processor's L1 data cache was reloaded from the local core's L3 due to a …
1060 …"BriefDescription": "The processor's instruction cache was reloaded from the local core's L3 due t…
1065 …"BriefDescription": "The processor's L1 data cache was reloaded from the local core's L3 due to a …
1070 …t dispatch conflicts with data NOT in the MEPF state from the local core's L3 due to a demand miss…
1075 …t dispatch conflicts with data NOT in the MEPF state from the local core's L3 due to a demand miss…
1080 …th data in the MEPF state without dispatch conflicts from the local core's L3 due to a demand miss…
1085 …th data in the MEPF state without dispatch conflicts from the local core's L3 due to a demand miss…
1090 …"BriefDescription": "The processor's L1 data cache was reloaded from the local core's L3 due to a …
1095 …"BriefDescription": "The processor's L1 data cache was reloaded from the local core's L3 due to a …
1100 …he processor's instruction cache was reloaded from beyond the local core's L3 due to a demand miss…
1105 …"BriefDescription": "The processor's L1 data cache was reloaded from beyond the local core's L3 du…
1110 …he processor's instruction cache was reloaded from beyond the local core's L3 due to a demand miss…
1115 …"BriefDescription": "The processor's L1 data cache was reloaded from beyond the local core's L3 du…
1160 …h a valid line that was not in the M (exclusive) state from another core's L3 on the same chip in …
1165 …h a valid line that was not in the M (exclusive) state from another core's L3 on the same chip in …
1170 …he was reloaded with a line in the M (exclusive) state from another core's L3 on the same chip in …
1175 …he was reloaded with a line in the M (exclusive) state from another core's L3 on the same chip in …
1180 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 on the …
1185 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 on the same…
1190 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 on the …
1195 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 on the same…
1200 …lid line that was not in the M (exclusive) state from another core's L2 or L3 on the same chip in …
1205 …lid line that was not in the M (exclusive) state from another core's L2 or L3 on the same chip in …
1210 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 on the same chip in …
1215 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 on the same chip in …
1220 … "The processor's instruction cache was reloaded from another core's L2 or L3 on the same chip in …
1225 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 on th…
1230 … "The processor's instruction cache was reloaded from another core's L2 or L3 on the same chip in …
1235 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 on th…
1280 …h a valid line that was not in the M (exclusive) state from another core's L3 on the same chip in …
1285 …h a valid line that was not in the M (exclusive) state from another core's L3 on the same chip in …
1290 …he was reloaded with a line in the M (exclusive) state from another core's L3 on the same chip in …
1295 …he was reloaded with a line in the M (exclusive) state from another core's L3 on the same chip in …
1300 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 on the …
1305 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 on the same…
1310 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 on the …
1315 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 on the same…
1320 …lid line that was not in the M (exclusive) state from another core's L2 or L3 on the same chip in …
1325 …lid line that was not in the M (exclusive) state from another core's L2 or L3 on the same chip in …
1330 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 on the same chip in …
1335 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 on the same chip in …
1340 … "The processor's instruction cache was reloaded from another core's L2 or L3 on the same chip in …
1345 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 on th…
1350 … "The processor's instruction cache was reloaded from another core's L2 or L3 on the same chip in …
1355 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 on th…
1460 …h a valid line that was not in the M (exclusive) state from another core's L3 from a remote chip d…
1465 …h a valid line that was not in the M (exclusive) state from another core's L3 from a remote chip d…
1470 …he was reloaded with a line in the M (exclusive) state from another core's L3 from a remote chip d…
1475 …he was reloaded with a line in the M (exclusive) state from another core's L3 from a remote chip d…
1480 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 from a …
1485 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 from a remo…
1490 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 from a …
1495 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 from a remo…
1500 …lid line that was not in the M (exclusive) state from another core's L2 or L3 from a remote chip d…
1505 …lid line that was not in the M (exclusive) state from another core's L2 or L3 from a remote chip d…
1510 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 from a remote chip d…
1515 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 from a remote chip d…
1520 … "The processor's instruction cache was reloaded from another core's L2 or L3 from a remote chip d…
1525 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
1530 … "The processor's instruction cache was reloaded from another core's L2 or L3 from a remote chip d…
1535 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
1640 …h a valid line that was not in the M (exclusive) state from another core's L3 from a distant chip …
1645 …h a valid line that was not in the M (exclusive) state from another core's L3 from a distant chip …
1650 …he was reloaded with a line in the M (exclusive) state from another core's L3 from a distant chip …
1655 …he was reloaded with a line in the M (exclusive) state from another core's L3 from a distant chip …
1660 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 from a …
1665 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 from a dist…
1670 …"BriefDescription": "The processor's instruction cache was reloaded from another core's L3 from a …
1675 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L3 from a dist…
1680 …lid line that was not in the M (exclusive) state from another core's L2 or L3 from a distant chip …
1685 …lid line that was not in the M (exclusive) state from another core's L2 or L3 from a distant chip …
1690 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 from a distant chip …
1695 … reloaded with a line in the M (exclusive) state from another core's L2 or L3 from a distant chip …
1700 … "The processor's instruction cache was reloaded from another core's L2 or L3 from a distant chip …
1705 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
1710 … "The processor's instruction cache was reloaded from another core's L2 or L3 from a distant chip …
1715 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
1780 … "The processor's instruction cache was reloaded from another core's L2 or L3 from the same chip d…
1785 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
1790 … "The processor's instruction cache was reloaded from another core's L2 or L3 from the same chip d…
1795 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
1800 … "The processor's instruction cache was reloaded from another core's L2 or L3 from a different chi…
1805 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …
1810 … "The processor's instruction cache was reloaded from another core's L2 or L3 from a different chi…
1815 …"BriefDescription": "The processor's L1 data cache was reloaded from another core's L2 or L3 from …