229 static void had_write_register(struct snd_intelhad *ctx, u32 reg, u32 val)  in had_write_register()  function
255 	had_write_register(intelhaddata, AUD_CONFIG,  in had_enable_audio()
268 	had_write_register(ctx, AUD_HDMI_STATUS, status_reg);  in had_ack_irqs()
275 	had_write_register(intelhaddata, AUD_HDMI_STATUS,  in had_reset_audio()
277 	had_write_register(intelhaddata, AUD_HDMI_STATUS, 0);  in had_reset_audio()
324 	had_write_register(intelhaddata,  in had_prog_status_reg()
341 	had_write_register(intelhaddata,  in had_prog_status_reg()
363 	had_write_register(intelhaddata, AUD_BUF_CONFIG, buf_cfg.regval);  in had_init_audio_ctrl()
386 	had_write_register(intelhaddata, AUD_CONFIG, cfg_val.regval);  in had_init_audio_ctrl()
606 	had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.regval);  in had_prog_dip()
628 	had_write_register(intelhaddata, AUD_HDMIW_INFOFR, info_frame);  in had_prog_dip()
629 	had_write_register(intelhaddata, AUD_HDMIW_INFOFR, frame2.regval);  in had_prog_dip()
630 	had_write_register(intelhaddata, AUD_HDMIW_INFOFR, frame3.regval);  in had_prog_dip()
634 		had_write_register(intelhaddata, AUD_HDMIW_INFOFR, 0x0);  in had_prog_dip()
638 	had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.regval);  in had_prog_dip()
748 	had_write_register(intelhaddata, AUD_HDMI_CTS, (BIT(24) | cts_val));  in had_prog_cts()
823 	had_write_register(intelhaddata, AUD_N_ENABLE, (BIT(24) | n_val));  in had_prog_n()
882 	had_write_register(intelhaddata, AUD_BUF_ADDR(idx), addr);  in had_prog_bd()
883 	had_write_register(intelhaddata, AUD_BUF_LEN(idx),  in had_prog_bd()
897 	had_write_register(intelhaddata, AUD_BUF_ADDR(idx), 0);  in had_invalidate_bd()
898 	had_write_register(intelhaddata, AUD_BUF_LEN(idx), 0);  in had_invalidate_bd()
1025 		had_write_register(intelhaddata, AUD_HDMI_STATUS, val);  in wait_clear_underrun_bit()
1233 	had_write_register(intelhaddata, AUD_BUF_CH_SWAP, SWAP_LFE_CENTER);  in had_pcm_prepare()