1 // SPDX-License-Identifier: GPL-2.0-only
3  * omap-mcbsp.c  --  OMAP ALSA SoC DAI driver using McBSP port
23 #include "omap-mcbsp-priv.h"
24 #include "omap-mcbsp.h"
25 #include "sdma-pcm.h"
40 	dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);  in omap_mcbsp_dump_reg()
41 	dev_dbg(mcbsp->dev, "DRR2:  0x%04x\n", MCBSP_READ(mcbsp, DRR2));  in omap_mcbsp_dump_reg()
42 	dev_dbg(mcbsp->dev, "DRR1:  0x%04x\n", MCBSP_READ(mcbsp, DRR1));  in omap_mcbsp_dump_reg()
43 	dev_dbg(mcbsp->dev, "DXR2:  0x%04x\n", MCBSP_READ(mcbsp, DXR2));  in omap_mcbsp_dump_reg()
44 	dev_dbg(mcbsp->dev, "DXR1:  0x%04x\n", MCBSP_READ(mcbsp, DXR1));  in omap_mcbsp_dump_reg()
45 	dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n", MCBSP_READ(mcbsp, SPCR2));  in omap_mcbsp_dump_reg()
46 	dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n", MCBSP_READ(mcbsp, SPCR1));  in omap_mcbsp_dump_reg()
47 	dev_dbg(mcbsp->dev, "RCR2:  0x%04x\n", MCBSP_READ(mcbsp, RCR2));  in omap_mcbsp_dump_reg()
48 	dev_dbg(mcbsp->dev, "RCR1:  0x%04x\n", MCBSP_READ(mcbsp, RCR1));  in omap_mcbsp_dump_reg()
49 	dev_dbg(mcbsp->dev, "XCR2:  0x%04x\n", MCBSP_READ(mcbsp, XCR2));  in omap_mcbsp_dump_reg()
50 	dev_dbg(mcbsp->dev, "XCR1:  0x%04x\n", MCBSP_READ(mcbsp, XCR1));  in omap_mcbsp_dump_reg()
51 	dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n", MCBSP_READ(mcbsp, SRGR2));  in omap_mcbsp_dump_reg()
52 	dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n", MCBSP_READ(mcbsp, SRGR1));  in omap_mcbsp_dump_reg()
53 	dev_dbg(mcbsp->dev, "PCR0:  0x%04x\n", MCBSP_READ(mcbsp, PCR0));  in omap_mcbsp_dump_reg()
54 	dev_dbg(mcbsp->dev, "***********************\n");  in omap_mcbsp_dump_reg()
68 		return -EINVAL;  in omap2_mcbsp_set_clks_src()
70 	fck_src = clk_get(mcbsp->dev, src);  in omap2_mcbsp_set_clks_src()
72 		dev_info(mcbsp->dev, "CLKS: could not clk_get() %s\n", src);  in omap2_mcbsp_set_clks_src()
76 	if (mcbsp->active)  in omap2_mcbsp_set_clks_src()
77 		pm_runtime_put_sync(mcbsp->dev);  in omap2_mcbsp_set_clks_src()
79 	r = clk_set_parent(mcbsp->fclk, fck_src);  in omap2_mcbsp_set_clks_src()
81 		dev_err(mcbsp->dev, "CLKS: could not clk_set_parent() to %s\n",  in omap2_mcbsp_set_clks_src()
84 	if (mcbsp->active)  in omap2_mcbsp_set_clks_src()
85 		pm_runtime_get_sync(mcbsp->dev);  in omap2_mcbsp_set_clks_src()
98 	dev_dbg(mcbsp->dev, "IRQ callback : 0x%x\n", irqst);  in omap_mcbsp_irq_handler()
101 		dev_err(mcbsp->dev, "RX Frame Sync Error!\n");  in omap_mcbsp_irq_handler()
103 		dev_dbg(mcbsp->dev, "RX Frame Sync\n");  in omap_mcbsp_irq_handler()
105 		dev_dbg(mcbsp->dev, "RX End Of Frame\n");  in omap_mcbsp_irq_handler()
107 		dev_dbg(mcbsp->dev, "RX Buffer Threshold Reached\n");  in omap_mcbsp_irq_handler()
109 		dev_err(mcbsp->dev, "RX Buffer Underflow!\n");  in omap_mcbsp_irq_handler()
111 		dev_err(mcbsp->dev, "RX Buffer Overflow!\n");  in omap_mcbsp_irq_handler()
114 		dev_err(mcbsp->dev, "TX Frame Sync Error!\n");  in omap_mcbsp_irq_handler()
116 		dev_dbg(mcbsp->dev, "TX Frame Sync\n");  in omap_mcbsp_irq_handler()
118 		dev_dbg(mcbsp->dev, "TX End Of Frame\n");  in omap_mcbsp_irq_handler()
120 		dev_dbg(mcbsp->dev, "TX Buffer threshold Reached\n");  in omap_mcbsp_irq_handler()
122 		dev_err(mcbsp->dev, "TX Buffer Underflow!\n");  in omap_mcbsp_irq_handler()
124 		dev_err(mcbsp->dev, "TX Buffer Overflow!\n");  in omap_mcbsp_irq_handler()
126 		dev_dbg(mcbsp->dev, "TX Buffer empty at end of frame\n");  in omap_mcbsp_irq_handler()
139 	dev_dbg(mcbsp->dev, "TX IRQ callback : 0x%x\n", irqst_spcr2);  in omap_mcbsp_tx_irq_handler()
142 		dev_err(mcbsp->dev, "TX Frame Sync Error! : 0x%x\n",  in omap_mcbsp_tx_irq_handler()
157 	dev_dbg(mcbsp->dev, "RX IRQ callback : 0x%x\n", irqst_spcr1);  in omap_mcbsp_rx_irq_handler()
160 		dev_err(mcbsp->dev, "RX Frame Sync Error! : 0x%x\n",  in omap_mcbsp_rx_irq_handler()
178 	dev_dbg(mcbsp->dev, "Configuring McBSP%d  phys_base: 0x%08lx\n",  in omap_mcbsp_config()
179 		mcbsp->id, mcbsp->phys_base);  in omap_mcbsp_config()
182 	MCBSP_WRITE(mcbsp, SPCR2, config->spcr2);  in omap_mcbsp_config()
183 	MCBSP_WRITE(mcbsp, SPCR1, config->spcr1);  in omap_mcbsp_config()
184 	MCBSP_WRITE(mcbsp, RCR2, config->rcr2);  in omap_mcbsp_config()
185 	MCBSP_WRITE(mcbsp, RCR1, config->rcr1);  in omap_mcbsp_config()
186 	MCBSP_WRITE(mcbsp, XCR2, config->xcr2);  in omap_mcbsp_config()
187 	MCBSP_WRITE(mcbsp, XCR1, config->xcr1);  in omap_mcbsp_config()
188 	MCBSP_WRITE(mcbsp, SRGR2, config->srgr2);  in omap_mcbsp_config()
189 	MCBSP_WRITE(mcbsp, SRGR1, config->srgr1);  in omap_mcbsp_config()
190 	MCBSP_WRITE(mcbsp, MCR2, config->mcr2);  in omap_mcbsp_config()
191 	MCBSP_WRITE(mcbsp, MCR1, config->mcr1);  in omap_mcbsp_config()
192 	MCBSP_WRITE(mcbsp, PCR0, config->pcr0);  in omap_mcbsp_config()
193 	if (mcbsp->pdata->has_ccr) {  in omap_mcbsp_config()
194 		MCBSP_WRITE(mcbsp, XCCR, config->xccr);  in omap_mcbsp_config()
195 		MCBSP_WRITE(mcbsp, RCCR, config->rccr);  in omap_mcbsp_config()
197 	/* Enable wakeup behavior */  in omap_mcbsp_config()
198 	if (mcbsp->pdata->has_wakeup)  in omap_mcbsp_config()
202 	if (mcbsp->irq)  in omap_mcbsp_config()
208  * omap_mcbsp_dma_reg_params - returns the address of mcbsp data register
221 		if (mcbsp->pdata->reg_size == 2)  in omap_mcbsp_dma_reg_params()
226 		if (mcbsp->pdata->reg_size == 2)  in omap_mcbsp_dma_reg_params()
232 	return mcbsp->phys_dma_base + data_reg * mcbsp->pdata->reg_step;  in omap_mcbsp_dma_reg_params()
237  * The threshold parameter is 1 based, and it is converted (threshold - 1)
242 	if (threshold && threshold <= mcbsp->max_tx_thres)  in omap_mcbsp_set_tx_threshold()
243 		MCBSP_WRITE(mcbsp, THRSH2, threshold - 1);  in omap_mcbsp_set_tx_threshold()
248  * The threshold parameter is 1 based, and it is converted (threshold - 1)
253 	if (threshold && threshold <= mcbsp->max_rx_thres)  in omap_mcbsp_set_rx_threshold()
254 		MCBSP_WRITE(mcbsp, THRSH1, threshold - 1);  in omap_mcbsp_set_rx_threshold()
268 	return mcbsp->pdata->buffer_size - buffstat;  in omap_mcbsp_get_tx_delay()
288 		return threshold - buffstat;  in omap_mcbsp_get_rx_delay()
296 	reg_cache = kzalloc(mcbsp->reg_cache_size, GFP_KERNEL);  in omap_mcbsp_request()
298 		return -ENOMEM;  in omap_mcbsp_request()
300 	spin_lock(&mcbsp->lock);  in omap_mcbsp_request()
301 	if (!mcbsp->free) {  in omap_mcbsp_request()
302 		dev_err(mcbsp->dev, "McBSP%d is currently in use\n", mcbsp->id);  in omap_mcbsp_request()
303 		err = -EBUSY;  in omap_mcbsp_request()
307 	mcbsp->free = false;  in omap_mcbsp_request()
308 	mcbsp->reg_cache = reg_cache;  in omap_mcbsp_request()
309 	spin_unlock(&mcbsp->lock);  in omap_mcbsp_request()
311 	if(mcbsp->pdata->ops && mcbsp->pdata->ops->request)  in omap_mcbsp_request()
312 		mcbsp->pdata->ops->request(mcbsp->id - 1);  in omap_mcbsp_request()
315 	 * Make sure that transmitter, receiver and sample-rate generator are  in omap_mcbsp_request()
321 	if (mcbsp->irq) {  in omap_mcbsp_request()
322 		err = request_irq(mcbsp->irq, omap_mcbsp_irq_handler, 0,  in omap_mcbsp_request()
325 			dev_err(mcbsp->dev, "Unable to request IRQ\n");  in omap_mcbsp_request()
329 		err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler, 0,  in omap_mcbsp_request()
332 			dev_err(mcbsp->dev, "Unable to request TX IRQ\n");  in omap_mcbsp_request()
336 		err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler, 0,  in omap_mcbsp_request()
339 			dev_err(mcbsp->dev, "Unable to request RX IRQ\n");  in omap_mcbsp_request()
346 	free_irq(mcbsp->tx_irq, (void *)mcbsp);  in omap_mcbsp_request()
348 	if(mcbsp->pdata->ops && mcbsp->pdata->ops->free)  in omap_mcbsp_request()
349 		mcbsp->pdata->ops->free(mcbsp->id - 1);  in omap_mcbsp_request()
351 	/* Disable wakeup behavior */  in omap_mcbsp_request()
352 	if (mcbsp->pdata->has_wakeup)  in omap_mcbsp_request()
355 	spin_lock(&mcbsp->lock);  in omap_mcbsp_request()
356 	mcbsp->free = true;  in omap_mcbsp_request()
357 	mcbsp->reg_cache = NULL;  in omap_mcbsp_request()
359 	spin_unlock(&mcbsp->lock);  in omap_mcbsp_request()
369 	if(mcbsp->pdata->ops && mcbsp->pdata->ops->free)  in omap_mcbsp_free()
370 		mcbsp->pdata->ops->free(mcbsp->id - 1);  in omap_mcbsp_free()
372 	/* Disable wakeup behavior */  in omap_mcbsp_free()
373 	if (mcbsp->pdata->has_wakeup)  in omap_mcbsp_free()
377 	if (mcbsp->irq) {  in omap_mcbsp_free()
380 		free_irq(mcbsp->irq, (void *)mcbsp);  in omap_mcbsp_free()
382 		free_irq(mcbsp->rx_irq, (void *)mcbsp);  in omap_mcbsp_free()
383 		free_irq(mcbsp->tx_irq, (void *)mcbsp);  in omap_mcbsp_free()
386 	reg_cache = mcbsp->reg_cache;  in omap_mcbsp_free()
398 	spin_lock(&mcbsp->lock);  in omap_mcbsp_free()
399 	if (mcbsp->free)  in omap_mcbsp_free()
400 		dev_err(mcbsp->dev, "McBSP%d was not reserved\n", mcbsp->id);  in omap_mcbsp_free()
402 		mcbsp->free = true;  in omap_mcbsp_free()
403 	mcbsp->reg_cache = NULL;  in omap_mcbsp_free()
404 	spin_unlock(&mcbsp->lock);  in omap_mcbsp_free()
411  * If no transmitter or receiver is active prior calling, then sample-rate
421 	if (mcbsp->st_data)  in omap_mcbsp_start()
447 	 * REVISIT: 100us may give enough time for two CLKSRG, however  in omap_mcbsp_start()
449 	 * is now at 500us.  in omap_mcbsp_start()
459 	if (mcbsp->pdata->has_ccr) {  in omap_mcbsp_start()
482 	if (mcbsp->pdata->has_ccr) {  in omap_mcbsp_stop()
492 	if (mcbsp->pdata->has_ccr) {  in omap_mcbsp_stop()
509 	if (mcbsp->st_data)  in omap_mcbsp_stop()
513 #define max_thres(m)			(mcbsp->pdata->buffer_size)
521 	return sysfs_emit(buf, "%u\n", mcbsp->prop);			\
537 		return -EDOM;						\
539 	mcbsp->prop = val;						\
560 	dma_op_mode = mcbsp->dma_op_mode;  in dma_op_mode_show()
584 	spin_lock_irq(&mcbsp->lock);  in dma_op_mode_store()
585 	if (!mcbsp->free) {  in dma_op_mode_store()
586 		size = -EBUSY;  in dma_op_mode_store()
589 	mcbsp->dma_op_mode = i;  in dma_op_mode_store()
592 	spin_unlock_irq(&mcbsp->lock);  in dma_op_mode_store()
620 	spin_lock_init(&mcbsp->lock);  in omap_mcbsp_init()
621 	mcbsp->free = true;  in omap_mcbsp_init()
627 	mcbsp->io_base = devm_ioremap_resource(&pdev->dev, res);  in omap_mcbsp_init()
628 	if (IS_ERR(mcbsp->io_base))  in omap_mcbsp_init()
629 		return PTR_ERR(mcbsp->io_base);  in omap_mcbsp_init()
631 	mcbsp->phys_base = res->start;  in omap_mcbsp_init()
632 	mcbsp->reg_cache_size = resource_size(res);  in omap_mcbsp_init()
636 		mcbsp->phys_dma_base = mcbsp->phys_base;  in omap_mcbsp_init()
638 		mcbsp->phys_dma_base = res->start;  in omap_mcbsp_init()
647 	mcbsp->irq = platform_get_irq_byname(pdev, "common");  in omap_mcbsp_init()
648 	if (mcbsp->irq == -ENXIO) {  in omap_mcbsp_init()
649 		mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");  in omap_mcbsp_init()
651 		if (mcbsp->tx_irq == -ENXIO) {  in omap_mcbsp_init()
652 			mcbsp->irq = platform_get_irq(pdev, 0);  in omap_mcbsp_init()
653 			mcbsp->tx_irq = 0;  in omap_mcbsp_init()
655 			mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");  in omap_mcbsp_init()
656 			mcbsp->irq = 0;  in omap_mcbsp_init()
660 	if (!pdev->dev.of_node) {  in omap_mcbsp_init()
663 			dev_err(&pdev->dev, "invalid tx DMA channel\n");  in omap_mcbsp_init()
664 			return -ENODEV;  in omap_mcbsp_init()
666 		mcbsp->dma_req[0] = res->start;  in omap_mcbsp_init()
667 		mcbsp->dma_data[0].filter_data = &mcbsp->dma_req[0];  in omap_mcbsp_init()
671 			dev_err(&pdev->dev, "invalid rx DMA channel\n");  in omap_mcbsp_init()
672 			return -ENODEV;  in omap_mcbsp_init()
674 		mcbsp->dma_req[1] = res->start;  in omap_mcbsp_init()
675 		mcbsp->dma_data[1].filter_data = &mcbsp->dma_req[1];  in omap_mcbsp_init()
677 		mcbsp->dma_data[0].filter_data = "tx";  in omap_mcbsp_init()
678 		mcbsp->dma_data[1].filter_data = "rx";  in omap_mcbsp_init()
681 	mcbsp->dma_data[0].addr = omap_mcbsp_dma_reg_params(mcbsp,  in omap_mcbsp_init()
683 	mcbsp->dma_data[1].addr = omap_mcbsp_dma_reg_params(mcbsp,  in omap_mcbsp_init()
686 	mcbsp->fclk = devm_clk_get(&pdev->dev, "fck");  in omap_mcbsp_init()
687 	if (IS_ERR(mcbsp->fclk)) {  in omap_mcbsp_init()
688 		ret = PTR_ERR(mcbsp->fclk);  in omap_mcbsp_init()
689 		dev_err(mcbsp->dev, "unable to get fck: %d\n", ret);  in omap_mcbsp_init()
693 	mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;  in omap_mcbsp_init()
694 	if (mcbsp->pdata->buffer_size) {  in omap_mcbsp_init()
703 		mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10;  in omap_mcbsp_init()
704 		mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10;  in omap_mcbsp_init()
706 		ret = devm_device_add_group(mcbsp->dev, &additional_attr_group);  in omap_mcbsp_init()
708 			dev_err(mcbsp->dev,  in omap_mcbsp_init()
730 	if (mcbsp->pdata->buffer_size == 0)  in omap_mcbsp_set_threshold()
745 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)  in omap_mcbsp_set_threshold()
758 	struct omap_mcbsp *mcbsp = rule->private;  in omap_mcbsp_hwrule_min_buffersize()
763 	size = mcbsp->pdata->buffer_size;  in omap_mcbsp_hwrule_min_buffersize()
765 	frames.min = size / channels->min;  in omap_mcbsp_hwrule_min_buffersize()
794 	if (mcbsp->pdata->buffer_size) {  in omap_mcbsp_dai_startup()
800 		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)  in omap_mcbsp_dai_startup()
801 			snd_pcm_hw_rule_add(substream->runtime, 0,  in omap_mcbsp_dai_startup()
805 					    SNDRV_PCM_HW_PARAM_CHANNELS, -1);  in omap_mcbsp_dai_startup()
808 		snd_pcm_hw_constraint_step(substream->runtime, 0,  in omap_mcbsp_dai_startup()
819 	int tx = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);  in omap_mcbsp_dai_shutdown()
823 	if (mcbsp->latency[stream2])  in omap_mcbsp_dai_shutdown()
824 		cpu_latency_qos_update_request(&mcbsp->pm_qos_req,  in omap_mcbsp_dai_shutdown()
825 					       mcbsp->latency[stream2]);  in omap_mcbsp_dai_shutdown()
826 	else if (mcbsp->latency[stream1])  in omap_mcbsp_dai_shutdown()
827 		cpu_latency_qos_remove_request(&mcbsp->pm_qos_req);  in omap_mcbsp_dai_shutdown()
829 	mcbsp->latency[stream1] = 0;  in omap_mcbsp_dai_shutdown()
833 		mcbsp->configured = 0;  in omap_mcbsp_dai_shutdown()
841 	struct pm_qos_request *pm_qos_req = &mcbsp->pm_qos_req;  in omap_mcbsp_dai_prepare()
842 	int tx = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);  in omap_mcbsp_dai_prepare()
845 	int latency = mcbsp->latency[stream2];  in omap_mcbsp_dai_prepare()  local
848 	if (!latency || mcbsp->latency[stream1] < latency)  in omap_mcbsp_dai_prepare()
849 		latency = mcbsp->latency[stream1];  in omap_mcbsp_dai_prepare()
852 		cpu_latency_qos_update_request(pm_qos_req, latency);  in omap_mcbsp_dai_prepare()
853 	else if (latency)  in omap_mcbsp_dai_prepare()
854 		cpu_latency_qos_add_request(pm_qos_req, latency);  in omap_mcbsp_dai_prepare()
868 		mcbsp->active++;  in omap_mcbsp_dai_trigger()
869 		omap_mcbsp_start(mcbsp, substream->stream);  in omap_mcbsp_dai_trigger()
875 		omap_mcbsp_stop(mcbsp, substream->stream);  in omap_mcbsp_dai_trigger()
876 		mcbsp->active--;  in omap_mcbsp_dai_trigger()
879 		return -EINVAL;  in omap_mcbsp_dai_trigger()
896 	if (mcbsp->pdata->buffer_size == 0)  in omap_mcbsp_dai_delay()
899 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)  in omap_mcbsp_dai_delay()
909 	delay = fifo_use / substream->runtime->channels;  in omap_mcbsp_dai_delay()
919 	struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs;  in omap_mcbsp_dai_hw_params()
924 	unsigned int buffer_size = mcbsp->pdata->buffer_size;  in omap_mcbsp_dai_hw_params()
937 		return -EINVAL;  in omap_mcbsp_dai_hw_params()
940 		int latency;  in omap_mcbsp_dai_hw_params()  local
942 		if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) {  in omap_mcbsp_dai_hw_params()
947 			if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)  in omap_mcbsp_dai_hw_params()
948 				max_thrsh = mcbsp->max_tx_thres;  in omap_mcbsp_dai_hw_params()
950 				max_thrsh = mcbsp->max_rx_thres;  in omap_mcbsp_dai_hw_params()
965 				return -EINVAL;  in omap_mcbsp_dai_hw_params()
973 		latency = (buffer_size - pkt_size) / channels;  in omap_mcbsp_dai_hw_params()
974 		latency = latency * USEC_PER_SEC /  in omap_mcbsp_dai_hw_params()
975 			  (params->rate_num / params->rate_den);  in omap_mcbsp_dai_hw_params()
976 		mcbsp->latency[substream->stream] = latency;  in omap_mcbsp_dai_hw_params()
981 	dma_data->maxburst = pkt_size;  in omap_mcbsp_dai_hw_params()
983 	if (mcbsp->configured) {  in omap_mcbsp_dai_hw_params()
988 	regs->rcr2	&= ~(RPHASE | RFRLEN2(0x7f) | RWDLEN2(7));  in omap_mcbsp_dai_hw_params()
989 	regs->xcr2	&= ~(RPHASE | XFRLEN2(0x7f) | XWDLEN2(7));  in omap_mcbsp_dai_hw_params()
990 	regs->rcr1	&= ~(RFRLEN1(0x7f) | RWDLEN1(7));  in omap_mcbsp_dai_hw_params()
991 	regs->xcr1	&= ~(XFRLEN1(0x7f) | XWDLEN1(7));  in omap_mcbsp_dai_hw_params()
992 	format = mcbsp->fmt & SND_SOC_DAIFMT_FORMAT_MASK;  in omap_mcbsp_dai_hw_params()
996 		/* Use dual-phase frames */  in omap_mcbsp_dai_hw_params()
997 		regs->rcr2	|= RPHASE;  in omap_mcbsp_dai_hw_params()
998 		regs->xcr2	|= XPHASE;  in omap_mcbsp_dai_hw_params()
1000 		wpf--;  in omap_mcbsp_dai_hw_params()
1001 		regs->rcr2	|= RFRLEN2(wpf - 1);  in omap_mcbsp_dai_hw_params()
1002 		regs->xcr2	|= XFRLEN2(wpf - 1);  in omap_mcbsp_dai_hw_params()
1005 	regs->rcr1	|= RFRLEN1(wpf - 1);  in omap_mcbsp_dai_hw_params()
1006 	regs->xcr1	|= XFRLEN1(wpf - 1);  in omap_mcbsp_dai_hw_params()
1011 		regs->rcr2	|= RWDLEN2(OMAP_MCBSP_WORD_16);  in omap_mcbsp_dai_hw_params()
1012 		regs->rcr1	|= RWDLEN1(OMAP_MCBSP_WORD_16);  in omap_mcbsp_dai_hw_params()
1013 		regs->xcr2	|= XWDLEN2(OMAP_MCBSP_WORD_16);  in omap_mcbsp_dai_hw_params()
1014 		regs->xcr1	|= XWDLEN1(OMAP_MCBSP_WORD_16);  in omap_mcbsp_dai_hw_params()
1018 		regs->rcr2	|= RWDLEN2(OMAP_MCBSP_WORD_32);  in omap_mcbsp_dai_hw_params()
1019 		regs->rcr1	|= RWDLEN1(OMAP_MCBSP_WORD_32);  in omap_mcbsp_dai_hw_params()
1020 		regs->xcr2	|= XWDLEN2(OMAP_MCBSP_WORD_32);  in omap_mcbsp_dai_hw_params()
1021 		regs->xcr1	|= XWDLEN1(OMAP_MCBSP_WORD_32);  in omap_mcbsp_dai_hw_params()
1025 		return -EINVAL;  in omap_mcbsp_dai_hw_params()
1030 	master = mcbsp->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK;  in omap_mcbsp_dai_hw_params()
1032 		div = mcbsp->clk_div ? mcbsp->clk_div : 1;  in omap_mcbsp_dai_hw_params()
1033 		framesize = (mcbsp->in_freq / div) / params_rate(params);  in omap_mcbsp_dai_hw_params()
1038 			return -EINVAL;  in omap_mcbsp_dai_hw_params()
1044 	regs->srgr2	&= ~FPER(0xfff);  in omap_mcbsp_dai_hw_params()
1045 	regs->srgr1	&= ~FWID(0xff);  in omap_mcbsp_dai_hw_params()
1049 		regs->srgr2	|= FPER(framesize - 1);  in omap_mcbsp_dai_hw_params()
1050 		regs->srgr1	|= FWID((framesize >> 1) - 1);  in omap_mcbsp_dai_hw_params()
1054 		regs->srgr2	|= FPER(framesize - 1);  in omap_mcbsp_dai_hw_params()
1055 		regs->srgr1	|= FWID(0);  in omap_mcbsp_dai_hw_params()
1059 	omap_mcbsp_config(mcbsp, &mcbsp->cfg_regs);  in omap_mcbsp_dai_hw_params()
1060 	mcbsp->wlen = wlen;  in omap_mcbsp_dai_hw_params()
1061 	mcbsp->configured = 1;  in omap_mcbsp_dai_hw_params()
1074 	struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs;  in omap_mcbsp_dai_set_dai_fmt()
1077 	if (mcbsp->configured)  in omap_mcbsp_dai_set_dai_fmt()
1080 	mcbsp->fmt = fmt;  in omap_mcbsp_dai_set_dai_fmt()
1083 	regs->spcr2	|= XINTM(3) | FREE;  in omap_mcbsp_dai_set_dai_fmt()
1084 	regs->spcr1	|= RINTM(3);  in omap_mcbsp_dai_set_dai_fmt()
1086 	if (!mcbsp->pdata->has_ccr) {  in omap_mcbsp_dai_set_dai_fmt()
1087 		regs->rcr2	|= RFIG;  in omap_mcbsp_dai_set_dai_fmt()
1088 		regs->xcr2	|= XFIG;  in omap_mcbsp_dai_set_dai_fmt()
1092 	if (mcbsp->pdata->has_ccr) {  in omap_mcbsp_dai_set_dai_fmt()
1093 		regs->xccr = DXENDLY(1) | XDMAEN | XDISABLE;  in omap_mcbsp_dai_set_dai_fmt()
1094 		regs->rccr = RFULL_CYCLE | RDMAEN | RDISABLE;  in omap_mcbsp_dai_set_dai_fmt()
1099 		/* 1-bit data delay */  in omap_mcbsp_dai_set_dai_fmt()
1100 		regs->rcr2	|= RDATDLY(1);  in omap_mcbsp_dai_set_dai_fmt()
1101 		regs->xcr2	|= XDATDLY(1);  in omap_mcbsp_dai_set_dai_fmt()
1104 		/* 0-bit data delay */  in omap_mcbsp_dai_set_dai_fmt()
1105 		regs->rcr2	|= RDATDLY(0);  in omap_mcbsp_dai_set_dai_fmt()
1106 		regs->xcr2	|= XDATDLY(0);  in omap_mcbsp_dai_set_dai_fmt()
1107 		regs->spcr1	|= RJUST(2);  in omap_mcbsp_dai_set_dai_fmt()
1112 		/* 1-bit data delay */  in omap_mcbsp_dai_set_dai_fmt()
1113 		regs->rcr2      |= RDATDLY(1);  in omap_mcbsp_dai_set_dai_fmt()
1114 		regs->xcr2      |= XDATDLY(1);  in omap_mcbsp_dai_set_dai_fmt()
1119 		/* 0-bit data delay */  in omap_mcbsp_dai_set_dai_fmt()
1120 		regs->rcr2      |= RDATDLY(0);  in omap_mcbsp_dai_set_dai_fmt()
1121 		regs->xcr2      |= XDATDLY(0);  in omap_mcbsp_dai_set_dai_fmt()
1127 		return -EINVAL;  in omap_mcbsp_dai_set_dai_fmt()
1133 		regs->pcr0	|= FSXM | FSRM |  in omap_mcbsp_dai_set_dai_fmt()
1136 		regs->srgr2	|= FSGM;  in omap_mcbsp_dai_set_dai_fmt()
1140 		regs->srgr2	|= FSGM;  in omap_mcbsp_dai_set_dai_fmt()
1141 		regs->pcr0	|= FSXM | FSRM;  in omap_mcbsp_dai_set_dai_fmt()
1148 		return -EINVAL;  in omap_mcbsp_dai_set_dai_fmt()
1159 		regs->pcr0	|= FSXP | FSRP |  in omap_mcbsp_dai_set_dai_fmt()
1163 		regs->pcr0	|= CLKXP | CLKRP;  in omap_mcbsp_dai_set_dai_fmt()
1166 		regs->pcr0	|= FSXP | FSRP;  in omap_mcbsp_dai_set_dai_fmt()
1171 		return -EINVAL;  in omap_mcbsp_dai_set_dai_fmt()
1174 		regs->pcr0 ^= FSXP | FSRP;  in omap_mcbsp_dai_set_dai_fmt()
1183 	struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs;  in omap_mcbsp_dai_set_clkdiv()
1186 		return -ENODEV;  in omap_mcbsp_dai_set_clkdiv()
1188 	mcbsp->clk_div = div;  in omap_mcbsp_dai_set_clkdiv()
1189 	regs->srgr1	&= ~CLKGDV(0xff);  in omap_mcbsp_dai_set_clkdiv()
1190 	regs->srgr1	|= CLKGDV(div - 1);  in omap_mcbsp_dai_set_clkdiv()
1200 	struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs;  in omap_mcbsp_dai_set_dai_sysclk()
1203 	if (mcbsp->active) {  in omap_mcbsp_dai_set_dai_sysclk()
1204 		if (freq == mcbsp->in_freq)  in omap_mcbsp_dai_set_dai_sysclk()
1207 			return -EBUSY;  in omap_mcbsp_dai_set_dai_sysclk()
1210 	mcbsp->in_freq = freq;  in omap_mcbsp_dai_set_dai_sysclk()
1211 	regs->srgr2 &= ~CLKSM;  in omap_mcbsp_dai_set_dai_sysclk()
1212 	regs->pcr0 &= ~SCLKME;  in omap_mcbsp_dai_set_dai_sysclk()
1216 		regs->srgr2	|= CLKSM;  in omap_mcbsp_dai_set_dai_sysclk()
1220 			err = -EINVAL;  in omap_mcbsp_dai_set_dai_sysclk()
1236 		regs->srgr2	|= CLKSM;  in omap_mcbsp_dai_set_dai_sysclk()
1237 		regs->pcr0	|= SCLKME;  in omap_mcbsp_dai_set_dai_sysclk()
1244 		regs->pcr0	&= ~CLKXM;  in omap_mcbsp_dai_set_dai_sysclk()
1247 		regs->pcr0	|= SCLKME;  in omap_mcbsp_dai_set_dai_sysclk()
1249 		regs->pcr0	&= ~CLKRM;  in omap_mcbsp_dai_set_dai_sysclk()
1252 		err = -ENODEV;  in omap_mcbsp_dai_set_dai_sysclk()
1262 	pm_runtime_enable(mcbsp->dev);  in omap_mcbsp_probe()
1265 				  &mcbsp->dma_data[SNDRV_PCM_STREAM_PLAYBACK],  in omap_mcbsp_probe()
1266 				  &mcbsp->dma_data[SNDRV_PCM_STREAM_CAPTURE]);  in omap_mcbsp_probe()
1275 	pm_runtime_disable(mcbsp->dev);  in omap_mcbsp_remove()
1311 	.name			= "omap-mcbsp",
1342 		.compatible = "ti,omap2420-mcbsp",
1346 		.compatible = "ti,omap2430-mcbsp",
1350 		.compatible = "ti,omap3-mcbsp",
1354 		.compatible = "ti,omap4-mcbsp",
1363 	struct omap_mcbsp_platform_data *pdata = dev_get_platdata(&pdev->dev);  in asoc_mcbsp_probe()
1365 		device_get_match_data(&pdev->dev);  in asoc_mcbsp_probe()
1370 		struct device_node *node = pdev->dev.of_node;  in asoc_mcbsp_probe()
1374 		pdata = devm_kmemdup(&pdev->dev, match_pdata,  in asoc_mcbsp_probe()
1378 			return -ENOMEM;  in asoc_mcbsp_probe()
1380 		if (!of_property_read_u32(node, "ti,buffer-size", &buffer_size))  in asoc_mcbsp_probe()
1381 			pdata->buffer_size = buffer_size;  in asoc_mcbsp_probe()
1383 			pdata->force_ick_on = pdata_quirk->force_ick_on;  in asoc_mcbsp_probe()
1385 		dev_err(&pdev->dev, "missing platform data.\n");  in asoc_mcbsp_probe()
1386 		return -EINVAL;  in asoc_mcbsp_probe()
1388 	mcbsp = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcbsp), GFP_KERNEL);  in asoc_mcbsp_probe()
1390 		return -ENOMEM;  in asoc_mcbsp_probe()
1392 	mcbsp->id = pdev->id;  in asoc_mcbsp_probe()
1393 	mcbsp->pdata = pdata;  in asoc_mcbsp_probe()
1394 	mcbsp->dev = &pdev->dev;  in asoc_mcbsp_probe()
1401 	if (mcbsp->pdata->reg_size == 2) {  in asoc_mcbsp_probe()
1406 	ret = devm_snd_soc_register_component(&pdev->dev,  in asoc_mcbsp_probe()
1412 	return sdma_pcm_platform_register(&pdev->dev, "tx", "rx");  in asoc_mcbsp_probe()
1419 	if (mcbsp->pdata->ops && mcbsp->pdata->ops->free)  in asoc_mcbsp_remove()
1420 		mcbsp->pdata->ops->free(mcbsp->id);  in asoc_mcbsp_remove()
1422 	if (cpu_latency_qos_request_active(&mcbsp->pm_qos_req))  in asoc_mcbsp_remove()
1423 		cpu_latency_qos_remove_request(&mcbsp->pm_qos_req);  in asoc_mcbsp_remove()
1428 			.name = "omap-mcbsp",
1441 MODULE_ALIAS("platform:omap-mcbsp");