Lines Matching full:asrc
4 // tegra186_asrc.c - Tegra186 ASRC driver
69 static void tegra186_asrc_lock_stream(struct tegra186_asrc *asrc, in tegra186_asrc_lock_stream() argument
72 regmap_write(asrc->regmap, in tegra186_asrc_lock_stream()
80 struct tegra186_asrc *asrc = dev_get_drvdata(dev); in tegra186_asrc_runtime_suspend() local
82 regcache_cache_only(asrc->regmap, true); in tegra186_asrc_runtime_suspend()
83 regcache_mark_dirty(asrc->regmap); in tegra186_asrc_runtime_suspend()
90 struct tegra186_asrc *asrc = dev_get_drvdata(dev); in tegra186_asrc_runtime_resume() local
93 regcache_cache_only(asrc->regmap, false); in tegra186_asrc_runtime_resume()
100 regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_SCRATCH_ADDR, in tegra186_asrc_runtime_resume()
101 asrc->soc_data->aram_start_addr); in tegra186_asrc_runtime_resume()
102 regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_ENB, in tegra186_asrc_runtime_resume()
105 regcache_sync(asrc->regmap); in tegra186_asrc_runtime_resume()
108 if (asrc->lane[id].ratio_source != in tegra186_asrc_runtime_resume()
112 regmap_write(asrc->regmap, in tegra186_asrc_runtime_resume()
115 asrc->lane[id].int_part); in tegra186_asrc_runtime_resume()
117 regmap_write(asrc->regmap, in tegra186_asrc_runtime_resume()
120 asrc->lane[id].frac_part); in tegra186_asrc_runtime_resume()
122 tegra186_asrc_lock_stream(asrc, id); in tegra186_asrc_runtime_resume()
128 static int tegra186_asrc_set_audio_cif(struct tegra186_asrc *asrc, in tegra186_asrc_set_audio_cif() argument
156 tegra_set_cif(asrc->regmap, reg, &cif_conf); in tegra186_asrc_set_audio_cif()
166 struct tegra186_asrc *asrc = snd_soc_dai_get_drvdata(dai); in tegra186_asrc_in_hw_params() local
170 regmap_write(asrc->regmap, in tegra186_asrc_in_hw_params()
172 asrc->lane[id].input_thresh); in tegra186_asrc_in_hw_params()
174 ret = tegra186_asrc_set_audio_cif(asrc, params, in tegra186_asrc_in_hw_params()
177 dev_err(dev, "Can't set ASRC RX%d CIF: %d\n", dai->id, ret); in tegra186_asrc_in_hw_params()
189 struct tegra186_asrc *asrc = snd_soc_dai_get_drvdata(dai); in tegra186_asrc_out_hw_params() local
193 regmap_write(asrc->regmap, in tegra186_asrc_out_hw_params()
195 asrc->lane[id].output_thresh); in tegra186_asrc_out_hw_params()
197 ret = tegra186_asrc_set_audio_cif(asrc, params, in tegra186_asrc_out_hw_params()
200 dev_err(dev, "Can't set ASRC TX%d CIF: %d\n", id, ret); in tegra186_asrc_out_hw_params()
205 if (asrc->lane[id].hwcomp_disable) { in tegra186_asrc_out_hw_params()
206 regmap_update_bits(asrc->regmap, in tegra186_asrc_out_hw_params()
211 regmap_update_bits(asrc->regmap, in tegra186_asrc_out_hw_params()
216 regmap_write(asrc->regmap, in tegra186_asrc_out_hw_params()
222 regmap_update_bits(asrc->regmap, in tegra186_asrc_out_hw_params()
224 1, asrc->lane[id].ratio_source); in tegra186_asrc_out_hw_params()
226 if (asrc->lane[id].ratio_source == TEGRA186_ASRC_RATIO_SOURCE_SW) { in tegra186_asrc_out_hw_params()
227 regmap_write(asrc->regmap, in tegra186_asrc_out_hw_params()
229 asrc->lane[id].int_part); in tegra186_asrc_out_hw_params()
230 regmap_write(asrc->regmap, in tegra186_asrc_out_hw_params()
232 asrc->lane[id].frac_part); in tegra186_asrc_out_hw_params()
233 tegra186_asrc_lock_stream(asrc, id); in tegra186_asrc_out_hw_params()
245 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_get_ratio_source() local
248 ucontrol->value.enumerated.item[0] = asrc->lane[id].ratio_source; in tegra186_asrc_get_ratio_source()
259 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_put_ratio_source() local
263 asrc->lane[id].ratio_source = ucontrol->value.enumerated.item[0]; in tegra186_asrc_put_ratio_source()
265 regmap_update_bits_check(asrc->regmap, asrc_private->reg, in tegra186_asrc_put_ratio_source()
267 asrc->lane[id].ratio_source, in tegra186_asrc_put_ratio_source()
279 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_get_ratio_int() local
282 regmap_read(asrc->regmap, in tegra186_asrc_get_ratio_int()
284 &asrc->lane[id].int_part); in tegra186_asrc_get_ratio_int()
286 ucontrol->value.integer.value[0] = asrc->lane[id].int_part; in tegra186_asrc_get_ratio_int()
297 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_put_ratio_int() local
301 if (asrc->lane[id].ratio_source == TEGRA186_ASRC_RATIO_SOURCE_ARAD) { in tegra186_asrc_put_ratio_int()
308 asrc->lane[id].int_part = ucontrol->value.integer.value[0]; in tegra186_asrc_put_ratio_int()
310 regmap_update_bits_check(asrc->regmap, in tegra186_asrc_put_ratio_int()
314 asrc->lane[id].int_part, &change); in tegra186_asrc_put_ratio_int()
316 tegra186_asrc_lock_stream(asrc, id); in tegra186_asrc_put_ratio_int()
327 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_get_ratio_frac() local
330 regmap_read(asrc->regmap, in tegra186_asrc_get_ratio_frac()
332 &asrc->lane[id].frac_part); in tegra186_asrc_get_ratio_frac()
334 ucontrol->value.integer.value[0] = asrc->lane[id].frac_part; in tegra186_asrc_get_ratio_frac()
345 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_put_ratio_frac() local
349 if (asrc->lane[id].ratio_source == TEGRA186_ASRC_RATIO_SOURCE_ARAD) { in tegra186_asrc_put_ratio_frac()
356 asrc->lane[id].frac_part = ucontrol->value.integer.value[0]; in tegra186_asrc_put_ratio_frac()
358 regmap_update_bits_check(asrc->regmap, in tegra186_asrc_put_ratio_frac()
362 asrc->lane[id].frac_part, &change); in tegra186_asrc_put_ratio_frac()
364 tegra186_asrc_lock_stream(asrc, id); in tegra186_asrc_put_ratio_frac()
375 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_get_hwcomp_disable() local
378 ucontrol->value.integer.value[0] = asrc->lane[id].hwcomp_disable; in tegra186_asrc_get_hwcomp_disable()
389 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_put_hwcomp_disable() local
393 if (value == asrc->lane[id].hwcomp_disable) in tegra186_asrc_put_hwcomp_disable()
396 asrc->lane[id].hwcomp_disable = value; in tegra186_asrc_put_hwcomp_disable()
407 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_get_input_threshold() local
410 ucontrol->value.integer.value[0] = (asrc->lane[id].input_thresh & 0x3); in tegra186_asrc_get_input_threshold()
421 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_put_input_threshold() local
423 int value = (asrc->lane[id].input_thresh & ~(0x3)) | in tegra186_asrc_put_input_threshold()
426 if (value == asrc->lane[id].input_thresh) in tegra186_asrc_put_input_threshold()
429 asrc->lane[id].input_thresh = value; in tegra186_asrc_put_input_threshold()
440 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_get_output_threshold() local
443 ucontrol->value.integer.value[0] = (asrc->lane[id].output_thresh & 0x3); in tegra186_asrc_get_output_threshold()
454 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_put_output_threshold() local
456 int value = (asrc->lane[id].output_thresh & ~(0x3)) | in tegra186_asrc_put_output_threshold()
459 if (value == asrc->lane[id].output_thresh) in tegra186_asrc_put_output_threshold()
462 asrc->lane[id].output_thresh = value; in tegra186_asrc_put_output_threshold()
471 struct tegra186_asrc *asrc = dev_get_drvdata(cmpnt->dev); in tegra186_asrc_widget_event() local
475 regmap_write(asrc->regmap, in tegra186_asrc_widget_event()
492 .name = "ASRC-RX-CIF"#id, \
518 .name = "ASRC-TX-CIF"#id, \
543 /* ASRC Input */
551 /* ASRC Output */
965 { .compatible = "nvidia,tegra186-asrc", .data = &soc_data_tegra186 },
966 { .compatible = "nvidia,tegra264-asrc", .data = &soc_data_tegra264 },
974 struct tegra186_asrc *asrc; in tegra186_asrc_platform_probe() local
979 asrc = devm_kzalloc(dev, sizeof(*asrc), GFP_KERNEL); in tegra186_asrc_platform_probe()
980 if (!asrc) in tegra186_asrc_platform_probe()
983 dev_set_drvdata(dev, asrc); in tegra186_asrc_platform_probe()
989 asrc->regmap = devm_regmap_init_mmio(dev, regs, in tegra186_asrc_platform_probe()
991 if (IS_ERR(asrc->regmap)) { in tegra186_asrc_platform_probe()
993 return PTR_ERR(asrc->regmap); in tegra186_asrc_platform_probe()
996 asrc->soc_data = of_device_get_match_data(&pdev->dev); in tegra186_asrc_platform_probe()
998 regcache_cache_only(asrc->regmap, true); in tegra186_asrc_platform_probe()
1000 regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_CFG, in tegra186_asrc_platform_probe()
1005 asrc->lane[i].ratio_source = TEGRA186_ASRC_RATIO_SOURCE_SW; in tegra186_asrc_platform_probe()
1006 asrc->lane[i].int_part = 1; in tegra186_asrc_platform_probe()
1007 asrc->lane[i].frac_part = 0; in tegra186_asrc_platform_probe()
1008 asrc->lane[i].hwcomp_disable = 0; in tegra186_asrc_platform_probe()
1009 asrc->lane[i].input_thresh = in tegra186_asrc_platform_probe()
1011 asrc->lane[i].output_thresh = in tegra186_asrc_platform_probe()
1019 dev_err(dev, "can't register ASRC component, err: %d\n", err); in tegra186_asrc_platform_probe()
1041 .name = "tegra186-asrc",
1051 MODULE_DESCRIPTION("Tegra186 ASRC ASoC driver");