1 // SPDX-License-Identifier: GPL-2.0-or-later
3 // This driver supports the DMIC in Allwinner's H6 SoCs.
93 	if (substream->stream != SNDRV_PCM_STREAM_CAPTURE)  in sun50i_dmic_startup()
94 		return -EINVAL;  in sun50i_dmic_startup()
96 	regmap_update_bits(host->regmap, SUN50I_DMIC_RXFIFO_CTL,  in sun50i_dmic_startup()
99 	regmap_write(host->regmap, SUN50I_DMIC_CNT, SUN50I_DMIC_CNT_N);  in sun50i_dmic_startup()
112 	unsigned int chan_en = (1 << channels) - 1;  in sun50i_dmic_hw_params()
115 	/* DMIC num is N+1 */  in sun50i_dmic_hw_params()
116 	regmap_update_bits(host->regmap, SUN50I_DMIC_CH_NUM,  in sun50i_dmic_hw_params()
118 			   SUN50I_DMIC_CH_NUM_N(channels - 1));  in sun50i_dmic_hw_params()
119 	regmap_write(host->regmap, SUN50I_DMIC_HPF_CTRL, chan_en);  in sun50i_dmic_hw_params()
120 	regmap_update_bits(host->regmap, SUN50I_DMIC_EN_CTL,  in sun50i_dmic_hw_params()
126 		regmap_update_bits(host->regmap, SUN50I_DMIC_RXFIFO_CTL,  in sun50i_dmic_hw_params()
131 		regmap_update_bits(host->regmap, SUN50I_DMIC_RXFIFO_CTL,  in sun50i_dmic_hw_params()
136 		dev_err(cpu_dai->dev, "Invalid format!\n");  in sun50i_dmic_hw_params()
137 		return -EINVAL;  in sun50i_dmic_hw_params()
139 	/* The hardware supports FIFO mode 1 for 24-bit samples */  in sun50i_dmic_hw_params()
140 	regmap_update_bits(host->regmap, SUN50I_DMIC_RXFIFO_CTL,  in sun50i_dmic_hw_params()
159 		dev_err(cpu_dai->dev, "Invalid rate!\n");  in sun50i_dmic_hw_params()
160 		return -EINVAL;  in sun50i_dmic_hw_params()
163 	if (clk_set_rate(host->dmic_clk, mclk)) {  in sun50i_dmic_hw_params()
164 		dev_err(cpu_dai->dev, "mclk : %u not support\n", mclk);  in sun50i_dmic_hw_params()
165 		return -EINVAL;  in sun50i_dmic_hw_params()
170 			regmap_update_bits(host->regmap, SUN50I_DMIC_SR,  in sun50i_dmic_hw_params()
179 		host->dma_params_rx.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;  in sun50i_dmic_hw_params()
182 		host->dma_params_rx.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;  in sun50i_dmic_hw_params()
185 		dev_err(cpu_dai->dev, "Unsupported physical sample width: %d\n",  in sun50i_dmic_hw_params()
187 		return -EINVAL;  in sun50i_dmic_hw_params()
192 		regmap_update_bits(host->regmap, SUN50I_DMIC_CTL,  in sun50i_dmic_hw_params()
196 		regmap_update_bits(host->regmap, SUN50I_DMIC_CTL,  in sun50i_dmic_hw_params()
208 	if (substream->stream != SNDRV_PCM_STREAM_CAPTURE)  in sun50i_dmic_trigger()
209 		return -EINVAL;  in sun50i_dmic_trigger()
216 		regmap_update_bits(host->regmap, SUN50I_DMIC_INTC,  in sun50i_dmic_trigger()
220 		regmap_update_bits(host->regmap, SUN50I_DMIC_EN_CTL,  in sun50i_dmic_trigger()
228 		regmap_update_bits(host->regmap, SUN50I_DMIC_INTC,  in sun50i_dmic_trigger()
231 		regmap_update_bits(host->regmap, SUN50I_DMIC_EN_CTL,  in sun50i_dmic_trigger()
235 		ret = -EINVAL;  in sun50i_dmic_trigger()
245 	snd_soc_dai_init_dma_data(dai, NULL, &host->dma_params_rx);  in sun50i_dmic_soc_dai_probe()
277 	.name = "dmic",
282 		.compatible = "allwinner,sun50i-h6-dmic",
288 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(sun50i_dmic_vol_scale, -12000, 75, 1);
292         SOC_DOUBLE_TLV("DMIC Channel 0 Capture Volume", SUN50I_DMIC_D0D1_VOL_CTR,
295         SOC_DOUBLE_TLV("DMIC Channel 1 Capture Volume", SUN50I_DMIC_D0D1_VOL_CTR,
298         SOC_DOUBLE_TLV("DMIC Channel 2 Capture Volume", SUN50I_DMIC_D2D3_VOL_CTR,
301         SOC_DOUBLE_TLV("DMIC Channel 3 Capture Volume", SUN50I_DMIC_D2D3_VOL_CTR,
309 	.name           = "sun50i-dmic",
318 	clk_disable_unprepare(host->dmic_clk);  in sun50i_dmic_runtime_suspend()
319 	clk_disable_unprepare(host->bus_clk);  in sun50i_dmic_runtime_suspend()
329 	ret = clk_prepare_enable(host->dmic_clk);  in sun50i_dmic_runtime_resume()
333 	ret = clk_prepare_enable(host->bus_clk);  in sun50i_dmic_runtime_resume()
335 		clk_disable_unprepare(host->dmic_clk);  in sun50i_dmic_runtime_resume()
349 	host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL);  in sun50i_dmic_probe()
351 		return -ENOMEM;  in sun50i_dmic_probe()
356 		return dev_err_probe(&pdev->dev, PTR_ERR(base),  in sun50i_dmic_probe()
359 	host->regmap = devm_regmap_init_mmio(&pdev->dev, base,  in sun50i_dmic_probe()
363 	host->bus_clk = devm_clk_get(&pdev->dev, "bus");  in sun50i_dmic_probe()
364 	if (IS_ERR(host->bus_clk))  in sun50i_dmic_probe()
365 		return dev_err_probe(&pdev->dev, PTR_ERR(host->bus_clk),  in sun50i_dmic_probe()
368 	host->dmic_clk = devm_clk_get(&pdev->dev, "mod");  in sun50i_dmic_probe()
369 	if (IS_ERR(host->dmic_clk))  in sun50i_dmic_probe()
370 		return dev_err_probe(&pdev->dev, PTR_ERR(host->dmic_clk),  in sun50i_dmic_probe()
371 				     "failed to get dmic clock.\n");  in sun50i_dmic_probe()
373 	host->dma_params_rx.addr = res->start + SUN50I_DMIC_DATA;  in sun50i_dmic_probe()
374 	host->dma_params_rx.maxburst = 8;  in sun50i_dmic_probe()
378 	host->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);  in sun50i_dmic_probe()
379 	if (IS_ERR(host->rst))  in sun50i_dmic_probe()
380 		return dev_err_probe(&pdev->dev, PTR_ERR(host->rst),  in sun50i_dmic_probe()
382 	reset_control_deassert(host->rst);  in sun50i_dmic_probe()
384 	ret = devm_snd_soc_register_component(&pdev->dev, &sun50i_dmic_component,  in sun50i_dmic_probe()
387 		return dev_err_probe(&pdev->dev, ret,  in sun50i_dmic_probe()
390 	pm_runtime_enable(&pdev->dev);  in sun50i_dmic_probe()
391 	if (!pm_runtime_enabled(&pdev->dev)) {  in sun50i_dmic_probe()
392 		ret = sun50i_dmic_runtime_resume(&pdev->dev);  in sun50i_dmic_probe()
397 	ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);  in sun50i_dmic_probe()
403 	if (!pm_runtime_status_suspended(&pdev->dev))  in sun50i_dmic_probe()
404 		sun50i_dmic_runtime_suspend(&pdev->dev);  in sun50i_dmic_probe()
406 	pm_runtime_disable(&pdev->dev);  in sun50i_dmic_probe()
412 	pm_runtime_disable(&pdev->dev);  in sun50i_dmic_remove()
413 	if (!pm_runtime_status_suspended(&pdev->dev))  in sun50i_dmic_remove()
414 		sun50i_dmic_runtime_suspend(&pdev->dev);  in sun50i_dmic_remove()
424 		.name   = "sun50i-dmic",
434 MODULE_DESCRIPTION("Allwinner sun50i DMIC SoC Interface");
437 MODULE_ALIAS("platform:sun50i-dmic");