Lines Matching +full:stm32h7 +full:- +full:i2s
1 // SPDX-License-Identifier: GPL-2.0-only
3 * STM32 ALSA SoC Digital Audio Interface (I2S) driver.
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
11 #include <linux/clk-provider.h>
136 #define I2S_CGFR_I2SDIV_MAX ((1 << (I2S_CGFR_I2SDIV_BIT_H -\
137 I2S_CGFR_I2SDIV_SHIFT)) - 1)
143 /* Registers below apply to I2S version 1.1 and more */
198 #define STM32_I2S_IS_MASTER(x) ((x)->ms_flg == I2S_MS_MASTER)
199 #define STM32_I2S_IS_SLAVE(x) ((x)->ms_flg == I2S_MS_SLAVE)
205 * struct stm32_i2s_data - private data of I2S
206 * @regmap_conf: I2S register map configuration pointer
207 * @regmap: I2S register map pointer
213 * @i2sclk: kernel clock feeding the I2S clock generator
214 * @i2smclk: master clock from I2S mclk provider
216 * @x8kclk: I2S parent clock for sampling frequencies multiple of 8kHz
217 * @x11kclk: I2S parent clock for sampling frequencies multiple of 11kHz
219 * @phys_addr: I2S registers physical base address
227 * @refcount: keep count of opened streams on I2S
264 static int stm32_i2s_calc_clk_div(struct stm32_i2s_data *i2s, in stm32_i2s_calc_clk_div() argument
282 dev_dbg(&i2s->pdev->dev, "Divider: 2*%d(div)+%d(odd) = %d\n", in stm32_i2s_calc_clk_div()
286 /* Division by three is not allowed by I2S prescaler */ in stm32_i2s_calc_clk_div()
288 dev_err(&i2s->pdev->dev, "Wrong divider setting\n"); in stm32_i2s_calc_clk_div()
289 return -EINVAL; in stm32_i2s_calc_clk_div()
293 dev_dbg(&i2s->pdev->dev, in stm32_i2s_calc_clk_div()
297 i2s->div = div; in stm32_i2s_calc_clk_div()
298 i2s->odd = odd; in stm32_i2s_calc_clk_div()
299 i2s->divider = divider; in stm32_i2s_calc_clk_div()
304 static int stm32_i2s_set_clk_div(struct stm32_i2s_data *i2s) in stm32_i2s_set_clk_div() argument
308 cgfr = I2S_CGFR_I2SDIV_SET(i2s->div) | (i2s->odd << I2S_CGFR_ODD_SHIFT); in stm32_i2s_set_clk_div()
311 return regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, in stm32_i2s_set_clk_div()
315 static int stm32_i2s_set_parent_clock(struct stm32_i2s_data *i2s, in stm32_i2s_set_parent_clock() argument
318 struct platform_device *pdev = i2s->pdev; in stm32_i2s_set_parent_clock()
323 parent_clk = i2s->x11kclk; in stm32_i2s_set_parent_clock()
325 parent_clk = i2s->x8kclk; in stm32_i2s_set_parent_clock()
327 ret = clk_set_parent(i2s->i2sclk, parent_clk); in stm32_i2s_set_parent_clock()
329 dev_err(&pdev->dev, in stm32_i2s_set_parent_clock()
339 struct stm32_i2s_data *i2s = mclk->i2s_data; in stm32_i2smclk_round_rate() local
342 ret = stm32_i2s_calc_clk_div(i2s, *prate, rate); in stm32_i2smclk_round_rate()
346 mclk->freq = *prate / i2s->divider; in stm32_i2smclk_round_rate()
348 return mclk->freq; in stm32_i2smclk_round_rate()
356 return mclk->freq; in stm32_i2smclk_recalc_rate()
363 struct stm32_i2s_data *i2s = mclk->i2s_data; in stm32_i2smclk_set_rate() local
366 ret = stm32_i2s_calc_clk_div(i2s, parent_rate, rate); in stm32_i2smclk_set_rate()
370 ret = stm32_i2s_set_clk_div(i2s); in stm32_i2smclk_set_rate()
374 mclk->freq = rate; in stm32_i2smclk_set_rate()
382 struct stm32_i2s_data *i2s = mclk->i2s_data; in stm32_i2smclk_enable() local
384 dev_dbg(&i2s->pdev->dev, "Enable master clock\n"); in stm32_i2smclk_enable()
386 return regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, in stm32_i2smclk_enable()
393 struct stm32_i2s_data *i2s = mclk->i2s_data; in stm32_i2smclk_disable() local
395 dev_dbg(&i2s->pdev->dev, "Disable master clock\n"); in stm32_i2smclk_disable()
397 regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, I2S_CGFR_MCKOE, 0); in stm32_i2smclk_disable()
408 static int stm32_i2s_add_mclk_provider(struct stm32_i2s_data *i2s) in stm32_i2s_add_mclk_provider() argument
412 struct device *dev = &i2s->pdev->dev; in stm32_i2s_add_mclk_provider()
413 const char *pname = __clk_get_name(i2s->i2sclk); in stm32_i2s_add_mclk_provider()
419 return -ENOMEM; in stm32_i2s_add_mclk_provider()
424 return -ENOMEM; in stm32_i2s_add_mclk_provider()
431 while (*s && *s != '_' && (i < (STM32_I2S_NAME_LEN - 7))) { in stm32_i2s_add_mclk_provider()
437 mclk->hw.init = CLK_HW_INIT(mclk_name, pname, &mclk_ops, 0); in stm32_i2s_add_mclk_provider()
438 mclk->i2s_data = i2s; in stm32_i2s_add_mclk_provider()
439 hw = &mclk->hw; in stm32_i2s_add_mclk_provider()
442 ret = devm_clk_hw_register(&i2s->pdev->dev, hw); in stm32_i2s_add_mclk_provider()
447 i2s->i2smclk = hw->clk; in stm32_i2s_add_mclk_provider()
455 struct stm32_i2s_data *i2s = (struct stm32_i2s_data *)devid; in stm32_i2s_isr() local
456 struct platform_device *pdev = i2s->pdev; in stm32_i2s_isr()
461 regmap_read(i2s->regmap, STM32_I2S_SR_REG, &sr); in stm32_i2s_isr()
462 regmap_read(i2s->regmap, STM32_I2S_IER_REG, &ier); in stm32_i2s_isr()
466 dev_dbg(&pdev->dev, "Spurious IRQ sr=0x%08x, ier=0x%08x\n", in stm32_i2s_isr()
471 regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG, in stm32_i2s_isr()
475 dev_dbg(&pdev->dev, "Overrun\n"); in stm32_i2s_isr()
480 dev_dbg(&pdev->dev, "Underrun\n"); in stm32_i2s_isr()
485 dev_dbg(&pdev->dev, "Frame error\n"); in stm32_i2s_isr()
487 spin_lock(&i2s->irq_lock); in stm32_i2s_isr()
488 if (err && i2s->substream) in stm32_i2s_isr()
489 snd_pcm_stop_xrun(i2s->substream); in stm32_i2s_isr()
490 spin_unlock(&i2s->irq_lock); in stm32_i2s_isr()
544 struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai); in stm32_i2s_set_dai_fmt() local
549 dev_dbg(cpu_dai->dev, "fmt %x\n", fmt); in stm32_i2s_set_dai_fmt()
568 /* DSP_B not mapped on I2S PCM long format. 1 bit offset does not fit */ in stm32_i2s_set_dai_fmt()
570 dev_err(cpu_dai->dev, "Unsupported protocol %#x\n", in stm32_i2s_set_dai_fmt()
572 return -EINVAL; in stm32_i2s_set_dai_fmt()
590 dev_err(cpu_dai->dev, "Unsupported strobing %#x\n", in stm32_i2s_set_dai_fmt()
592 return -EINVAL; in stm32_i2s_set_dai_fmt()
598 i2s->ms_flg = I2S_MS_SLAVE; in stm32_i2s_set_dai_fmt()
601 i2s->ms_flg = I2S_MS_MASTER; in stm32_i2s_set_dai_fmt()
604 dev_err(cpu_dai->dev, "Unsupported mode %#x\n", in stm32_i2s_set_dai_fmt()
606 return -EINVAL; in stm32_i2s_set_dai_fmt()
609 i2s->fmt = fmt; in stm32_i2s_set_dai_fmt()
610 return regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, in stm32_i2s_set_dai_fmt()
617 struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai); in stm32_i2s_set_sysclk() local
620 dev_dbg(cpu_dai->dev, "I2S MCLK frequency is %uHz. mode: %s, dir: %s\n", in stm32_i2s_set_sysclk()
621 freq, STM32_I2S_IS_MASTER(i2s) ? "master" : "slave", in stm32_i2s_set_sysclk()
625 if (dir == SND_SOC_CLOCK_OUT && STM32_I2S_IS_MASTER(i2s)) { in stm32_i2s_set_sysclk()
626 if (!i2s->i2smclk) { in stm32_i2s_set_sysclk()
627 dev_dbg(cpu_dai->dev, "No MCLK registered\n"); in stm32_i2s_set_sysclk()
634 if (i2s->mclk_rate) { in stm32_i2s_set_sysclk()
635 clk_rate_exclusive_put(i2s->i2smclk); in stm32_i2s_set_sysclk()
636 i2s->mclk_rate = 0; in stm32_i2s_set_sysclk()
638 return regmap_update_bits(i2s->regmap, in stm32_i2s_set_sysclk()
643 ret = stm32_i2s_set_parent_clock(i2s, freq); in stm32_i2s_set_sysclk()
646 ret = clk_set_rate_exclusive(i2s->i2smclk, freq); in stm32_i2s_set_sysclk()
648 dev_err(cpu_dai->dev, "Could not set mclk rate\n"); in stm32_i2s_set_sysclk()
651 ret = regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, in stm32_i2s_set_sysclk()
654 i2s->mclk_rate = freq; in stm32_i2s_set_sysclk()
663 struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai); in stm32_i2s_configure_clock() local
671 clk_set_parent(i2s->i2sclk, i2s->x11kclk); in stm32_i2s_configure_clock()
673 clk_set_parent(i2s->i2sclk, i2s->x8kclk); in stm32_i2s_configure_clock()
674 i2s_clock_rate = clk_get_rate(i2s->i2sclk); in stm32_i2s_configure_clock()
678 * i2s mode : mclk_ratio = 256 in stm32_i2s_configure_clock()
682 * i2s mode : div = i2s_clk / (mclk_ratio * ws) in stm32_i2s_configure_clock()
685 * i2s mode : div = i2s_clk / (nb_bits x ws) in stm32_i2s_configure_clock()
688 if (i2s->mclk_rate) { in stm32_i2s_configure_clock()
689 ret = stm32_i2s_calc_clk_div(i2s, i2s_clock_rate, in stm32_i2s_configure_clock()
690 i2s->mclk_rate); in stm32_i2s_configure_clock()
695 if ((i2s->fmt & SND_SOC_DAIFMT_FORMAT_MASK) == in stm32_i2s_configure_clock()
700 ret = regmap_read(i2s->regmap, STM32_I2S_CGFR_REG, &cgfr); in stm32_i2s_configure_clock()
705 ret = stm32_i2s_calc_clk_div(i2s, i2s_clock_rate, in stm32_i2s_configure_clock()
711 ret = stm32_i2s_set_clk_div(i2s); in stm32_i2s_configure_clock()
716 return regmap_update_bits(i2s->regmap, STM32_I2S_CFG2_REG, in stm32_i2s_configure_clock()
724 struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai); in stm32_i2s_configure() local
741 dev_err(cpu_dai->dev, "Unexpected format %d", format); in stm32_i2s_configure()
742 return -EINVAL; in stm32_i2s_configure()
745 if (STM32_I2S_IS_SLAVE(i2s)) { in stm32_i2s_configure()
756 ret = regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, in stm32_i2s_configure()
762 cfg1 = I2S_CFG1_FTHVL_SET(fthlv - 1); in stm32_i2s_configure()
764 return regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG, in stm32_i2s_configure()
771 struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai); in stm32_i2s_startup() local
775 spin_lock_irqsave(&i2s->irq_lock, flags); in stm32_i2s_startup()
776 i2s->substream = substream; in stm32_i2s_startup()
777 spin_unlock_irqrestore(&i2s->irq_lock, flags); in stm32_i2s_startup()
779 if ((i2s->fmt & SND_SOC_DAIFMT_FORMAT_MASK) != SND_SOC_DAIFMT_DSP_A) in stm32_i2s_startup()
780 snd_pcm_hw_constraint_single(substream->runtime, in stm32_i2s_startup()
783 ret = clk_prepare_enable(i2s->i2sclk); in stm32_i2s_startup()
785 dev_err(cpu_dai->dev, "Failed to enable clock: %d\n", ret); in stm32_i2s_startup()
789 return regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG, in stm32_i2s_startup()
797 struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai); in stm32_i2s_hw_params() local
802 dev_err(cpu_dai->dev, "Configuration returned error %d\n", ret); in stm32_i2s_hw_params()
806 if (STM32_I2S_IS_MASTER(i2s)) in stm32_i2s_hw_params()
815 struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai); in stm32_i2s_trigger() local
816 bool playback_flg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); in stm32_i2s_trigger()
824 /* Enable i2s */ in stm32_i2s_trigger()
825 dev_dbg(cpu_dai->dev, "start I2S %s\n", in stm32_i2s_trigger()
826 snd_pcm_direction_name(substream->stream)); in stm32_i2s_trigger()
829 regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG, in stm32_i2s_trigger()
832 ret = regmap_update_bits(i2s->regmap, STM32_I2S_CR1_REG, in stm32_i2s_trigger()
835 dev_err(cpu_dai->dev, "Error %d enabling I2S\n", ret); in stm32_i2s_trigger()
839 ret = regmap_write_bits(i2s->regmap, STM32_I2S_CR1_REG, in stm32_i2s_trigger()
842 dev_err(cpu_dai->dev, "Error %d starting I2S\n", ret); in stm32_i2s_trigger()
846 regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG, in stm32_i2s_trigger()
849 spin_lock(&i2s->lock_fd); in stm32_i2s_trigger()
850 i2s->refcount++; in stm32_i2s_trigger()
856 if (STM32_I2S_IS_MASTER(i2s) && i2s->refcount == 1) in stm32_i2s_trigger()
858 regmap_write(i2s->regmap, in stm32_i2s_trigger()
861 spin_unlock(&i2s->lock_fd); in stm32_i2s_trigger()
863 if (STM32_I2S_IS_SLAVE(i2s)) in stm32_i2s_trigger()
866 regmap_update_bits(i2s->regmap, STM32_I2S_IER_REG, ier, ier); in stm32_i2s_trigger()
871 dev_dbg(cpu_dai->dev, "stop I2S %s\n", in stm32_i2s_trigger()
872 snd_pcm_direction_name(substream->stream)); in stm32_i2s_trigger()
875 regmap_update_bits(i2s->regmap, STM32_I2S_IER_REG, in stm32_i2s_trigger()
879 regmap_update_bits(i2s->regmap, STM32_I2S_IER_REG, in stm32_i2s_trigger()
883 spin_lock(&i2s->lock_fd); in stm32_i2s_trigger()
884 i2s->refcount--; in stm32_i2s_trigger()
885 if (i2s->refcount) { in stm32_i2s_trigger()
886 spin_unlock(&i2s->lock_fd); in stm32_i2s_trigger()
890 ret = regmap_update_bits(i2s->regmap, STM32_I2S_CR1_REG, in stm32_i2s_trigger()
893 dev_err(cpu_dai->dev, "Error %d disabling I2S\n", ret); in stm32_i2s_trigger()
894 spin_unlock(&i2s->lock_fd); in stm32_i2s_trigger()
897 spin_unlock(&i2s->lock_fd); in stm32_i2s_trigger()
900 regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG, in stm32_i2s_trigger()
904 return -EINVAL; in stm32_i2s_trigger()
913 struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai); in stm32_i2s_shutdown() local
916 clk_disable_unprepare(i2s->i2sclk); in stm32_i2s_shutdown()
918 spin_lock_irqsave(&i2s->irq_lock, flags); in stm32_i2s_shutdown()
919 i2s->substream = NULL; in stm32_i2s_shutdown()
920 spin_unlock_irqrestore(&i2s->irq_lock, flags); in stm32_i2s_shutdown()
925 struct stm32_i2s_data *i2s = dev_get_drvdata(cpu_dai->dev); in stm32_i2s_dai_probe() local
926 struct snd_dmaengine_dai_dma_data *dma_data_tx = &i2s->dma_data_tx; in stm32_i2s_dai_probe()
927 struct snd_dmaengine_dai_dma_data *dma_data_rx = &i2s->dma_data_rx; in stm32_i2s_dai_probe()
930 dma_data_tx->addr_width = DMA_SLAVE_BUSWIDTH_UNDEFINED; in stm32_i2s_dai_probe()
931 dma_data_tx->addr = (dma_addr_t)(i2s->phys_addr) + STM32_I2S_TXDR_REG; in stm32_i2s_dai_probe()
932 dma_data_tx->maxburst = 1; in stm32_i2s_dai_probe()
933 dma_data_rx->addr_width = DMA_SLAVE_BUSWIDTH_UNDEFINED; in stm32_i2s_dai_probe()
934 dma_data_rx->addr = (dma_addr_t)(i2s->phys_addr) + STM32_I2S_RXDR_REG; in stm32_i2s_dai_probe()
935 dma_data_rx->maxburst = 1; in stm32_i2s_dai_probe()
981 .name = "stm32-i2s",
988 stream->stream_name = stream_name; in stm32_i2s_dai_init()
989 stream->channels_min = 1; in stm32_i2s_dai_init()
990 stream->channels_max = 2; in stm32_i2s_dai_init()
991 stream->rates = SNDRV_PCM_RATE_8000_192000; in stm32_i2s_dai_init()
992 stream->formats = SNDRV_PCM_FMTBIT_S16_LE | in stm32_i2s_dai_init()
997 struct stm32_i2s_data *i2s) in stm32_i2s_dais_init() argument
1001 dai_ptr = devm_kzalloc(&pdev->dev, sizeof(struct snd_soc_dai_driver), in stm32_i2s_dais_init()
1004 return -ENOMEM; in stm32_i2s_dais_init()
1006 dai_ptr->ops = &stm32_i2s_pcm_dai_ops; in stm32_i2s_dais_init()
1007 dai_ptr->id = 1; in stm32_i2s_dais_init()
1008 stm32_i2s_dai_init(&dai_ptr->playback, "playback"); in stm32_i2s_dais_init()
1009 stm32_i2s_dai_init(&dai_ptr->capture, "capture"); in stm32_i2s_dais_init()
1010 i2s->dai_drv = dai_ptr; in stm32_i2s_dais_init()
1017 .compatible = "st,stm32h7-i2s",
1024 struct stm32_i2s_data *i2s) in stm32_i2s_parse_dt() argument
1026 struct device_node *np = pdev->dev.of_node; in stm32_i2s_parse_dt()
1032 return -ENODEV; in stm32_i2s_parse_dt()
1034 i2s->regmap_conf = device_get_match_data(&pdev->dev); in stm32_i2s_parse_dt()
1035 if (!i2s->regmap_conf) in stm32_i2s_parse_dt()
1036 return -EINVAL; in stm32_i2s_parse_dt()
1038 i2s->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in stm32_i2s_parse_dt()
1039 if (IS_ERR(i2s->base)) in stm32_i2s_parse_dt()
1040 return PTR_ERR(i2s->base); in stm32_i2s_parse_dt()
1042 i2s->phys_addr = res->start; in stm32_i2s_parse_dt()
1045 i2s->pclk = devm_clk_get(&pdev->dev, "pclk"); in stm32_i2s_parse_dt()
1046 if (IS_ERR(i2s->pclk)) in stm32_i2s_parse_dt()
1047 return dev_err_probe(&pdev->dev, PTR_ERR(i2s->pclk), in stm32_i2s_parse_dt()
1050 i2s->i2sclk = devm_clk_get(&pdev->dev, "i2sclk"); in stm32_i2s_parse_dt()
1051 if (IS_ERR(i2s->i2sclk)) in stm32_i2s_parse_dt()
1052 return dev_err_probe(&pdev->dev, PTR_ERR(i2s->i2sclk), in stm32_i2s_parse_dt()
1055 i2s->x8kclk = devm_clk_get(&pdev->dev, "x8k"); in stm32_i2s_parse_dt()
1056 if (IS_ERR(i2s->x8kclk)) in stm32_i2s_parse_dt()
1057 return dev_err_probe(&pdev->dev, PTR_ERR(i2s->x8kclk), in stm32_i2s_parse_dt()
1060 i2s->x11kclk = devm_clk_get(&pdev->dev, "x11k"); in stm32_i2s_parse_dt()
1061 if (IS_ERR(i2s->x11kclk)) in stm32_i2s_parse_dt()
1062 return dev_err_probe(&pdev->dev, PTR_ERR(i2s->x11kclk), in stm32_i2s_parse_dt()
1066 if (of_property_present(np, "#clock-cells")) { in stm32_i2s_parse_dt()
1067 ret = stm32_i2s_add_mclk_provider(i2s); in stm32_i2s_parse_dt()
1077 ret = devm_request_irq(&pdev->dev, irq, stm32_i2s_isr, 0, in stm32_i2s_parse_dt()
1078 dev_name(&pdev->dev), i2s); in stm32_i2s_parse_dt()
1080 dev_err(&pdev->dev, "irq request returned %d\n", ret); in stm32_i2s_parse_dt()
1085 rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); in stm32_i2s_parse_dt()
1087 return dev_err_probe(&pdev->dev, PTR_ERR(rst), in stm32_i2s_parse_dt()
1099 snd_dmaengine_pcm_unregister(&pdev->dev); in stm32_i2s_remove()
1100 snd_soc_unregister_component(&pdev->dev); in stm32_i2s_remove()
1101 pm_runtime_disable(&pdev->dev); in stm32_i2s_remove()
1106 struct stm32_i2s_data *i2s; in stm32_i2s_probe() local
1110 i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); in stm32_i2s_probe()
1111 if (!i2s) in stm32_i2s_probe()
1112 return -ENOMEM; in stm32_i2s_probe()
1114 i2s->pdev = pdev; in stm32_i2s_probe()
1115 i2s->ms_flg = I2S_MS_NOT_SET; in stm32_i2s_probe()
1116 spin_lock_init(&i2s->lock_fd); in stm32_i2s_probe()
1117 spin_lock_init(&i2s->irq_lock); in stm32_i2s_probe()
1118 platform_set_drvdata(pdev, i2s); in stm32_i2s_probe()
1120 ret = stm32_i2s_parse_dt(pdev, i2s); in stm32_i2s_probe()
1124 ret = stm32_i2s_dais_init(pdev, i2s); in stm32_i2s_probe()
1128 i2s->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "pclk", in stm32_i2s_probe()
1129 i2s->base, i2s->regmap_conf); in stm32_i2s_probe()
1130 if (IS_ERR(i2s->regmap)) in stm32_i2s_probe()
1131 return dev_err_probe(&pdev->dev, PTR_ERR(i2s->regmap), in stm32_i2s_probe()
1134 ret = snd_dmaengine_pcm_register(&pdev->dev, &stm32_i2s_pcm_config, 0); in stm32_i2s_probe()
1136 return dev_err_probe(&pdev->dev, ret, "PCM DMA register error\n"); in stm32_i2s_probe()
1138 ret = snd_soc_register_component(&pdev->dev, &stm32_i2s_component, in stm32_i2s_probe()
1139 i2s->dai_drv, 1); in stm32_i2s_probe()
1141 snd_dmaengine_pcm_unregister(&pdev->dev); in stm32_i2s_probe()
1145 /* Set SPI/I2S in i2s mode */ in stm32_i2s_probe()
1146 ret = regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, in stm32_i2s_probe()
1151 ret = regmap_read(i2s->regmap, STM32_I2S_IPIDR_REG, &val); in stm32_i2s_probe()
1156 ret = regmap_read(i2s->regmap, STM32_I2S_HWCFGR_REG, &val); in stm32_i2s_probe()
1161 dev_err(&pdev->dev, in stm32_i2s_probe()
1162 "Device does not support i2s mode\n"); in stm32_i2s_probe()
1163 ret = -EPERM; in stm32_i2s_probe()
1167 ret = regmap_read(i2s->regmap, STM32_I2S_VERR_REG, &val); in stm32_i2s_probe()
1171 dev_dbg(&pdev->dev, "I2S version: %lu.%lu registered\n", in stm32_i2s_probe()
1176 pm_runtime_enable(&pdev->dev); in stm32_i2s_probe()
1191 struct stm32_i2s_data *i2s = dev_get_drvdata(dev); in stm32_i2s_suspend() local
1193 regcache_cache_only(i2s->regmap, true); in stm32_i2s_suspend()
1194 regcache_mark_dirty(i2s->regmap); in stm32_i2s_suspend()
1201 struct stm32_i2s_data *i2s = dev_get_drvdata(dev); in stm32_i2s_resume() local
1203 regcache_cache_only(i2s->regmap, false); in stm32_i2s_resume()
1204 return regcache_sync(i2s->regmap); in stm32_i2s_resume()
1214 .name = "st,stm32-i2s",
1224 MODULE_DESCRIPTION("STM32 Soc i2s Interface");
1226 MODULE_ALIAS("platform:stm32-i2s");