49 	struct mtk_adsp_chip_info *adsp = data;  in platform_parse_resource()  local
64 	adsp->pa_dram = (phys_addr_t)res.start;  in platform_parse_resource()
65 	if (adsp->pa_dram & DRAM_REMAP_MASK) {  in platform_parse_resource()
67 			(u32)adsp->pa_dram);  in platform_parse_resource()
71 	adsp->dramsize = resource_size(&res);  in platform_parse_resource()
72 	if (adsp->dramsize < TOTAL_SIZE_SHARED_DRAM_FROM_TAIL) {  in platform_parse_resource()
74 			adsp->dramsize);  in platform_parse_resource()
78 	dev_dbg(dev, "dram pbase=%pa size=%#x\n", &adsp->pa_dram, adsp->dramsize);  in platform_parse_resource()
86 	adsp->va_cfgreg = devm_ioremap_resource(dev, mmio);  in platform_parse_resource()
87 	if (IS_ERR(adsp->va_cfgreg))  in platform_parse_resource()
88 		return PTR_ERR(adsp->va_cfgreg);  in platform_parse_resource()
90 	adsp->pa_cfgreg = (phys_addr_t)mmio->start;  in platform_parse_resource()
91 	adsp->cfgregsize = resource_size(mmio);  in platform_parse_resource()
93 	dev_dbg(dev, "cfgreg pbase=%pa size=%#x\n", &adsp->pa_cfgreg, adsp->cfgregsize);  in platform_parse_resource()
101 	adsp->pa_sram = (phys_addr_t)mmio->start;  in platform_parse_resource()
102 	adsp->sramsize = resource_size(mmio);  in platform_parse_resource()
104 	dev_dbg(dev, "sram pbase=%pa size=%#x\n", &adsp->pa_sram, adsp->sramsize);  in platform_parse_resource()
112 	adsp->va_secreg = devm_ioremap_resource(dev, mmio);  in platform_parse_resource()
113 	if (IS_ERR(adsp->va_secreg))  in platform_parse_resource()
114 		return PTR_ERR(adsp->va_secreg);  in platform_parse_resource()
116 	adsp->pa_secreg = (phys_addr_t)mmio->start;  in platform_parse_resource()
117 	adsp->secregsize = resource_size(mmio);  in platform_parse_resource()
119 	dev_dbg(dev, "secreg pbase=%pa size=%#x\n", &adsp->pa_secreg, adsp->secregsize);  in platform_parse_resource()
127 	adsp->va_busreg = devm_ioremap_resource(dev, mmio);  in platform_parse_resource()
128 	if (IS_ERR(adsp->va_busreg))  in platform_parse_resource()
129 		return PTR_ERR(adsp->va_busreg);  in platform_parse_resource()
131 	adsp->pa_busreg = (phys_addr_t)mmio->start;  in platform_parse_resource()
132 	adsp->busregsize = resource_size(mmio);  in platform_parse_resource()
134 	dev_dbg(dev, "busreg pbase=%pa size=%#x\n", &adsp->pa_busreg, adsp->busregsize);  in platform_parse_resource()
152 static int adsp_memory_remap_init(struct snd_sof_dev *sdev, struct mtk_adsp_chip_info *adsp)  in adsp_memory_remap_init()  argument
156 	offset = adsp->pa_dram - DRAM_PHYS_BASE_FROM_DSP_VIEW;  in adsp_memory_remap_init()
157 	adsp->dram_offset = offset;  in adsp_memory_remap_init()
160 	dev_dbg(sdev->dev, "adsp->pa_dram %pa, offset %#x\n", &adsp->pa_dram, offset);  in adsp_memory_remap_init()
199 	priv->adsp = devm_kzalloc(&pdev->dev, sizeof(struct mtk_adsp_chip_info), GFP_KERNEL);  in mt8186_dsp_probe()
200 	if (!priv->adsp)  in mt8186_dsp_probe()
203 	ret = platform_parse_resource(pdev, priv->adsp);  in mt8186_dsp_probe()
208 						       priv->adsp->pa_sram,  in mt8186_dsp_probe()
209 						       priv->adsp->sramsize);  in mt8186_dsp_probe()
212 			&priv->adsp->pa_sram, priv->adsp->sramsize);  in mt8186_dsp_probe()
216 	priv->adsp->va_sram = sdev->bar[SOF_FW_BLK_TYPE_IRAM];  in mt8186_dsp_probe()
219 						       priv->adsp->pa_dram,  in mt8186_dsp_probe()
220 						       priv->adsp->dramsize);  in mt8186_dsp_probe()
224 			&priv->adsp->pa_dram, priv->adsp->dramsize);  in mt8186_dsp_probe()
228 	priv->adsp->va_dram = sdev->bar[SOF_FW_BLK_TYPE_SRAM];  in mt8186_dsp_probe()
230 	sdev->bar[DSP_REG_BAR] = priv->adsp->va_cfgreg;  in mt8186_dsp_probe()
231 	sdev->bar[DSP_SECREG_BAR] = priv->adsp->va_secreg;  in mt8186_dsp_probe()
232 	sdev->bar[DSP_BUSREG_BAR] = priv->adsp->va_busreg;  in mt8186_dsp_probe()
240 	ret = adsp_memory_remap_init(sdev, priv->adsp);  in mt8186_dsp_probe()