Lines Matching +full:0 +full:x3f00
12 #define I2SCON 0x0
13 #define I2SMOD 0x4
14 #define I2SFIC 0x8
15 #define I2SPSR 0xc
16 #define I2STXD 0x10
17 #define I2SRXD 0x14
18 #define I2SFICS 0x18
19 #define I2STXDS 0x1c
20 #define I2SAHB 0x20
21 #define I2SSTR0 0x24
22 #define I2SSIZE 0x28
23 #define I2STRNCNT 0x2c
24 #define I2SLVL0ADDR 0x30
25 #define I2SLVL1ADDR 0x34
26 #define I2SLVL2ADDR 0x38
27 #define I2SLVL3ADDR 0x3c
28 #define I2SSTR1 0x40
29 #define I2SVER 0x44
30 #define I2SFIC1 0x48
31 #define I2STDM 0x4c
32 #define I2SFSTA 0x50
60 #define CON_ACTIVE (1 << 0)
63 #define MOD_OPCLK_CDCLK_OUT (0 << MOD_OPCLK_SHIFT)
71 #define MOD_BLCS_16BIT (0 << MOD_BLCS_SHIFT)
76 #define MOD_BLCP_16BIT (0 << MOD_BLCP_SHIFT)
87 #define MOD_BLC_16BIT (0 << 13)
92 #define MOD_TXONLY (0 << 8)
97 #define MOD_LR_LLOW 0
100 #define MOD_SDF_IIS 0
105 #define MOD_RCLK_256FS 0
111 #define MOD_BCLK_32FS 0
116 #define MOD_8BIT (1 << 0)
121 #define EXYNOS5420_MOD_BCLK_SHIFT 0
127 #define EXYNOS5420_MOD_BCLK_MASK 0xf
135 #define PSR_PSVAL(x) ((((x) - 1) << 8) & 0x3f00)
137 #define FIC_TX2COUNT(x) (((x) >> 24) & 0xf)
138 #define FIC_TX1COUNT(x) (((x) >> 16) & 0xf)
143 #define FIC_TXCOUNT(x) (((x) >> 8) & 0xf)
144 #define FIC_RXCOUNT(x) (((x) >> 0) & 0xf)
145 #define FICS_TXCOUNT(x) (((x) >> 8) & 0x7f)
152 #define AHB_DMAEN (1 << 0)
153 #define AHB_LVLINTMASK (0xf << 20)
155 #define I2SSIZE_TRNMSK (0xffff)