Lines Matching +full:rk3399 +full:- +full:grf

1 // SPDX-License-Identifier: GPL-2.0-only
4  * ALSA SoC Audio Layer - Rockchip I2S Controller driver
7  * Author: Jianqun <jay.xu@rock-chips.com>
44 	{ .compatible = "rockchip,rk3066-spdif",
46 	{ .compatible = "rockchip,rk3188-spdif",
48 	{ .compatible = "rockchip,rk3228-spdif",
50 	{ .compatible = "rockchip,rk3288-spdif",
52 	{ .compatible = "rockchip,rk3328-spdif",
54 	{ .compatible = "rockchip,rk3366-spdif",
56 	{ .compatible = "rockchip,rk3368-spdif",
58 	{ .compatible = "rockchip,rk3399-spdif",
60 	{ .compatible = "rockchip,rk3568-spdif",
70 	regcache_cache_only(spdif->regmap, true);
71 	clk_disable_unprepare(spdif->mclk);
72 	clk_disable_unprepare(spdif->hclk);
82 	ret = clk_prepare_enable(spdif->mclk);
84 		dev_err(spdif->dev, "mclk clock enable failed %d\n", ret);
88 	ret = clk_prepare_enable(spdif->hclk);
90 		clk_disable_unprepare(spdif->mclk);
91 		dev_err(spdif->dev, "hclk clock enable failed %d\n", ret);
95 	regcache_cache_only(spdif->regmap, false);
96 	regcache_mark_dirty(spdif->regmap);
98 	ret = regcache_sync(spdif->regmap);
100 		clk_disable_unprepare(spdif->mclk);
101 		clk_disable_unprepare(spdif->hclk);
130 		return -EINVAL;
134 	ret = clk_set_rate(spdif->mclk, mclk);
136 		dev_err(spdif->dev, "Failed to set module clock rate: %d\n",
141 	ret = regmap_update_bits(spdif->regmap, SPDIF_CFGR,
159 		ret = regmap_update_bits(spdif->regmap, SPDIF_DMACR,
168 		ret = regmap_update_bits(spdif->regmap, SPDIF_XFER,
175 		ret = regmap_update_bits(spdif->regmap, SPDIF_DMACR,
182 		ret = regmap_update_bits(spdif->regmap, SPDIF_XFER,
187 		ret = -EINVAL;
198 	snd_soc_dai_dma_data_set_playback(dai, &spdif->playback_dma_data);
227 	.name = "rockchip-spdif",
285 	struct device_node *np = pdev->dev.of_node;
293 	if (match->data == (void *)RK_SPDIF_RK3288) {
294 		struct regmap *grf;
296 		grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
297 		if (IS_ERR(grf)) {
298 			dev_err(&pdev->dev,
299 				"rockchip_spdif missing 'rockchip,grf'\n");
300 			return PTR_ERR(grf);
306 		regmap_write(grf, RK3288_GRF_SOC_CON2, BIT(1) << 16);
309 	spdif = devm_kzalloc(&pdev->dev, sizeof(*spdif), GFP_KERNEL);
311 		return -ENOMEM;
313 	spdif->hclk = devm_clk_get(&pdev->dev, "hclk");
314 	if (IS_ERR(spdif->hclk))
315 		return PTR_ERR(spdif->hclk);
317 	spdif->mclk = devm_clk_get(&pdev->dev, "mclk");
318 	if (IS_ERR(spdif->mclk))
319 		return PTR_ERR(spdif->mclk);
325 	spdif->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "hclk", regs,
327 	if (IS_ERR(spdif->regmap))
328 		return PTR_ERR(spdif->regmap);
330 	spdif->playback_dma_data.addr = res->start + SPDIF_SMPDR;
331 	spdif->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
332 	spdif->playback_dma_data.maxburst = 4;
334 	spdif->dev = &pdev->dev;
335 	dev_set_drvdata(&pdev->dev, spdif);
337 	pm_runtime_enable(&pdev->dev);
338 	if (!pm_runtime_enabled(&pdev->dev)) {
339 		ret = rk_spdif_runtime_resume(&pdev->dev);
344 	ret = devm_snd_soc_register_component(&pdev->dev,
348 		dev_err(&pdev->dev, "Could not register DAI\n");
352 	ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
354 		dev_err(&pdev->dev, "Could not register PCM\n");
361 	if (!pm_runtime_status_suspended(&pdev->dev))
362 		rk_spdif_runtime_suspend(&pdev->dev);
364 	pm_runtime_disable(&pdev->dev);
371 	pm_runtime_disable(&pdev->dev);
372 	if (!pm_runtime_status_suspended(&pdev->dev))
373 		rk_spdif_runtime_suspend(&pdev->dev);
384 		.name = "rockchip-spdif",
391 MODULE_ALIAS("platform:rockchip-spdif");