Lines Matching +full:sdi +full:- +full:enabled
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ALSA SoC Audio Layer - Rockchip SAI Controller driver
24 #define DRV_NAME "rockchip-sai"
56 unsigned int sdi[MAX_LANES]; member
78 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK && in rockchip_sai_stream_valid()
79 sai->has_playback) in rockchip_sai_stream_valid()
82 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE && in rockchip_sai_stream_valid()
83 sai->has_capture) in rockchip_sai_stream_valid()
93 if (sai->is_master_mode || sai->version < SAI_VER_2311) in rockchip_sai_fsync_lost_detect()
96 regmap_read(sai->regmap, SAI_FSCR, &fw); in rockchip_sai_fsync_lost_detect()
99 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_fsync_lost_detect()
101 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_fsync_lost_detect()
109 regmap_update_bits(sai->regmap, SAI_FS_TIMEOUT, in rockchip_sai_fsync_lost_detect()
119 if (sai->is_master_mode || sai->version < SAI_VER_2311) in rockchip_sai_fsync_err_detect()
122 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_fsync_err_detect()
124 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_fsync_err_detect()
136 if (sai->version >= SAI_VER_2307) { in rockchip_sai_poll_clk_idle()
139 idle = sai->version >= SAI_VER_2311 ? idle >> 1 : idle; in rockchip_sai_poll_clk_idle()
145 ret = regmap_read_poll_timeout_atomic(sai->regmap, reg, val, in rockchip_sai_poll_clk_idle()
148 dev_warn(sai->dev, "Failed to idle FS\n"); in rockchip_sai_poll_clk_idle()
159 if (sai->version >= SAI_VER_2307) { in rockchip_sai_poll_stream_idle()
165 idle = sai->version >= SAI_VER_2311 ? idle >> 1 : idle; in rockchip_sai_poll_stream_idle()
174 ret = regmap_read_poll_timeout_atomic(sai->regmap, reg, val, in rockchip_sai_poll_stream_idle()
177 dev_warn(sai->dev, "Failed to idle stream\n"); in rockchip_sai_poll_stream_idle()
183 * rockchip_sai_xfer_clk_stop_and_wait() - stop the xfer clock and wait for it to be idle
188 * Clear the XFER_CLK and XFER_FSS registers if needed, then busy-waits for the
192 * Context: Any context. Expects sai->xfer_lock to be held by caller.
200 assert_spin_locked(&sai->xfer_lock); in rockchip_sai_xfer_clk_stop_and_wait()
202 regmap_read(sai->regmap, SAI_XFER, &val); in rockchip_sai_xfer_clk_stop_and_wait()
206 if (sai->is_master_mode) in rockchip_sai_xfer_clk_stop_and_wait()
207 regmap_update_bits(sai->regmap, SAI_XFER, mask, disable); in rockchip_sai_xfer_clk_stop_and_wait()
224 spin_lock_irqsave(&sai->xfer_lock, flags); in rockchip_sai_runtime_suspend()
226 spin_unlock_irqrestore(&sai->xfer_lock, flags); in rockchip_sai_runtime_suspend()
228 regcache_cache_only(sai->regmap, true); in rockchip_sai_runtime_suspend()
233 * Otherwise, the BCLK is still ungated, and once the mclk is enabled, in rockchip_sai_runtime_suspend()
241 * The maximum BCLK period is 31us @ 8K-8Bit (64kHz BCLK). We wait for in rockchip_sai_runtime_suspend()
245 clk_disable_unprepare(sai->mclk); in rockchip_sai_runtime_suspend()
246 clk_disable_unprepare(sai->hclk); in rockchip_sai_runtime_suspend()
256 ret = clk_prepare_enable(sai->hclk); in rockchip_sai_runtime_resume()
260 ret = clk_prepare_enable(sai->mclk); in rockchip_sai_runtime_resume()
264 regcache_cache_only(sai->regmap, false); in rockchip_sai_runtime_resume()
265 regcache_mark_dirty(sai->regmap); in rockchip_sai_runtime_resume()
266 ret = regcache_sync(sai->regmap); in rockchip_sai_runtime_resume()
273 clk_disable_unprepare(sai->mclk); in rockchip_sai_runtime_resume()
275 clk_disable_unprepare(sai->hclk); in rockchip_sai_runtime_resume()
284 /* clear irq status which was asserted before TXUIE enabled */ in rockchip_sai_fifo_xrun_detect()
285 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_fifo_xrun_detect()
287 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_fifo_xrun_detect()
291 /* clear irq status which was asserted before RXOIE enabled */ in rockchip_sai_fifo_xrun_detect()
292 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_fifo_xrun_detect()
294 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_fifo_xrun_detect()
307 regmap_update_bits(sai->regmap, SAI_DMACR, in rockchip_sai_dma_ctrl()
311 regmap_update_bits(sai->regmap, SAI_DMACR, in rockchip_sai_dma_ctrl()
331 reset_control_assert(sai->rst_h); in rockchip_sai_reset()
333 reset_control_deassert(sai->rst_h); in rockchip_sai_reset()
335 reset_control_assert(sai->rst_m); in rockchip_sai_reset()
337 reset_control_deassert(sai->rst_m); in rockchip_sai_reset()
341 regcache_mark_dirty(sai->regmap); in rockchip_sai_reset()
342 regcache_sync(sai->regmap); in rockchip_sai_reset()
350 regmap_update_bits(sai->regmap, SAI_CLR, clr, clr); in rockchip_sai_clear()
351 ret = regmap_read_poll_timeout_atomic(sai->regmap, SAI_CLR, val, in rockchip_sai_clear()
354 dev_warn(sai->dev, "Failed to clear %u\n", clr); in rockchip_sai_clear()
374 regmap_update_bits(sai->regmap, SAI_XFER, msk, val); in rockchip_sai_xfer_start()
395 regmap_update_bits(sai->regmap, SAI_XFER, msk, val); in rockchip_sai_xfer_stop()
418 assert_spin_locked(&sai->xfer_lock); in rockchip_sai_fmt_create()
428 sai->fpw = FPW_HALF_FRAME_WIDTH; in rockchip_sai_fmt_create()
437 sai->fpw = FPW_HALF_FRAME_WIDTH; in rockchip_sai_fmt_create()
443 if (sai->is_tdm) in rockchip_sai_fmt_create()
449 sai->fpw = FPW_HALF_FRAME_WIDTH; in rockchip_sai_fmt_create()
458 sai->fpw = FPW_ONE_BCLK_WIDTH; in rockchip_sai_fmt_create()
467 sai->fpw = FPW_ONE_BCLK_WIDTH; in rockchip_sai_fmt_create()
470 dev_err(sai->dev, "Unsupported fmt %u\n", fmt); in rockchip_sai_fmt_create()
474 regmap_update_bits(sai->regmap, SAI_TXCR, xcr_mask, xcr_val); in rockchip_sai_fmt_create()
475 regmap_update_bits(sai->regmap, SAI_RXCR, xcr_mask, xcr_val); in rockchip_sai_fmt_create()
476 regmap_update_bits(sai->regmap, SAI_TX_SHIFT, xsft_mask, xsft_val); in rockchip_sai_fmt_create()
477 regmap_update_bits(sai->regmap, SAI_RX_SHIFT, xsft_mask, xsft_val); in rockchip_sai_fmt_create()
478 regmap_update_bits(sai->regmap, SAI_FSCR, fscr_mask, fscr_val); in rockchip_sai_fmt_create()
489 pm_runtime_get_sync(dai->dev); in rockchip_sai_set_fmt()
495 sai->is_master_mode = true; in rockchip_sai_set_fmt()
499 sai->is_master_mode = false; in rockchip_sai_set_fmt()
502 ret = -EINVAL; in rockchip_sai_set_fmt()
506 spin_lock_irqsave(&sai->xfer_lock, flags); in rockchip_sai_set_fmt()
508 if (sai->initialized) { in rockchip_sai_set_fmt()
509 if (sai->has_capture && sai->has_playback) in rockchip_sai_set_fmt()
510 rockchip_sai_xfer_stop(sai, -1); in rockchip_sai_set_fmt()
511 else if (sai->has_capture) in rockchip_sai_set_fmt()
517 sai->initialized = true; in rockchip_sai_set_fmt()
520 regmap_update_bits(sai->regmap, SAI_CKR, mask, val); in rockchip_sai_set_fmt()
537 ret = -EINVAL; in rockchip_sai_set_fmt()
541 regmap_update_bits(sai->regmap, SAI_CKR, mask, val); in rockchip_sai_set_fmt()
547 regmap_update_bits(sai->regmap, SAI_XFER, in rockchip_sai_set_fmt()
550 spin_unlock_irqrestore(&sai->xfer_lock, flags); in rockchip_sai_set_fmt()
552 pm_runtime_put(dai->dev); in rockchip_sai_set_fmt()
574 dma_data->maxburst = MAXBURST_PER_FIFO * params_channels(params) / 2; in rockchip_sai_hw_params()
576 pm_runtime_get_sync(sai->dev); in rockchip_sai_hw_params()
578 regmap_read(sai->regmap, SAI_DMACR, &val); in rockchip_sai_hw_params()
580 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in rockchip_sai_hw_params()
582 lanes = sai->tx_lanes; in rockchip_sai_hw_params()
585 lanes = sai->rx_lanes; in rockchip_sai_hw_params()
588 if (!sai->is_tdm) { in rockchip_sai_hw_params()
591 dev_err(sai->dev, "not enough lanes (%d) for requested number of %s channels (%d)\n", in rockchip_sai_hw_params()
594 ret = -EINVAL; in rockchip_sai_hw_params()
601 dev_dbg(sai->dev, "using %d lanes totalling %d%s channels for %s\n", in rockchip_sai_hw_params()
602 lanes, params_channels(params), sai->is_tdm ? " (TDM)" : "", in rockchip_sai_hw_params()
621 ret = -EINVAL; in rockchip_sai_hw_params()
627 spin_lock_irqsave(&sai->xfer_lock, flags); in rockchip_sai_hw_params()
629 regmap_update_bits(sai->regmap, reg, SAI_XCR_VDW_MASK | SAI_XCR_CSR_MASK, val); in rockchip_sai_hw_params()
631 regmap_read(sai->regmap, reg, &val); in rockchip_sai_hw_params()
636 regmap_update_bits(sai->regmap, reg, SAI_XCR_SNB_MASK, in rockchip_sai_hw_params()
639 fscr = SAI_FSCR_FW(sai->fw_ratio * slot_width * ch_per_lane); in rockchip_sai_hw_params()
641 switch (sai->fpw) { in rockchip_sai_hw_params()
649 fscr |= SAI_FSCR_FPW(sai->fw_ratio * slot_width * ch_per_lane / 2); in rockchip_sai_hw_params()
652 dev_err(sai->dev, "Invalid Frame Pulse Width %d\n", sai->fpw); in rockchip_sai_hw_params()
653 ret = -EINVAL; in rockchip_sai_hw_params()
657 regmap_update_bits(sai->regmap, SAI_FSCR, in rockchip_sai_hw_params()
660 if (sai->is_master_mode) { in rockchip_sai_hw_params()
661 bclk_rate = sai->fw_ratio * slot_width * ch_per_lane * params_rate(params); in rockchip_sai_hw_params()
662 ret = clk_set_rate(sai->mclk, sai->mclk_rate); in rockchip_sai_hw_params()
664 dev_err(sai->dev, "Failed to set mclk to %u: %pe\n", in rockchip_sai_hw_params()
665 sai->mclk_rate, ERR_PTR(ret)); in rockchip_sai_hw_params()
669 mclk_rate = clk_get_rate(sai->mclk); in rockchip_sai_hw_params()
671 dev_err(sai->dev, "Mismatch mclk: %u, at least %u\n", in rockchip_sai_hw_params()
673 ret = -EINVAL; in rockchip_sai_hw_params()
680 if (mclk_rate < mclk_req_rate - CLK_SHIFT_RATE_HZ_MAX || in rockchip_sai_hw_params()
682 dev_err(sai->dev, "Mismatch mclk: %u, expected %u (+/- %dHz)\n", in rockchip_sai_hw_params()
684 ret = -EINVAL; in rockchip_sai_hw_params()
688 regmap_update_bits(sai->regmap, SAI_CKR, SAI_CKR_MDIV_MASK, in rockchip_sai_hw_params()
693 spin_unlock_irqrestore(&sai->xfer_lock, flags); in rockchip_sai_hw_params()
695 pm_runtime_put(sai->dev); in rockchip_sai_hw_params()
709 if (sai->is_master_mode) { in rockchip_sai_prepare()
720 * The maximum BCLK offset is 15.6us @ 8K-8Bit (64kHz BCLK). We in rockchip_sai_prepare()
725 spin_lock_irqsave(&sai->xfer_lock, flags); in rockchip_sai_prepare()
726 regmap_update_bits(sai->regmap, SAI_XFER, in rockchip_sai_prepare()
731 spin_unlock_irqrestore(&sai->xfer_lock, flags); in rockchip_sai_prepare()
747 regmap_update_bits(sai->regmap, SAI_PATH_SEL, in rockchip_sai_path_config()
749 SAI_RX_PATH(i, sai->sdi[i])); in rockchip_sai_path_config()
752 regmap_update_bits(sai->regmap, SAI_PATH_SEL, in rockchip_sai_path_config()
754 SAI_TX_PATH(i, sai->sdo[i])); in rockchip_sai_path_config()
767 path_prop = "rockchip,sai-rx-route"; in rockchip_sai_path_prepare()
768 data = sai->sdi; in rockchip_sai_path_prepare()
769 lanes = &sai->rx_lanes; in rockchip_sai_path_prepare()
771 path_prop = "rockchip,sai-tx-route"; in rockchip_sai_path_prepare()
772 data = sai->sdo; in rockchip_sai_path_prepare()
773 lanes = &sai->tx_lanes; in rockchip_sai_path_prepare()
777 if (num == -ENOENT) { in rockchip_sai_path_prepare()
780 dev_err(sai->dev, "found %d entries in %s, outside of range 1 to %d\n", in rockchip_sai_path_prepare()
782 return -EINVAL; in rockchip_sai_path_prepare()
784 dev_err(sai->dev, "error in %s property: %pe\n", path_prop, in rockchip_sai_path_prepare()
790 ret = device_property_read_u32_array(sai->dev, path_prop, data, num); in rockchip_sai_path_prepare()
792 dev_err(sai->dev, "failed to read property '%s': %pe\n", in rockchip_sai_path_prepare()
799 dev_err(sai->dev, "%s[%d] is %d, should be less than %d\n", in rockchip_sai_path_prepare()
801 return -EINVAL; in rockchip_sai_path_prepare()
815 if (sai->has_playback) { in rockchip_sai_parse_paths()
816 sai->tx_lanes = 1; in rockchip_sai_parse_paths()
819 dev_err(sai->dev, "Failed to prepare TX path: %pe\n", in rockchip_sai_parse_paths()
825 if (sai->has_capture) { in rockchip_sai_parse_paths()
826 sai->rx_lanes = 1; in rockchip_sai_parse_paths()
829 dev_err(sai->dev, "Failed to prepare RX path: %pe\n", in rockchip_sai_parse_paths()
851 rockchip_sai_start(sai, substream->stream); in rockchip_sai_trigger()
856 rockchip_sai_stop(sai, substream->stream); in rockchip_sai_trigger()
859 ret = -EINVAL; in rockchip_sai_trigger()
872 sai->has_playback ? &sai->playback_dma_data : NULL, in rockchip_sai_dai_probe()
873 sai->has_capture ? &sai->capture_dma_data : NULL); in rockchip_sai_dai_probe()
882 int stream = substream->stream; in rockchip_sai_startup()
887 if (sai->substreams[stream]) in rockchip_sai_startup()
888 return -EBUSY; in rockchip_sai_startup()
890 if (sai->wait_time[stream]) in rockchip_sai_startup()
891 substream->wait_time = sai->wait_time[stream]; in rockchip_sai_startup()
893 sai->substreams[stream] = substream; in rockchip_sai_startup()
906 sai->substreams[substream->stream] = NULL; in rockchip_sai_shutdown()
920 sai->is_tdm = false; in rockchip_sai_set_tdm_slot()
923 sai->is_tdm = true; in rockchip_sai_set_tdm_slot()
927 return -EINVAL; in rockchip_sai_set_tdm_slot()
929 pm_runtime_get_sync(dai->dev); in rockchip_sai_set_tdm_slot()
930 spin_lock_irqsave(&sai->xfer_lock, flags); in rockchip_sai_set_tdm_slot()
932 regmap_update_bits(sai->regmap, SAI_TXCR, SAI_XCR_SBW_MASK, in rockchip_sai_set_tdm_slot()
934 regmap_update_bits(sai->regmap, SAI_RXCR, SAI_XCR_SBW_MASK, in rockchip_sai_set_tdm_slot()
936 regmap_update_bits(sai->regmap, SAI_XFER, in rockchip_sai_set_tdm_slot()
939 spin_unlock_irqrestore(&sai->xfer_lock, flags); in rockchip_sai_set_tdm_slot()
940 pm_runtime_put(dai->dev); in rockchip_sai_set_tdm_slot()
950 sai->mclk_rate = freq; in rockchip_sai_set_sysclk()
1101 struct device_node *node = sai->dev->of_node; in rockchip_sai_init_dai()
1106 of_property_for_each_string(node, "dma-names", dma_names, dma_name) { in rockchip_sai_init_dai()
1108 sai->has_playback = true; in rockchip_sai_init_dai()
1110 sai->has_capture = true; in rockchip_sai_init_dai()
1113 dai = devm_kmemdup(sai->dev, &rockchip_sai_dai, in rockchip_sai_init_dai()
1116 return -ENOMEM; in rockchip_sai_init_dai()
1118 if (sai->has_playback) { in rockchip_sai_init_dai()
1119 dai->playback.stream_name = "Playback"; in rockchip_sai_init_dai()
1120 dai->playback.channels_min = 1; in rockchip_sai_init_dai()
1121 dai->playback.channels_max = 512; in rockchip_sai_init_dai()
1122 dai->playback.rates = SNDRV_PCM_RATE_8000_384000; in rockchip_sai_init_dai()
1123 dai->playback.formats = SNDRV_PCM_FMTBIT_S8 | in rockchip_sai_init_dai()
1129 sai->playback_dma_data.addr = res->start + SAI_TXDR; in rockchip_sai_init_dai()
1130 sai->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; in rockchip_sai_init_dai()
1131 sai->playback_dma_data.maxburst = MAXBURST_PER_FIFO; in rockchip_sai_init_dai()
1134 if (sai->has_capture) { in rockchip_sai_init_dai()
1135 dai->capture.stream_name = "Capture"; in rockchip_sai_init_dai()
1136 dai->capture.channels_min = 1; in rockchip_sai_init_dai()
1137 dai->capture.channels_max = 512; in rockchip_sai_init_dai()
1138 dai->capture.rates = SNDRV_PCM_RATE_8000_384000; in rockchip_sai_init_dai()
1139 dai->capture.formats = SNDRV_PCM_FMTBIT_S8 | in rockchip_sai_init_dai()
1145 sai->capture_dma_data.addr = res->start + SAI_RXDR; in rockchip_sai_init_dai()
1146 sai->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; in rockchip_sai_init_dai()
1147 sai->capture_dma_data.maxburst = MAXBURST_PER_FIFO; in rockchip_sai_init_dai()
1150 regmap_update_bits(sai->regmap, SAI_DMACR, SAI_DMACR_TDL_MASK, in rockchip_sai_init_dai()
1152 regmap_update_bits(sai->regmap, SAI_DMACR, SAI_DMACR_RDL_MASK, in rockchip_sai_init_dai()
1218 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in rockchip_sai_wait_time_info()
1219 uinfo->count = 1; in rockchip_sai_wait_time_info()
1220 uinfo->value.integer.min = 0; in rockchip_sai_wait_time_info()
1221 uinfo->value.integer.max = WAIT_TIME_MS_MAX; in rockchip_sai_wait_time_info()
1222 uinfo->value.integer.step = 1; in rockchip_sai_wait_time_info()
1233 ucontrol->value.integer.value[0] = sai->wait_time[SNDRV_PCM_STREAM_CAPTURE]; in rockchip_sai_rd_wait_time_get()
1244 if (ucontrol->value.integer.value[0] > WAIT_TIME_MS_MAX) in rockchip_sai_rd_wait_time_put()
1245 return -EINVAL; in rockchip_sai_rd_wait_time_put()
1247 sai->wait_time[SNDRV_PCM_STREAM_CAPTURE] = ucontrol->value.integer.value[0]; in rockchip_sai_rd_wait_time_put()
1258 ucontrol->value.integer.value[0] = sai->wait_time[SNDRV_PCM_STREAM_PLAYBACK]; in rockchip_sai_wr_wait_time_get()
1269 if (ucontrol->value.integer.value[0] > WAIT_TIME_MS_MAX) in rockchip_sai_wr_wait_time_put()
1270 return -EINVAL; in rockchip_sai_wr_wait_time_put()
1272 sai->wait_time[SNDRV_PCM_STREAM_PLAYBACK] = ucontrol->value.integer.value[0]; in rockchip_sai_wr_wait_time_put()
1337 regmap_read(sai->regmap, SAI_INTSR, &val); in rockchip_sai_isr()
1339 dev_warn_ratelimited(sai->dev, "TX FIFO Underrun\n"); in rockchip_sai_isr()
1340 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_isr()
1342 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_isr()
1345 substream = sai->substreams[SNDRV_PCM_STREAM_PLAYBACK]; in rockchip_sai_isr()
1351 dev_warn_ratelimited(sai->dev, "RX FIFO Overrun\n"); in rockchip_sai_isr()
1352 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_isr()
1354 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_isr()
1357 substream = sai->substreams[SNDRV_PCM_STREAM_CAPTURE]; in rockchip_sai_isr()
1363 dev_warn_ratelimited(sai->dev, "Frame Sync Error\n"); in rockchip_sai_isr()
1364 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_isr()
1366 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_isr()
1372 dev_warn_ratelimited(sai->dev, "Frame Sync Lost\n"); in rockchip_sai_isr()
1373 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_isr()
1375 regmap_update_bits(sai->regmap, SAI_INTCR, in rockchip_sai_isr()
1385 struct device_node *node = pdev->dev.of_node; in rockchip_sai_probe()
1392 sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL); in rockchip_sai_probe()
1394 return -ENOMEM; in rockchip_sai_probe()
1396 sai->dev = &pdev->dev; in rockchip_sai_probe()
1397 sai->fw_ratio = 1; in rockchip_sai_probe()
1399 sai->is_master_mode = true; in rockchip_sai_probe()
1400 dev_set_drvdata(&pdev->dev, sai); in rockchip_sai_probe()
1402 spin_lock_init(&sai->xfer_lock); in rockchip_sai_probe()
1404 sai->rst_h = devm_reset_control_get_optional_exclusive(&pdev->dev, "h"); in rockchip_sai_probe()
1405 if (IS_ERR(sai->rst_h)) in rockchip_sai_probe()
1406 return dev_err_probe(&pdev->dev, PTR_ERR(sai->rst_h), in rockchip_sai_probe()
1409 sai->rst_m = devm_reset_control_get_optional_exclusive(&pdev->dev, "m"); in rockchip_sai_probe()
1410 if (IS_ERR(sai->rst_m)) in rockchip_sai_probe()
1411 return dev_err_probe(&pdev->dev, PTR_ERR(sai->rst_m), in rockchip_sai_probe()
1416 return dev_err_probe(&pdev->dev, PTR_ERR(regs), in rockchip_sai_probe()
1419 sai->regmap = devm_regmap_init_mmio(&pdev->dev, regs, in rockchip_sai_probe()
1421 if (IS_ERR(sai->regmap)) in rockchip_sai_probe()
1422 return dev_err_probe(&pdev->dev, PTR_ERR(sai->regmap), in rockchip_sai_probe()
1427 ret = devm_request_irq(&pdev->dev, irq, rockchip_sai_isr, in rockchip_sai_probe()
1428 IRQF_SHARED, node->name, sai); in rockchip_sai_probe()
1430 return dev_err_probe(&pdev->dev, ret, in rockchip_sai_probe()
1433 dev_dbg(&pdev->dev, "Asked for an IRQ but got %d\n", irq); in rockchip_sai_probe()
1436 sai->mclk = devm_clk_get(&pdev->dev, "mclk"); in rockchip_sai_probe()
1437 if (IS_ERR(sai->mclk)) in rockchip_sai_probe()
1438 return dev_err_probe(&pdev->dev, PTR_ERR(sai->mclk), in rockchip_sai_probe()
1441 sai->hclk = devm_clk_get_enabled(&pdev->dev, "hclk"); in rockchip_sai_probe()
1442 if (IS_ERR(sai->hclk)) in rockchip_sai_probe()
1443 return dev_err_probe(&pdev->dev, PTR_ERR(sai->hclk), in rockchip_sai_probe()
1446 regmap_read(sai->regmap, SAI_VERSION, &sai->version); in rockchip_sai_probe()
1450 return dev_err_probe(&pdev->dev, ret, "Failed to initialize DAI\n"); in rockchip_sai_probe()
1454 return dev_err_probe(&pdev->dev, ret, "Failed to parse paths\n"); in rockchip_sai_probe()
1462 devm_pm_runtime_enable(&pdev->dev); in rockchip_sai_probe()
1463 pm_runtime_get_noresume(&pdev->dev); in rockchip_sai_probe()
1464 ret = rockchip_sai_runtime_resume(&pdev->dev); in rockchip_sai_probe()
1466 return dev_err_probe(&pdev->dev, ret, "Failed to resume device\n"); in rockchip_sai_probe()
1468 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); in rockchip_sai_probe()
1470 dev_err(&pdev->dev, "Failed to register PCM: %d\n", ret); in rockchip_sai_probe()
1474 ret = devm_snd_soc_register_component(&pdev->dev, in rockchip_sai_probe()
1478 dev_err(&pdev->dev, "Failed to register component: %d\n", ret); in rockchip_sai_probe()
1482 pm_runtime_use_autosuspend(&pdev->dev); in rockchip_sai_probe()
1483 pm_runtime_put(&pdev->dev); in rockchip_sai_probe()
1485 clk_disable_unprepare(sai->hclk); in rockchip_sai_probe()
1490 /* If we're !CONFIG_PM, we get -ENOSYS and disable manually */ in rockchip_sai_probe()
1491 if (pm_runtime_put(&pdev->dev)) in rockchip_sai_probe()
1492 rockchip_sai_runtime_suspend(&pdev->dev); in rockchip_sai_probe()
1500 rockchip_sai_runtime_suspend(&pdev->dev); in rockchip_sai_remove()
1510 { .compatible = "rockchip,rk3576-sai", },
1527 MODULE_AUTHOR("Sugar Zhang <sugar.zhang@rock-chips.com>");