113 	const struct lpass_variant *v = drvdata->variant;  in sc7280_lpass_alloc_dma_channel()  local
120 						   v->rdma_channels);  in sc7280_lpass_alloc_dma_channel()
122 			if (chan >= v->rdma_channels)  in sc7280_lpass_alloc_dma_channel()
126 						  v->wrdma_channel_start +  in sc7280_lpass_alloc_dma_channel()
127 						  v->wrdma_channels,  in sc7280_lpass_alloc_dma_channel()
128 						  v->wrdma_channel_start);  in sc7280_lpass_alloc_dma_channel()
130 			if (chan >= v->wrdma_channel_start + v->wrdma_channels)  in sc7280_lpass_alloc_dma_channel()
137 					   v->hdmi_rdma_channels);  in sc7280_lpass_alloc_dma_channel()
138 		if (chan >= v->hdmi_rdma_channels)  in sc7280_lpass_alloc_dma_channel()
144 					   v->rxtx_rdma_channels);  in sc7280_lpass_alloc_dma_channel()
145 		if (chan >= v->rxtx_rdma_channels)  in sc7280_lpass_alloc_dma_channel()
150 					  v->rxtx_wrdma_channel_start +  in sc7280_lpass_alloc_dma_channel()
151 					  v->rxtx_wrdma_channels,  in sc7280_lpass_alloc_dma_channel()
152 					  v->rxtx_wrdma_channel_start);  in sc7280_lpass_alloc_dma_channel()
153 		if (chan >= v->rxtx_wrdma_channel_start + v->rxtx_wrdma_channels)  in sc7280_lpass_alloc_dma_channel()
159 					  v->va_wrdma_channel_start +  in sc7280_lpass_alloc_dma_channel()
160 					  v->va_wrdma_channels,  in sc7280_lpass_alloc_dma_channel()
161 					  v->va_wrdma_channel_start);  in sc7280_lpass_alloc_dma_channel()
162 		if (chan >= v->va_wrdma_channel_start + v->va_wrdma_channels)  in sc7280_lpass_alloc_dma_channel()
264 	.rdma_channels			= 5,
274 	.wrdma_channel_start		= 5,
281 	.rxtx_wrdma_channel_start	= 5,
285 	.va_wrdma_channel_start		= 5,
301 	.rdma_dyncclk			= REG_FIELD_ID(0xC000, 21, 21, 5, 0x1000),
302 	.rdma_bursten			= REG_FIELD_ID(0xC000, 20, 20, 5, 0x1000),
303 	.rdma_wpscnt			= REG_FIELD_ID(0xC000, 16, 19, 5, 0x1000),
304 	.rdma_intf			= REG_FIELD_ID(0xC000, 12, 15, 5, 0x1000),
305 	.rdma_fifowm			= REG_FIELD_ID(0xC000, 1, 5, 5, 0x1000),
306 	.rdma_enable			= REG_FIELD_ID(0xC000, 0, 0, 5, 0x1000),
312 	.wrdma_fifowm			= REG_FIELD_ID(0x18000, 1, 5, 4, 0x1000),
326 	.rxtx_rdma_codec_pack		= REG_FIELD_ID(0xC050, 29, 29, 5, 0x1000),
329 	.rxtx_wrdma_enable		= REG_FIELD_ID(0x18000, 0, 0, 5, 0x1000),
330 	.rxtx_wrdma_fifowm		= REG_FIELD_ID(0x18000, 1, 11, 5, 0x1000),
331 	.rxtx_wrdma_intf		= REG_FIELD_ID(0x18000, 12, 16, 5, 0x1000),
332 	.rxtx_wrdma_wpscnt		= REG_FIELD_ID(0x18000, 17, 20, 5, 0x1000),
333 	.rxtx_wrdma_bursten		= REG_FIELD_ID(0x18000, 21, 21, 5, 0x1000),
334 	.rxtx_wrdma_dyncclk		= REG_FIELD_ID(0x18000, 22, 22, 5, 0x1000),
336 	.rxtx_wrdma_codec_ch		= REG_FIELD_ID(0x18050, 0, 7, 5, 0x1000),
337 	.rxtx_wrdma_codec_intf		= REG_FIELD_ID(0x18050, 16, 19, 5, 0x1000),
338 	.rxtx_wrdma_codec_fs_delay	= REG_FIELD_ID(0x18050, 21, 24, 5, 0x1000),
339 	.rxtx_wrdma_codec_fs_sel	= REG_FIELD_ID(0x18050, 25, 27, 5, 0x1000),
340 	.rxtx_wrdma_codec_pack		= REG_FIELD_ID(0x18050, 29, 29, 5, 0x1000),
341 	.rxtx_wrdma_codec_enable	= REG_FIELD_ID(0x18050, 30, 30, 5, 0x1000),
343 	.va_wrdma_enable		= REG_FIELD_ID(0x18000, 0, 0, 5, 0x1000),
344 	.va_wrdma_fifowm		= REG_FIELD_ID(0x18000, 1, 11, 5, 0x1000),
345 	.va_wrdma_intf			= REG_FIELD_ID(0x18000, 12, 16, 5, 0x1000),
346 	.va_wrdma_wpscnt		= REG_FIELD_ID(0x18000, 17, 20, 5, 0x1000),
347 	.va_wrdma_bursten		= REG_FIELD_ID(0x18000, 21, 21, 5, 0x1000),
348 	.va_wrdma_dyncclk		= REG_FIELD_ID(0x18000, 22, 22, 5, 0x1000),
350 	.va_wrdma_codec_ch		= REG_FIELD_ID(0x18050, 0, 7, 5, 0x1000),
351 	.va_wrdma_codec_intf		= REG_FIELD_ID(0x18050, 16, 19, 5, 0x1000),
352 	.va_wrdma_codec_fs_delay	= REG_FIELD_ID(0x18050, 21, 24, 5, 0x1000),
353 	.va_wrdma_codec_fs_sel		= REG_FIELD_ID(0x18050, 25, 27, 5, 0x1000),
354 	.va_wrdma_codec_pack		= REG_FIELD_ID(0x18050, 29, 29, 5, 0x1000),
355 	.va_wrdma_codec_enable		= REG_FIELD_ID(0x18050, 30, 30, 5, 0x1000),
377 	.hdmi_rdma_fifowm		= REG_FIELD_ID(0x64000, 1, 5, 4, 0x1000),
384 	.layout_sp			= REG_FIELD(0x6101c, 5, 8),
404 	.hw_usr_sel			= REG_FIELD(0x61038, 5, 6),