Lines Matching +full:playback +full:- +full:sd +full:- +full:lines
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
5 * lpass-cpu.c -- ALSA SoC CPU DAI driver for QTi LPASS
8 #include <dt-bindings/sound/qcom,lpass.h>
18 #include <sound/soc-dai.h>
19 #include "lpass-lpaif-reg.h"
47 const struct lpass_variant *v = drvdata->variant; in lpass_cpu_init_i2sctl_bitfields()
49 i2sctl->loopback = devm_regmap_field_alloc(dev, map, v->loopback); in lpass_cpu_init_i2sctl_bitfields()
50 i2sctl->spken = devm_regmap_field_alloc(dev, map, v->spken); in lpass_cpu_init_i2sctl_bitfields()
51 i2sctl->spkmode = devm_regmap_field_alloc(dev, map, v->spkmode); in lpass_cpu_init_i2sctl_bitfields()
52 i2sctl->spkmono = devm_regmap_field_alloc(dev, map, v->spkmono); in lpass_cpu_init_i2sctl_bitfields()
53 i2sctl->micen = devm_regmap_field_alloc(dev, map, v->micen); in lpass_cpu_init_i2sctl_bitfields()
54 i2sctl->micmode = devm_regmap_field_alloc(dev, map, v->micmode); in lpass_cpu_init_i2sctl_bitfields()
55 i2sctl->micmono = devm_regmap_field_alloc(dev, map, v->micmono); in lpass_cpu_init_i2sctl_bitfields()
56 i2sctl->wssrc = devm_regmap_field_alloc(dev, map, v->wssrc); in lpass_cpu_init_i2sctl_bitfields()
57 i2sctl->bitwidth = devm_regmap_field_alloc(dev, map, v->bitwidth); in lpass_cpu_init_i2sctl_bitfields()
59 if (IS_ERR(i2sctl->loopback) || IS_ERR(i2sctl->spken) || in lpass_cpu_init_i2sctl_bitfields()
60 IS_ERR(i2sctl->spkmode) || IS_ERR(i2sctl->spkmono) || in lpass_cpu_init_i2sctl_bitfields()
61 IS_ERR(i2sctl->micen) || IS_ERR(i2sctl->micmode) || in lpass_cpu_init_i2sctl_bitfields()
62 IS_ERR(i2sctl->micmono) || IS_ERR(i2sctl->wssrc) || in lpass_cpu_init_i2sctl_bitfields()
63 IS_ERR(i2sctl->bitwidth)) in lpass_cpu_init_i2sctl_bitfields()
64 return -EINVAL; in lpass_cpu_init_i2sctl_bitfields()
75 ret = clk_set_rate(drvdata->mi2s_osr_clk[dai->driver->id], freq); in lpass_cpu_daiops_set_sysclk()
77 dev_err(dai->dev, "error setting mi2s osrclk to %u: %d\n", in lpass_cpu_daiops_set_sysclk()
89 ret = clk_prepare_enable(drvdata->mi2s_osr_clk[dai->driver->id]); in lpass_cpu_daiops_startup()
91 dev_err(dai->dev, "error in enabling mi2s osr clk: %d\n", ret); in lpass_cpu_daiops_startup()
94 ret = clk_prepare(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_startup()
96 dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); in lpass_cpu_daiops_startup()
97 clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); in lpass_cpu_daiops_startup()
107 struct lpaif_i2sctl *i2sctl = drvdata->i2sctl; in lpass_cpu_daiops_shutdown()
108 unsigned int id = dai->driver->id; in lpass_cpu_daiops_shutdown()
110 clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); in lpass_cpu_daiops_shutdown()
116 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in lpass_cpu_daiops_shutdown()
117 regmap_fields_write(i2sctl->spken, id, LPAIF_I2SCTL_SPKEN_DISABLE); in lpass_cpu_daiops_shutdown()
119 regmap_fields_write(i2sctl->micen, id, LPAIF_I2SCTL_MICEN_DISABLE); in lpass_cpu_daiops_shutdown()
126 if (drvdata->mi2s_was_prepared[dai->driver->id]) { in lpass_cpu_daiops_shutdown()
127 drvdata->mi2s_was_prepared[dai->driver->id] = false; in lpass_cpu_daiops_shutdown()
128 clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_shutdown()
131 clk_unprepare(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_shutdown()
138 struct lpaif_i2sctl *i2sctl = drvdata->i2sctl; in lpass_cpu_daiops_hw_params()
139 unsigned int id = dai->driver->id; in lpass_cpu_daiops_hw_params()
149 dev_err(dai->dev, "invalid bit width given: %d\n", bitwidth); in lpass_cpu_daiops_hw_params()
153 ret = regmap_fields_write(i2sctl->loopback, id, in lpass_cpu_daiops_hw_params()
156 dev_err(dai->dev, "error updating loopback field: %d\n", ret); in lpass_cpu_daiops_hw_params()
160 ret = regmap_fields_write(i2sctl->wssrc, id, in lpass_cpu_daiops_hw_params()
163 dev_err(dai->dev, "error updating wssrc field: %d\n", ret); in lpass_cpu_daiops_hw_params()
178 dev_err(dai->dev, "invalid bitwidth given: %d\n", bitwidth); in lpass_cpu_daiops_hw_params()
179 return -EINVAL; in lpass_cpu_daiops_hw_params()
182 ret = regmap_fields_write(i2sctl->bitwidth, id, regval); in lpass_cpu_daiops_hw_params()
184 dev_err(dai->dev, "error updating bitwidth field: %d\n", ret); in lpass_cpu_daiops_hw_params()
188 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in lpass_cpu_daiops_hw_params()
189 mode = drvdata->mi2s_playback_sd_mode[id]; in lpass_cpu_daiops_hw_params()
191 mode = drvdata->mi2s_capture_sd_mode[id]; in lpass_cpu_daiops_hw_params()
194 dev_err(dai->dev, "no line is assigned\n"); in lpass_cpu_daiops_hw_params()
195 return -EINVAL; in lpass_cpu_daiops_hw_params()
215 dev_err(dai->dev, "cannot configure 4 channels with mode %d\n", in lpass_cpu_daiops_hw_params()
217 return -EINVAL; in lpass_cpu_daiops_hw_params()
229 dev_err(dai->dev, "cannot configure 6 channels with mode %d\n", in lpass_cpu_daiops_hw_params()
231 return -EINVAL; in lpass_cpu_daiops_hw_params()
242 dev_err(dai->dev, "cannot configure 8 channels with mode %d\n", in lpass_cpu_daiops_hw_params()
244 return -EINVAL; in lpass_cpu_daiops_hw_params()
248 dev_err(dai->dev, "invalid channels given: %u\n", channels); in lpass_cpu_daiops_hw_params()
249 return -EINVAL; in lpass_cpu_daiops_hw_params()
252 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in lpass_cpu_daiops_hw_params()
253 ret = regmap_fields_write(i2sctl->spkmode, id, in lpass_cpu_daiops_hw_params()
256 dev_err(dai->dev, "error writing to i2sctl spkr mode: %d\n", in lpass_cpu_daiops_hw_params()
261 ret = regmap_fields_write(i2sctl->spkmono, id, in lpass_cpu_daiops_hw_params()
264 ret = regmap_fields_write(i2sctl->spkmono, id, in lpass_cpu_daiops_hw_params()
267 ret = regmap_fields_write(i2sctl->micmode, id, in lpass_cpu_daiops_hw_params()
270 dev_err(dai->dev, "error writing to i2sctl mic mode: %d\n", in lpass_cpu_daiops_hw_params()
275 ret = regmap_fields_write(i2sctl->micmono, id, in lpass_cpu_daiops_hw_params()
278 ret = regmap_fields_write(i2sctl->micmono, id, in lpass_cpu_daiops_hw_params()
283 dev_err(dai->dev, "error writing to i2sctl channels mode: %d\n", in lpass_cpu_daiops_hw_params()
288 ret = clk_set_rate(drvdata->mi2s_bit_clk[id], in lpass_cpu_daiops_hw_params()
291 dev_err(dai->dev, "error setting mi2s bitclk to %u: %d\n", in lpass_cpu_daiops_hw_params()
303 struct lpaif_i2sctl *i2sctl = drvdata->i2sctl; in lpass_cpu_daiops_trigger()
304 unsigned int id = dai->driver->id; in lpass_cpu_daiops_trigger()
305 int ret = -EINVAL; in lpass_cpu_daiops_trigger()
323 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in lpass_cpu_daiops_trigger()
324 ret = regmap_fields_write(i2sctl->spken, id, in lpass_cpu_daiops_trigger()
327 ret = regmap_fields_write(i2sctl->micen, id, in lpass_cpu_daiops_trigger()
331 dev_err(dai->dev, "error writing to i2sctl reg: %d\n", in lpass_cpu_daiops_trigger()
334 ret = clk_enable(drvdata->mi2s_bit_clk[id]); in lpass_cpu_daiops_trigger()
336 dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); in lpass_cpu_daiops_trigger()
337 clk_disable(drvdata->mi2s_osr_clk[id]); in lpass_cpu_daiops_trigger()
348 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in lpass_cpu_daiops_trigger()
349 ret = regmap_fields_write(i2sctl->spken, id, in lpass_cpu_daiops_trigger()
352 ret = regmap_fields_write(i2sctl->micen, id, in lpass_cpu_daiops_trigger()
356 dev_err(dai->dev, "error writing to i2sctl reg: %d\n", in lpass_cpu_daiops_trigger()
359 clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_trigger()
371 struct lpaif_i2sctl *i2sctl = drvdata->i2sctl; in lpass_cpu_daiops_prepare()
372 unsigned int id = dai->driver->id; in lpass_cpu_daiops_prepare()
376 * Ensure lpass BCLK/LRCLK is enabled bit before playback/capture in lpass_cpu_daiops_prepare()
381 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in lpass_cpu_daiops_prepare()
382 ret = regmap_fields_write(i2sctl->spken, id, LPAIF_I2SCTL_SPKEN_ENABLE); in lpass_cpu_daiops_prepare()
384 ret = regmap_fields_write(i2sctl->micen, id, LPAIF_I2SCTL_MICEN_ENABLE); in lpass_cpu_daiops_prepare()
387 dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret); in lpass_cpu_daiops_prepare()
396 if (!drvdata->mi2s_was_prepared[dai->driver->id]) { in lpass_cpu_daiops_prepare()
397 ret = clk_enable(drvdata->mi2s_bit_clk[id]); in lpass_cpu_daiops_prepare()
399 dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); in lpass_cpu_daiops_prepare()
402 drvdata->mi2s_was_prepared[dai->driver->id] = true; in lpass_cpu_daiops_prepare()
410 struct snd_soc_dai_driver *drv = dai->driver; in lpass_cpu_daiops_pcm_new()
413 if (drvdata->mi2s_playback_sd_mode[dai->id] == LPAIF_I2SCTL_MODE_QUAD01) { in lpass_cpu_daiops_pcm_new()
414 ret = snd_pcm_add_chmap_ctls(rtd->pcm, SNDRV_PCM_STREAM_PLAYBACK, in lpass_cpu_daiops_pcm_new()
415 lpass_quad_chmaps, drv->playback.channels_max, 0, in lpass_cpu_daiops_pcm_new()
430 ret = regmap_write(drvdata->lpaif_map, in lpass_cpu_daiops_probe()
431 LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id), 0); in lpass_cpu_daiops_probe()
433 dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret); in lpass_cpu_daiops_probe()
466 const struct lpass_variant *variant = drvdata->variant; in asoc_qcom_of_xlate_dai_name()
467 int id = args->args[0]; in asoc_qcom_of_xlate_dai_name()
468 int ret = -EINVAL; in asoc_qcom_of_xlate_dai_name()
471 for (i = 0; i < variant->num_dai; i++) { in asoc_qcom_of_xlate_dai_name()
472 if (variant->dai_driver[i].id == id) { in asoc_qcom_of_xlate_dai_name()
473 *dai_name = variant->dai_driver[i].name; in asoc_qcom_of_xlate_dai_name()
483 .name = "lpass-cpu",
491 const struct lpass_variant *v = drvdata->variant; in lpass_cpu_regmap_writeable()
494 for (i = 0; i < v->i2s_ports; ++i) in lpass_cpu_regmap_writeable()
498 for (i = 0; i < v->irq_ports; ++i) { in lpass_cpu_regmap_writeable()
505 for (i = 0; i < v->rdma_channels; ++i) { in lpass_cpu_regmap_writeable()
516 for (i = 0; i < v->wrdma_channels; ++i) { in lpass_cpu_regmap_writeable()
517 if (reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
519 if (reg == LPAIF_WRDMABASE_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
521 if (reg == LPAIF_WRDMABUFF_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
523 if (reg == LPAIF_WRDMAPER_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
533 const struct lpass_variant *v = drvdata->variant; in lpass_cpu_regmap_readable()
536 for (i = 0; i < v->i2s_ports; ++i) in lpass_cpu_regmap_readable()
540 for (i = 0; i < v->irq_ports; ++i) { in lpass_cpu_regmap_readable()
549 for (i = 0; i < v->rdma_channels; ++i) { in lpass_cpu_regmap_readable()
562 for (i = 0; i < v->wrdma_channels; ++i) { in lpass_cpu_regmap_readable()
563 if (reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
565 if (reg == LPAIF_WRDMABASE_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
567 if (reg == LPAIF_WRDMABUFF_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
569 if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
571 if (reg == LPAIF_WRDMAPER_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
581 const struct lpass_variant *v = drvdata->variant; in lpass_cpu_regmap_volatile()
584 for (i = 0; i < v->irq_ports; ++i) { in lpass_cpu_regmap_volatile()
591 for (i = 0; i < v->rdma_channels; ++i) in lpass_cpu_regmap_volatile()
595 for (i = 0; i < v->wrdma_channels; ++i) in lpass_cpu_regmap_volatile()
596 if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_volatile()
616 const struct lpass_variant *v = drvdata->variant; in lpass_hdmi_init_bitfields()
631 return -ENOMEM; in lpass_hdmi_init_bitfields()
633 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->soft_reset, tx_ctl->soft_reset); in lpass_hdmi_init_bitfields()
634 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->force_reset, tx_ctl->force_reset); in lpass_hdmi_init_bitfields()
635 drvdata->tx_ctl = tx_ctl; in lpass_hdmi_init_bitfields()
637 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->legacy_en, legacy_en); in lpass_hdmi_init_bitfields()
638 drvdata->hdmitx_legacy_en = legacy_en; in lpass_hdmi_init_bitfields()
642 return -ENOMEM; in lpass_hdmi_init_bitfields()
644 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->replace_vbit, vbit_ctl->replace_vbit); in lpass_hdmi_init_bitfields()
645 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->vbit_stream, vbit_ctl->vbit_stream); in lpass_hdmi_init_bitfields()
646 drvdata->vbit_ctl = vbit_ctl; in lpass_hdmi_init_bitfields()
649 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->calc_en, tx_parity); in lpass_hdmi_init_bitfields()
650 drvdata->hdmitx_parity_calc_en = tx_parity; in lpass_hdmi_init_bitfields()
654 return -ENOMEM; in lpass_hdmi_init_bitfields()
656 rval = devm_regmap_field_bulk_alloc(dev, map, &meta_ctl->mute, &v->mute, 7); in lpass_hdmi_init_bitfields()
659 drvdata->meta_ctl = meta_ctl; in lpass_hdmi_init_bitfields()
663 return -ENOMEM; in lpass_hdmi_init_bitfields()
665 rval = devm_regmap_field_bulk_alloc(dev, map, &sstream_ctl->sstream_en, &v->sstream_en, 9); in lpass_hdmi_init_bitfields()
669 drvdata->sstream_ctl = sstream_ctl; in lpass_hdmi_init_bitfields()
672 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->msb_bits, ch_msb); in lpass_hdmi_init_bitfields()
673 drvdata->hdmitx_ch_msb[i] = ch_msb; in lpass_hdmi_init_bitfields()
675 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->lsb_bits, ch_lsb); in lpass_hdmi_init_bitfields()
676 drvdata->hdmitx_ch_lsb[i] = ch_lsb; in lpass_hdmi_init_bitfields()
680 return -ENOMEM; in lpass_hdmi_init_bitfields()
682 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->use_hw_chs, tx_dmactl->use_hw_chs); in lpass_hdmi_init_bitfields()
683 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->use_hw_usr, tx_dmactl->use_hw_usr); in lpass_hdmi_init_bitfields()
684 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->hw_chs_sel, tx_dmactl->hw_chs_sel); in lpass_hdmi_init_bitfields()
685 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->hw_usr_sel, tx_dmactl->hw_usr_sel); in lpass_hdmi_init_bitfields()
686 drvdata->hdmi_tx_dmactl[i] = tx_dmactl; in lpass_hdmi_init_bitfields()
694 const struct lpass_variant *v = drvdata->variant; in lpass_hdmi_regmap_writeable()
714 for (i = 0; i < v->hdmi_rdma_channels; i++) { in lpass_hdmi_regmap_writeable()
723 for (i = 0; i < v->hdmi_rdma_channels; ++i) { in lpass_hdmi_regmap_writeable()
739 const struct lpass_variant *v = drvdata->variant; in lpass_hdmi_regmap_readable()
749 for (i = 0; i < v->hdmi_rdma_channels; i++) { in lpass_hdmi_regmap_readable()
769 for (i = 0; i < v->hdmi_rdma_channels; ++i) { in lpass_hdmi_regmap_readable()
788 const struct lpass_variant *v = drvdata->variant; in lpass_hdmi_regmap_volatile()
800 for (i = 0; i < v->hdmi_rdma_channels; ++i) { in lpass_hdmi_regmap_volatile()
827 const struct lpass_variant *v = drvdata->variant; in __lpass_rxtx_regmap_accessible()
830 for (i = 0; i < v->rxtx_irq_ports; ++i) { in __lpass_rxtx_regmap_accessible()
839 for (i = 0; i < v->rxtx_rdma_channels; ++i) { in __lpass_rxtx_regmap_accessible()
856 for (i = 0; i < v->rxtx_wrdma_channels; ++i) { in __lpass_rxtx_regmap_accessible()
857 if (reg == LPAIF_CDC_RXTX_WRDMACTL_REG(v, i + v->rxtx_wrdma_channel_start, in __lpass_rxtx_regmap_accessible()
860 if (reg == LPAIF_CDC_RXTX_WRDMABASE_REG(v, i + v->rxtx_wrdma_channel_start, in __lpass_rxtx_regmap_accessible()
863 if (reg == LPAIF_CDC_RXTX_WRDMABUFF_REG(v, i + v->rxtx_wrdma_channel_start, in __lpass_rxtx_regmap_accessible()
870 if (reg == LPAIF_CDC_RXTX_WRDMAPER_REG(v, i + v->rxtx_wrdma_channel_start, in __lpass_rxtx_regmap_accessible()
873 if (reg == LPAIF_CDC_RXTX_WRDMA_INTF_REG(v, i + v->rxtx_wrdma_channel_start, in __lpass_rxtx_regmap_accessible()
893 const struct lpass_variant *v = drvdata->variant; in lpass_rxtx_regmap_volatile()
896 for (i = 0; i < v->rxtx_irq_ports; ++i) { in lpass_rxtx_regmap_volatile()
903 for (i = 0; i < v->rxtx_rdma_channels; ++i) in lpass_rxtx_regmap_volatile()
907 for (i = 0; i < v->rxtx_wrdma_channels; ++i) in lpass_rxtx_regmap_volatile()
908 if (reg == LPAIF_CDC_RXTX_WRDMACURR_REG(v, i + v->rxtx_wrdma_channel_start, in lpass_rxtx_regmap_volatile()
918 const struct lpass_variant *v = drvdata->variant; in __lpass_va_regmap_accessible()
921 for (i = 0; i < v->va_irq_ports; ++i) { in __lpass_va_regmap_accessible()
930 for (i = 0; i < v->va_wrdma_channels; ++i) { in __lpass_va_regmap_accessible()
931 if (reg == LPAIF_CDC_VA_WRDMACTL_REG(v, i + v->va_wrdma_channel_start, in __lpass_va_regmap_accessible()
934 if (reg == LPAIF_CDC_VA_WRDMABASE_REG(v, i + v->va_wrdma_channel_start, in __lpass_va_regmap_accessible()
937 if (reg == LPAIF_CDC_VA_WRDMABUFF_REG(v, i + v->va_wrdma_channel_start, in __lpass_va_regmap_accessible()
941 if (reg == LPAIF_CDC_VA_WRDMACURR_REG(v, i + v->va_wrdma_channel_start, in __lpass_va_regmap_accessible()
945 if (reg == LPAIF_CDC_VA_WRDMAPER_REG(v, i + v->va_wrdma_channel_start, in __lpass_va_regmap_accessible()
948 if (reg == LPAIF_CDC_VA_WRDMA_INTF_REG(v, i + v->va_wrdma_channel_start, in __lpass_va_regmap_accessible()
968 const struct lpass_variant *v = drvdata->variant; in lpass_va_regmap_volatile()
971 for (i = 0; i < v->va_irq_ports; ++i) { in lpass_va_regmap_volatile()
978 for (i = 0; i < v->va_wrdma_channels; ++i) { in lpass_va_regmap_volatile()
979 if (reg == LPAIF_CDC_VA_WRDMACURR_REG(v, i + v->va_wrdma_channel_start, in lpass_va_regmap_volatile()
1011 unsigned int lines[LPASS_CPU_MAX_MI2S_LINES]; in of_lpass_cpu_parse_sd_lines() local
1015 num_lines = of_property_read_variable_u32_array(node, name, lines, 0, in of_lpass_cpu_parse_sd_lines()
1021 sd_line_mask |= BIT(lines[i]); in of_lpass_cpu_parse_sd_lines()
1041 dev_err(dev, "Unsupported SD line mask: %#x\n", sd_line_mask); in of_lpass_cpu_parse_sd_lines()
1053 for (i = 0; i < data->variant->num_dai; i++) { in of_lpass_cpu_parse_dai_data()
1054 id = data->variant->dai_driver[i].id; in of_lpass_cpu_parse_dai_data()
1055 data->mi2s_playback_sd_mode[id] = LPAIF_I2SCTL_MODE_8CH; in of_lpass_cpu_parse_dai_data()
1056 data->mi2s_capture_sd_mode[id] = LPAIF_I2SCTL_MODE_8CH; in of_lpass_cpu_parse_dai_data()
1059 for_each_child_of_node(dev->of_node, node) { in of_lpass_cpu_parse_dai_data()
1066 data->hdmi_port_enable = 1; in of_lpass_cpu_parse_dai_data()
1068 data->codec_dma_enable = 1; in of_lpass_cpu_parse_dai_data()
1070 data->mi2s_playback_sd_mode[id] = in of_lpass_cpu_parse_dai_data()
1072 "qcom,playback-sd-lines"); in of_lpass_cpu_parse_dai_data()
1073 data->mi2s_capture_sd_mode[id] = in of_lpass_cpu_parse_dai_data()
1075 "qcom,capture-sd-lines"); in of_lpass_cpu_parse_dai_data()
1083 data->codec_mem0 = devm_clk_get(dev, "audio_cc_codec_mem0"); in of_lpass_cdc_dma_clks_parse()
1084 if (IS_ERR(data->codec_mem0)) in of_lpass_cdc_dma_clks_parse()
1085 return PTR_ERR(data->codec_mem0); in of_lpass_cdc_dma_clks_parse()
1087 data->codec_mem1 = devm_clk_get(dev, "audio_cc_codec_mem1"); in of_lpass_cdc_dma_clks_parse()
1088 if (IS_ERR(data->codec_mem1)) in of_lpass_cdc_dma_clks_parse()
1089 return PTR_ERR(data->codec_mem1); in of_lpass_cdc_dma_clks_parse()
1091 data->codec_mem2 = devm_clk_get(dev, "audio_cc_codec_mem2"); in of_lpass_cdc_dma_clks_parse()
1092 if (IS_ERR(data->codec_mem2)) in of_lpass_cdc_dma_clks_parse()
1093 return PTR_ERR(data->codec_mem2); in of_lpass_cdc_dma_clks_parse()
1095 data->va_mem0 = devm_clk_get(dev, "aon_cc_va_mem0"); in of_lpass_cdc_dma_clks_parse()
1096 if (IS_ERR(data->va_mem0)) in of_lpass_cdc_dma_clks_parse()
1097 return PTR_ERR(data->va_mem0); in of_lpass_cdc_dma_clks_parse()
1108 struct device *dev = &pdev->dev; in asoc_qcom_lpass_cpu_platform_probe()
1111 dsp_of_node = of_parse_phandle(pdev->dev.of_node, "qcom,adsp", 0); in asoc_qcom_lpass_cpu_platform_probe()
1115 return -EBUSY; in asoc_qcom_lpass_cpu_platform_probe()
1120 return -ENOMEM; in asoc_qcom_lpass_cpu_platform_probe()
1125 return -EINVAL; in asoc_qcom_lpass_cpu_platform_probe()
1127 if (of_device_is_compatible(dev->of_node, "qcom,lpass-cpu-apq8016")) in asoc_qcom_lpass_cpu_platform_probe()
1128 dev_warn(dev, "qcom,lpass-cpu-apq8016 compatible is deprecated\n"); in asoc_qcom_lpass_cpu_platform_probe()
1130 drvdata->variant = variant; in asoc_qcom_lpass_cpu_platform_probe()
1134 if (drvdata->codec_dma_enable) { in asoc_qcom_lpass_cpu_platform_probe()
1135 drvdata->rxtx_lpaif = in asoc_qcom_lpass_cpu_platform_probe()
1136 devm_platform_ioremap_resource_byname(pdev, "lpass-rxtx-lpaif"); in asoc_qcom_lpass_cpu_platform_probe()
1137 if (IS_ERR(drvdata->rxtx_lpaif)) in asoc_qcom_lpass_cpu_platform_probe()
1138 return PTR_ERR(drvdata->rxtx_lpaif); in asoc_qcom_lpass_cpu_platform_probe()
1140 drvdata->va_lpaif = devm_platform_ioremap_resource_byname(pdev, "lpass-va-lpaif"); in asoc_qcom_lpass_cpu_platform_probe()
1141 if (IS_ERR(drvdata->va_lpaif)) in asoc_qcom_lpass_cpu_platform_probe()
1142 return PTR_ERR(drvdata->va_lpaif); in asoc_qcom_lpass_cpu_platform_probe()
1145 variant->rxtx_wrdma_channels + in asoc_qcom_lpass_cpu_platform_probe()
1146 variant->rxtx_wrdma_channel_start, LPASS_CDC_DMA_TX3); in asoc_qcom_lpass_cpu_platform_probe()
1148 drvdata->rxtx_lpaif_map = devm_regmap_init_mmio(dev, drvdata->rxtx_lpaif, in asoc_qcom_lpass_cpu_platform_probe()
1150 if (IS_ERR(drvdata->rxtx_lpaif_map)) in asoc_qcom_lpass_cpu_platform_probe()
1151 return PTR_ERR(drvdata->rxtx_lpaif_map); in asoc_qcom_lpass_cpu_platform_probe()
1154 variant->va_wrdma_channels + in asoc_qcom_lpass_cpu_platform_probe()
1155 variant->va_wrdma_channel_start, LPASS_CDC_DMA_VA_TX0); in asoc_qcom_lpass_cpu_platform_probe()
1157 drvdata->va_lpaif_map = devm_regmap_init_mmio(dev, drvdata->va_lpaif, in asoc_qcom_lpass_cpu_platform_probe()
1159 if (IS_ERR(drvdata->va_lpaif_map)) in asoc_qcom_lpass_cpu_platform_probe()
1160 return PTR_ERR(drvdata->va_lpaif_map); in asoc_qcom_lpass_cpu_platform_probe()
1168 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpass-rxtx-cdc-dma-lpm"); in asoc_qcom_lpass_cpu_platform_probe()
1170 return -EINVAL; in asoc_qcom_lpass_cpu_platform_probe()
1171 drvdata->rxtx_cdc_dma_lpm_buf = res->start; in asoc_qcom_lpass_cpu_platform_probe()
1173 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpass-va-cdc-dma-lpm"); in asoc_qcom_lpass_cpu_platform_probe()
1175 return -EINVAL; in asoc_qcom_lpass_cpu_platform_probe()
1176 drvdata->va_cdc_dma_lpm_buf = res->start; in asoc_qcom_lpass_cpu_platform_probe()
1179 drvdata->lpaif = devm_platform_ioremap_resource_byname(pdev, "lpass-lpaif"); in asoc_qcom_lpass_cpu_platform_probe()
1180 if (IS_ERR(drvdata->lpaif)) in asoc_qcom_lpass_cpu_platform_probe()
1181 return PTR_ERR(drvdata->lpaif); in asoc_qcom_lpass_cpu_platform_probe()
1184 variant->wrdma_channels + in asoc_qcom_lpass_cpu_platform_probe()
1185 variant->wrdma_channel_start); in asoc_qcom_lpass_cpu_platform_probe()
1187 drvdata->lpaif_map = devm_regmap_init_mmio(dev, drvdata->lpaif, in asoc_qcom_lpass_cpu_platform_probe()
1189 if (IS_ERR(drvdata->lpaif_map)) { in asoc_qcom_lpass_cpu_platform_probe()
1191 PTR_ERR(drvdata->lpaif_map)); in asoc_qcom_lpass_cpu_platform_probe()
1192 return PTR_ERR(drvdata->lpaif_map); in asoc_qcom_lpass_cpu_platform_probe()
1195 if (drvdata->hdmi_port_enable) { in asoc_qcom_lpass_cpu_platform_probe()
1196 drvdata->hdmiif = devm_platform_ioremap_resource_byname(pdev, "lpass-hdmiif"); in asoc_qcom_lpass_cpu_platform_probe()
1197 if (IS_ERR(drvdata->hdmiif)) in asoc_qcom_lpass_cpu_platform_probe()
1198 return PTR_ERR(drvdata->hdmiif); in asoc_qcom_lpass_cpu_platform_probe()
1201 variant->hdmi_rdma_channels - 1); in asoc_qcom_lpass_cpu_platform_probe()
1202 drvdata->hdmiif_map = devm_regmap_init_mmio(dev, drvdata->hdmiif, in asoc_qcom_lpass_cpu_platform_probe()
1204 if (IS_ERR(drvdata->hdmiif_map)) { in asoc_qcom_lpass_cpu_platform_probe()
1206 PTR_ERR(drvdata->hdmiif_map)); in asoc_qcom_lpass_cpu_platform_probe()
1207 return PTR_ERR(drvdata->hdmiif_map); in asoc_qcom_lpass_cpu_platform_probe()
1211 if (variant->init) { in asoc_qcom_lpass_cpu_platform_probe()
1212 ret = variant->init(pdev); in asoc_qcom_lpass_cpu_platform_probe()
1219 for (i = 0; i < variant->num_dai; i++) { in asoc_qcom_lpass_cpu_platform_probe()
1220 dai_id = variant->dai_driver[i].id; in asoc_qcom_lpass_cpu_platform_probe()
1224 drvdata->mi2s_osr_clk[dai_id] = devm_clk_get_optional(dev, in asoc_qcom_lpass_cpu_platform_probe()
1225 variant->dai_osr_clk_names[i]); in asoc_qcom_lpass_cpu_platform_probe()
1226 drvdata->mi2s_bit_clk[dai_id] = devm_clk_get(dev, in asoc_qcom_lpass_cpu_platform_probe()
1227 variant->dai_bit_clk_names[i]); in asoc_qcom_lpass_cpu_platform_probe()
1228 if (IS_ERR(drvdata->mi2s_bit_clk[dai_id])) { in asoc_qcom_lpass_cpu_platform_probe()
1231 variant->dai_bit_clk_names[i], in asoc_qcom_lpass_cpu_platform_probe()
1232 PTR_ERR(drvdata->mi2s_bit_clk[dai_id])); in asoc_qcom_lpass_cpu_platform_probe()
1233 return PTR_ERR(drvdata->mi2s_bit_clk[dai_id]); in asoc_qcom_lpass_cpu_platform_probe()
1235 if (drvdata->mi2s_playback_sd_mode[dai_id] == in asoc_qcom_lpass_cpu_platform_probe()
1237 variant->dai_driver[dai_id].playback.channels_min = 4; in asoc_qcom_lpass_cpu_platform_probe()
1238 variant->dai_driver[dai_id].playback.channels_max = 4; in asoc_qcom_lpass_cpu_platform_probe()
1243 drvdata->i2sctl = devm_kzalloc(&pdev->dev, sizeof(struct lpaif_i2sctl), in asoc_qcom_lpass_cpu_platform_probe()
1245 if (!drvdata->i2sctl) in asoc_qcom_lpass_cpu_platform_probe()
1246 return -ENOMEM; in asoc_qcom_lpass_cpu_platform_probe()
1249 ret = lpass_cpu_init_i2sctl_bitfields(dev, drvdata->i2sctl, in asoc_qcom_lpass_cpu_platform_probe()
1250 drvdata->lpaif_map); in asoc_qcom_lpass_cpu_platform_probe()
1256 if (drvdata->hdmi_port_enable) { in asoc_qcom_lpass_cpu_platform_probe()
1257 ret = lpass_hdmi_init_bitfields(dev, drvdata->hdmiif_map); in asoc_qcom_lpass_cpu_platform_probe()
1265 variant->dai_driver, in asoc_qcom_lpass_cpu_platform_probe()
1266 variant->num_dai); in asoc_qcom_lpass_cpu_platform_probe()
1287 if (drvdata->variant->exit) in asoc_qcom_lpass_cpu_platform_remove()
1288 drvdata->variant->exit(pdev); in asoc_qcom_lpass_cpu_platform_remove()
1296 if (drvdata->variant->exit) in asoc_qcom_lpass_cpu_platform_shutdown()
1297 drvdata->variant->exit(pdev); in asoc_qcom_lpass_cpu_platform_shutdown()