Lines Matching full:switch
223 SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1 Switch", AFE_CONN0,
225 SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1 Switch", AFE_CONN0,
227 SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1 Switch", AFE_CONN0,
229 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH1 Switch", AFE_CONN0,
231 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH3 Switch", AFE_CONN0,
233 SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH1 Switch", AFE_CONN0_1,
235 SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH1 Switch", AFE_CONN0_1,
237 SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH1 Switch", AFE_CONN0_1,
239 SOC_DAPM_SINGLE_AUTODISABLE("DL8_CH1 Switch", AFE_CONN0_1,
241 SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH1 Switch", AFE_CONN0,
243 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1 Switch", AFE_CONN0,
245 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2 Switch", AFE_CONN0,
247 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH3 Switch", AFE_CONN0,
249 SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1 Switch", AFE_CONN0,
251 SOC_DAPM_SINGLE_AUTODISABLE("SRC_1_OUT_CH1 Switch", AFE_CONN0_1,
256 SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH2 Switch", AFE_CONN1,
258 SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2 Switch", AFE_CONN1,
260 SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH2 Switch", AFE_CONN1,
262 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH2 Switch", AFE_CONN1,
264 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH4 Switch", AFE_CONN1,
266 SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH2 Switch", AFE_CONN1_1,
268 SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH2 Switch", AFE_CONN1_1,
270 SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH2 Switch", AFE_CONN1_1,
272 SOC_DAPM_SINGLE_AUTODISABLE("DL8_CH2 Switch", AFE_CONN1_1,
274 SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH2 Switch", AFE_CONN1,
276 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1 Switch", AFE_CONN1,
278 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2 Switch", AFE_CONN1,
280 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH3 Switch", AFE_CONN1,
282 SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH2 Switch", AFE_CONN1,
284 SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH2 Switch", AFE_CONN1,
286 SOC_DAPM_SINGLE_AUTODISABLE("SRC_1_OUT_CH2 Switch", AFE_CONN1_1,
291 SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1 Switch", AFE_CONN28,
293 SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1 Switch", AFE_CONN28,
295 SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1 Switch", AFE_CONN28,
297 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH1 Switch", AFE_CONN28,
299 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH3 Switch", AFE_CONN28,
301 SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH1 Switch", AFE_CONN28_1,
303 SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH1 Switch", AFE_CONN28_1,
305 SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH1 Switch", AFE_CONN28_1,
307 SOC_DAPM_SINGLE_AUTODISABLE("DL8_CH1 Switch", AFE_CONN28_1,
309 SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH1 Switch", AFE_CONN28,
311 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1 Switch", AFE_CONN28,
313 SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1 Switch", AFE_CONN28,
315 SOC_DAPM_SINGLE_AUTODISABLE("SRC_1_OUT_CH1 Switch", AFE_CONN28_1,
320 SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH2 Switch", AFE_CONN29,
322 SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2 Switch", AFE_CONN29,
324 SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH2 Switch", AFE_CONN29,
326 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH2 Switch", AFE_CONN29,
328 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH4 Switch", AFE_CONN29,
330 SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH2 Switch", AFE_CONN29_1,
332 SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH2 Switch", AFE_CONN29_1,
334 SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH2 Switch", AFE_CONN29_1,
336 SOC_DAPM_SINGLE_AUTODISABLE("DL8_CH2 Switch", AFE_CONN29_1,
338 SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH2 Switch", AFE_CONN29,
340 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2 Switch", AFE_CONN29,
342 SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH2 Switch", AFE_CONN29,
344 SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH2 Switch", AFE_CONN29,
346 SOC_DAPM_SINGLE_AUTODISABLE("SRC_1_OUT_CH2 Switch", AFE_CONN29_1,
370 switch (event) { in mtk_i2s_en_event()
394 switch (event) { in mtk_apll_event()
427 switch (event) { in mtk_mclk_en_event()
657 {"I2S1_CH1", "DL1_CH1 Switch", "DL1"},
658 {"I2S1_CH2", "DL1_CH2 Switch", "DL1"},
660 {"I2S1_CH1", "DL1_CH1 Switch", "DSP_DL1_VIRT"},
661 {"I2S1_CH2", "DL1_CH2 Switch", "DSP_DL1_VIRT"},
663 {"I2S1_CH1", "DL2_CH1 Switch", "DL2"},
664 {"I2S1_CH2", "DL2_CH2 Switch", "DL2"},
666 {"I2S1_CH1", "DL2_CH1 Switch", "DSP_DL2_VIRT"},
667 {"I2S1_CH2", "DL2_CH2 Switch", "DSP_DL2_VIRT"},
669 {"I2S1_CH1", "DL3_CH1 Switch", "DL3"},
670 {"I2S1_CH2", "DL3_CH2 Switch", "DL3"},
672 {"I2S1_CH1", "DL12_CH1 Switch", "DL12"},
673 {"I2S1_CH2", "DL12_CH2 Switch", "DL12"},
675 {"I2S1_CH1", "DL12_CH3 Switch", "DL12"},
676 {"I2S1_CH2", "DL12_CH4 Switch", "DL12"},
678 {"I2S1_CH1", "DL6_CH1 Switch", "DL6"},
679 {"I2S1_CH2", "DL6_CH2 Switch", "DL6"},
681 {"I2S1_CH1", "DL4_CH1 Switch", "DL4"},
682 {"I2S1_CH2", "DL4_CH2 Switch", "DL4"},
684 {"I2S1_CH1", "DL5_CH1 Switch", "DL5"},
685 {"I2S1_CH2", "DL5_CH2 Switch", "DL5"},
687 {"I2S1_CH1", "DL8_CH1 Switch", "DL8"},
688 {"I2S1_CH2", "DL8_CH2 Switch", "DL8"},
733 {"I2S3_CH1", "DL1_CH1 Switch", "DL1"},
734 {"I2S3_CH2", "DL1_CH2 Switch", "DL1"},
736 {"I2S3_CH1", "DL1_CH1 Switch", "DSP_DL1_VIRT"},
737 {"I2S3_CH2", "DL1_CH2 Switch", "DSP_DL1_VIRT"},
739 {"I2S3_CH1", "DL2_CH1 Switch", "DL2"},
740 {"I2S3_CH2", "DL2_CH2 Switch", "DL2"},
742 {"I2S3_CH1", "DL2_CH1 Switch", "DSP_DL2_VIRT"},
743 {"I2S3_CH2", "DL2_CH2 Switch", "DSP_DL2_VIRT"},
745 {"I2S3_CH1", "DL3_CH1 Switch", "DL3"},
746 {"I2S3_CH2", "DL3_CH2 Switch", "DL3"},
748 {"I2S3_CH1", "DL12_CH1 Switch", "DL12"},
749 {"I2S3_CH2", "DL12_CH2 Switch", "DL12"},
751 {"I2S3_CH1", "DL12_CH3 Switch", "DL12"},
752 {"I2S3_CH2", "DL12_CH4 Switch", "DL12"},
754 {"I2S3_CH1", "DL6_CH1 Switch", "DL6"},
755 {"I2S3_CH2", "DL6_CH2 Switch", "DL6"},
757 {"I2S3_CH1", "DL4_CH1 Switch", "DL4"},
758 {"I2S3_CH2", "DL4_CH2 Switch", "DL4"},
760 {"I2S3_CH1", "DL5_CH1 Switch", "DL5"},
761 {"I2S3_CH2", "DL5_CH2 Switch", "DL5"},
763 {"I2S3_CH1", "DL8_CH1 Switch", "DL8"},
764 {"I2S3_CH2", "DL8_CH2 Switch", "DL8"},
868 switch (cmd) { in mtk_dai_connsys_i2s_trigger()
943 switch (i2s_id) { in mtk_dai_i2s_config()