Lines Matching full:switch
60 SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1 Switch", AFE_CONN3, I_DL1_CH1, 1, 0),
61 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH1 Switch", AFE_CONN3, I_DL12_CH1, 1, 0),
62 SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1 Switch", AFE_CONN3, I_DL2_CH1, 1, 0),
63 SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1 Switch", AFE_CONN3, I_DL3_CH1, 1, 0),
64 SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH1 Switch", AFE_CONN3_1, I_DL4_CH1, 1, 0),
65 SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH1 Switch", AFE_CONN3_1, I_DL5_CH1, 1, 0),
66 SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH1 Switch", AFE_CONN3_1, I_DL6_CH1, 1, 0),
67 SOC_DAPM_SINGLE_AUTODISABLE("DL8_CH1 Switch", AFE_CONN3_1, I_DL8_CH1, 1, 0),
68 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2 Switch", AFE_CONN3,
70 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1 Switch", AFE_CONN3,
72 SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH1 Switch", AFE_CONN3,
74 SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1 Switch", AFE_CONN3,
76 SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH1 Switch", AFE_CONN3,
78 SOC_DAPM_SINGLE_AUTODISABLE("SRC_1_OUT_CH1 Switch", AFE_CONN3_1,
80 SOC_DAPM_SINGLE_AUTODISABLE("SRC_2_OUT_CH1 Switch", AFE_CONN3_1,
85 SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1 Switch", AFE_CONN4, I_DL1_CH1, 1, 0),
86 SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH2 Switch", AFE_CONN4, I_DL1_CH2, 1, 0),
87 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH2 Switch", AFE_CONN4, I_DL12_CH2, 1, 0),
88 SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1 Switch", AFE_CONN4, I_DL2_CH1, 1, 0),
89 SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2 Switch", AFE_CONN4, I_DL2_CH2, 1, 0),
90 SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1 Switch", AFE_CONN4, I_DL3_CH1, 1, 0),
91 SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH2 Switch", AFE_CONN4, I_DL3_CH2, 1, 0),
92 SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH2 Switch", AFE_CONN4_1, I_DL4_CH2, 1, 0),
93 SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH2 Switch", AFE_CONN4_1, I_DL5_CH2, 1, 0),
94 SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH2 Switch", AFE_CONN4_1, I_DL6_CH2, 1, 0),
95 SOC_DAPM_SINGLE_AUTODISABLE("DL8_CH2 Switch", AFE_CONN4_1, I_DL8_CH2, 1, 0),
96 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2 Switch", AFE_CONN4,
98 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1 Switch", AFE_CONN4,
100 SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH2 Switch", AFE_CONN4,
102 SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH2 Switch", AFE_CONN4,
104 SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH2 Switch", AFE_CONN4,
106 SOC_DAPM_SINGLE_AUTODISABLE("SRC_1_OUT_CH2 Switch", AFE_CONN4_1,
108 SOC_DAPM_SINGLE_AUTODISABLE("SRC_2_OUT_CH2 Switch", AFE_CONN4_1,
126 switch (id) { in mtk_adda_ul_src_dmic()
167 switch (event) { in mtk_adda_ul_event()
204 switch (event) { in mtk_adda_pad_top_event()
228 switch (event) { in mtk_adda_mtkaif_cfg_event()
308 switch (event) { in mtk_adda_dl_event()
360 SOC_SINGLE_BOOL_EXT("MTKAIF_DMIC Switch", 0,
489 {"ADDA_DL_CH1", "DL1_CH1 Switch", "DL1"},
490 {"ADDA_DL_CH2", "DL1_CH1 Switch", "DL1"},
491 {"ADDA_DL_CH2", "DL1_CH2 Switch", "DL1"},
493 {"ADDA_DL_CH1", "DL12_CH1 Switch", "DL12"},
494 {"ADDA_DL_CH2", "DL12_CH2 Switch", "DL12"},
496 {"ADDA_DL_CH1", "DL6_CH1 Switch", "DL6"},
497 {"ADDA_DL_CH2", "DL6_CH2 Switch", "DL6"},
499 {"ADDA_DL_CH1", "DL8_CH1 Switch", "DL8"},
500 {"ADDA_DL_CH2", "DL8_CH2 Switch", "DL8"},
502 {"ADDA_DL_CH1", "DL2_CH1 Switch", "DL2"},
503 {"ADDA_DL_CH2", "DL2_CH1 Switch", "DL2"},
504 {"ADDA_DL_CH2", "DL2_CH2 Switch", "DL2"},
506 {"ADDA_DL_CH1", "DL3_CH1 Switch", "DL3"},
507 {"ADDA_DL_CH2", "DL3_CH1 Switch", "DL3"},
508 {"ADDA_DL_CH2", "DL3_CH2 Switch", "DL3"},
510 {"ADDA_DL_CH1", "DL4_CH1 Switch", "DL4"},
511 {"ADDA_DL_CH2", "DL4_CH2 Switch", "DL4"},
513 {"ADDA_DL_CH1", "DL5_CH1 Switch", "DL5"},
514 {"ADDA_DL_CH2", "DL5_CH2 Switch", "DL5"},
648 switch (id) { in mtk_dai_adda_hw_params()
677 switch (id) { in mtk_dai_adda_hw_params()