Lines Matching +full:mt8186 +full:- +full:sound
1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/dma-mapping.h>
15 #include <sound/soc.h>
17 #include "../common/mtk-afe-platform-driver.h"
18 #include "../common/mtk-afe-fe-dai.h"
20 #include "mt8186-afe-common.h"
21 #include "mt8186-afe-clk.h"
22 #include "mt8186-afe-gpio.h"
23 #include "mt8186-interconnection.h"
45 struct snd_pcm_runtime *runtime = substream->runtime;
46 int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
47 struct mtk_base_afe_memif *memif = &afe->memif[id];
48 const struct snd_pcm_hardware *mtk_afe_hardware = afe->mtk_afe_hardware;
51 memif->substream = substream;
53 snd_pcm_hw_constraint_step(substream->runtime, 0,
61 dev_err(afe->dev, "snd_pcm_hw_constraint_integer failed\n");
66 if (memif->irq_usage < 0) {
69 if (irq_id != afe->irqs_size) {
71 memif->irq_usage = irq_id;
73 dev_err(afe->dev, "%s() error: no more asys irq\n",
75 return -EBUSY;
87 struct mt8186_afe_private *afe_priv = afe->platform_priv;
88 int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
89 struct mtk_base_afe_memif *memif = &afe->memif[id];
90 int irq_id = memif->irq_usage;
92 memif->substream = NULL;
93 afe_priv->irq_cnt[id] = 0;
94 afe_priv->xrun_assert[id] = 0;
96 if (!memif->const_irq) {
98 memif->irq_usage = -1;
99 memif->substream = NULL;
109 int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
123 int fs_mode = mt8186_rate_transform(afe->dev, rate, id);
127 (channels - 1) << CHANNEL_MERGE0_CHNUM_SFT |
132 regmap_update_bits(afe->regmap, AFE_CM1_CON, mask, val);
146 dev_err(afe->dev, "%s failed\n", __func__);
157 struct snd_pcm_runtime * const runtime = substream->runtime;
159 struct mt8186_afe_private *afe_priv = afe->platform_priv;
160 int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
161 struct mtk_base_afe_memif *memif = &afe->memif[id];
162 int irq_id = memif->irq_usage;
163 struct mtk_base_afe_irq *irqs = &afe->irqs[irq_id];
164 const struct mtk_base_irq_data *irq_data = irqs->irq_data;
165 unsigned int rate = runtime->rate;
170 dev_dbg(afe->dev, "%s(), %s cmd %d, irq_id %d\n",
171 __func__, memif->data->name, cmd, irq_id);
178 dev_err(afe->dev, "%s(), error, id %d, memif enable, ret %d\n",
187 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE &&
188 ((runtime->period_size * 1000) / rate <= 10))
192 if (afe_priv->irq_cnt[id] > 0)
193 counter = afe_priv->irq_cnt[id];
195 counter = runtime->period_size;
197 regmap_update_bits(afe->regmap, irq_data->irq_cnt_reg,
198 irq_data->irq_cnt_maskbit
199 << irq_data->irq_cnt_shift,
200 counter << irq_data->irq_cnt_shift);
203 fs = afe->irq_fs(substream, runtime->rate);
205 return -EINVAL;
207 regmap_update_bits(afe->regmap, irq_data->irq_fs_reg,
208 irq_data->irq_fs_maskbit
209 << irq_data->irq_fs_shift,
210 fs << irq_data->irq_fs_shift);
213 if (runtime->stop_threshold != ~(0U))
214 regmap_update_bits(afe->regmap,
215 irq_data->irq_en_reg,
216 1 << irq_data->irq_en_shift,
217 1 << irq_data->irq_en_shift);
221 if (afe_priv->xrun_assert[id] > 0) {
222 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
225 if (avail >= runtime->buffer_size)
226 dev_dbg(afe->dev, "%s(), id %d, xrun assert\n",
233 dev_err(afe->dev, "%s(), error, id %d, memif enable, ret %d\n",
237 if (runtime->stop_threshold != ~(0U))
238 regmap_update_bits(afe->regmap,
239 irq_data->irq_en_reg,
240 1 << irq_data->irq_en_shift,
241 0 << irq_data->irq_en_shift);
244 regmap_write(afe->regmap, irq_data->irq_clr_reg,
245 1 << irq_data->irq_clr_shift);
248 return -EINVAL;
259 int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
261 return mt8186_rate_transform(afe->dev, rate, id);
267 return mt8186_rate_transform(afe->dev, rate, dai_id);
277 return mt8186_general_rate_transform(afe->dev, rate);
282 struct snd_pcm_runtime *runtime = substream->runtime;
284 if ((runtime->period_size * 1000) / runtime->rate > 10)
294 struct snd_pcm_runtime * const runtime = substream->runtime;
296 int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
297 struct mtk_base_afe_memif *memif = &afe->memif[id];
298 int irq_id = memif->irq_usage;
299 struct mtk_base_afe_irq *irqs = &afe->irqs[irq_id];
300 const struct mtk_base_irq_data *irq_data = irqs->irq_data;
301 unsigned int counter = runtime->period_size;
310 regmap_update_bits(afe->regmap, irq_data->irq_cnt_reg,
311 irq_data->irq_cnt_maskbit
312 << irq_data->irq_cnt_shift,
313 counter << irq_data->irq_cnt_shift);
316 fs = afe->irq_fs(substream, runtime->rate);
319 return -EINVAL;
321 regmap_update_bits(afe->regmap, irq_data->irq_fs_reg,
322 irq_data->irq_fs_maskbit
323 << irq_data->irq_fs_shift,
324 fs << irq_data->irq_fs_shift);
568 struct mt8186_afe_private *afe_priv = afe->platform_priv;
570 ucontrol->value.integer.value[0] =
571 afe_priv->irq_cnt[MT8186_PRIMARY_MEMIF];
581 struct mt8186_afe_private *afe_priv = afe->platform_priv;
583 struct mtk_base_afe_memif *memif = &afe->memif[memif_num];
584 int irq_id = memif->irq_usage;
585 int irq_cnt = afe_priv->irq_cnt[memif_num];
587 dev_dbg(afe->dev, "%s(), irq_id %d, irq_cnt = %d, value = %ld\n",
588 __func__, irq_id, irq_cnt, ucontrol->value.integer.value[0]);
590 if (irq_cnt == ucontrol->value.integer.value[0])
593 irq_cnt = ucontrol->value.integer.value[0];
594 afe_priv->irq_cnt[memif_num] = irq_cnt;
596 if (!pm_runtime_status_suspended(afe->dev) && irq_id >= 0) {
597 struct mtk_base_afe_irq *irqs = &afe->irqs[irq_id];
598 const struct mtk_base_irq_data *irq_data = irqs->irq_data;
600 regmap_update_bits(afe->regmap, irq_data->irq_cnt_reg,
601 irq_data->irq_cnt_maskbit
602 << irq_data->irq_cnt_shift,
603 irq_cnt << irq_data->irq_cnt_shift);
605 dev_dbg(afe->dev, "%s(), suspended || irq_id %d, not set\n",
617 struct mt8186_afe_private *afe_priv = afe->platform_priv;
619 ucontrol->value.integer.value[0] =
620 afe_priv->irq_cnt[MT8186_RECORD_MEMIF];
630 struct mt8186_afe_private *afe_priv = afe->platform_priv;
632 struct mtk_base_afe_memif *memif = &afe->memif[memif_num];
633 int irq_id = memif->irq_usage;
634 int irq_cnt = afe_priv->irq_cnt[memif_num];
636 dev_dbg(afe->dev, "%s(), irq_id %d, irq_cnt = %d, value = %ld\n",
637 __func__, irq_id, irq_cnt, ucontrol->value.integer.value[0]);
639 if (irq_cnt == ucontrol->value.integer.value[0])
642 irq_cnt = ucontrol->value.integer.value[0];
643 afe_priv->irq_cnt[memif_num] = irq_cnt;
645 if (!pm_runtime_status_suspended(afe->dev) && irq_id >= 0) {
646 struct mtk_base_afe_irq *irqs = &afe->irqs[irq_id];
647 const struct mtk_base_irq_data *irq_data = irqs->irq_data;
649 regmap_update_bits(afe->regmap, irq_data->irq_cnt_reg,
650 irq_data->irq_cnt_maskbit
651 << irq_data->irq_cnt_shift,
652 irq_cnt << irq_data->irq_cnt_shift);
654 dev_dbg(afe->dev, "%s(), suspended || irq_id %d, not set\n",
666 struct mt8186_afe_private *afe_priv = afe->platform_priv;
667 int xrun_assert = afe_priv->xrun_assert[MT8186_RECORD_MEMIF];
669 ucontrol->value.integer.value[0] = xrun_assert;
679 struct mt8186_afe_private *afe_priv = afe->platform_priv;
680 int xrun_assert = ucontrol->value.integer.value[0];
682 dev_dbg(afe->dev, "%s(), xrun_assert %d\n", __func__, xrun_assert);
684 if (xrun_assert == afe_priv->xrun_assert[MT8186_RECORD_MEMIF])
687 afe_priv->xrun_assert[MT8186_RECORD_MEMIF] = xrun_assert;
1280 /* inter-connections */
1547 .agent_disable_reg = -1,
1548 .agent_disable_shift = -1,
1549 .msb_reg = -1,
1550 .msb_shift = -1,
1581 .agent_disable_reg = -1,
1582 .agent_disable_shift = -1,
1583 .msb_reg = -1,
1584 .msb_shift = -1,
1612 .agent_disable_reg = -1,
1613 .agent_disable_shift = -1,
1614 .msb_reg = -1,
1615 .msb_shift = -1,
1643 .agent_disable_reg = -1,
1644 .agent_disable_shift = -1,
1645 .msb_reg = -1,
1646 .msb_shift = -1,
1674 .agent_disable_reg = -1,
1675 .agent_disable_shift = -1,
1676 .msb_reg = -1,
1677 .msb_shift = -1,
1705 .agent_disable_reg = -1,
1706 .agent_disable_shift = -1,
1707 .msb_reg = -1,
1708 .msb_shift = -1,
1736 .agent_disable_reg = -1,
1737 .agent_disable_shift = -1,
1738 .msb_reg = -1,
1739 .msb_shift = -1,
1767 .agent_disable_reg = -1,
1768 .agent_disable_shift = -1,
1769 .msb_reg = -1,
1770 .msb_shift = -1,
1798 .agent_disable_reg = -1,
1799 .agent_disable_shift = -1,
1800 .msb_reg = -1,
1801 .msb_shift = -1,
1832 .agent_disable_reg = -1,
1833 .agent_disable_shift = -1,
1834 .msb_reg = -1,
1835 .msb_shift = -1,
1857 .agent_disable_reg = -1,
1858 .agent_disable_shift = -1,
1859 .msb_reg = -1,
1860 .msb_shift = -1,
1882 .agent_disable_reg = -1,
1883 .agent_disable_shift = -1,
1884 .msb_reg = -1,
1885 .msb_shift = -1,
1907 .agent_disable_reg = -1,
1908 .agent_disable_shift = -1,
1909 .msb_reg = -1,
1910 .msb_shift = -1,
1932 .agent_disable_reg = -1,
1933 .agent_disable_shift = -1,
1934 .msb_reg = -1,
1935 .msb_shift = -1,
1957 .agent_disable_reg = -1,
1958 .agent_disable_shift = -1,
1959 .msb_reg = -1,
1960 .msb_shift = -1,
1982 .agent_disable_reg = -1,
1983 .agent_disable_shift = -1,
1984 .msb_reg = -1,
1985 .msb_shift = -1,
2007 .agent_disable_reg = -1,
2008 .agent_disable_shift = -1,
2009 .msb_reg = -1,
2010 .msb_shift = -1,
2391 /* these auto-gen reg has read-only bit, so put it as volatile */
2643 ret = regmap_read(afe->regmap, AFE_IRQ_MCU_EN, &mcu_en);
2645 dev_err(afe->dev, "%s, get irq direction fail, ret %d", __func__, ret);
2649 ret = regmap_read(afe->regmap, AFE_IRQ_MCU_STATUS, &status);
2654 dev_err(afe->dev, "%s(), irq status err, ret %d, status 0x%x, mcu_en 0x%x\n",
2661 struct mtk_base_afe_memif *memif = &afe->memif[i];
2663 if (!memif->substream)
2666 if (memif->irq_usage < 0)
2669 irq = &afe->irqs[memif->irq_usage];
2671 if (status_mcu & (1 << irq->irq_data->irq_en_shift))
2672 snd_pcm_period_elapsed(memif->substream);
2677 regmap_write(afe->regmap, AFE_IRQ_MCU_CLR, status_mcu);
2685 struct mt8186_afe_private *afe_priv = afe->platform_priv;
2689 if (!afe->regmap || afe_priv->pm_runtime_bypass_reg_ctl)
2693 regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0x0);
2695 ret = regmap_read_poll_timeout(afe->regmap,
2702 dev_err(afe->dev, "%s(), ret %d\n", __func__, ret);
2707 regmap_write(afe->regmap, AFE_IRQ_MCU_CLR, 0xffffffff);
2708 regmap_write(afe->regmap, AFE_IRQ_MCU_CLR, 0xffffffff);
2711 regmap_write(afe->regmap, AFE_SINEGEN_CON0, 0x0);
2712 regmap_update_bits(afe->regmap, AFE_SINEGEN_CON2,
2717 regcache_cache_only(afe->regmap, true);
2718 regcache_mark_dirty(afe->regmap);
2730 struct mt8186_afe_private *afe_priv = afe->platform_priv;
2741 if (!afe->regmap || afe_priv->pm_runtime_bypass_reg_ctl)
2744 regcache_cache_only(afe->regmap, false);
2745 regcache_sync(afe->regmap);
2748 regmap_update_bits(afe_priv->infracfg, PERI_BUS_DCM_CTRL, BIT(29), BIT(29));
2749 regmap_update_bits(afe->regmap, AUDIO_TOP_CON0, BIT(29), BIT(29));
2752 regmap_update_bits(afe->regmap, AFE_MEMIF_CON0, CPU_HD_ALIGN_MASK_SFT, 0);
2755 regmap_write(afe->regmap, AFE_CONN_24BIT, 0xffffffff);
2756 regmap_write(afe->regmap, AFE_CONN_24BIT_1, 0xffffffff);
2759 regmap_update_bits(afe->regmap, AFE_DAC_CON0, AUDIO_AFE_ON_MASK_SFT, BIT(0));
2784 dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
2786 return -ENOMEM;
2788 list_add(&dai->list, &afe->sub_dais);
2790 dai->dai_drivers = mt8186_memif_dai_driver;
2791 dai->num_dai_drivers = ARRAY_SIZE(mt8186_memif_dai_driver);
2793 dai->controls = mt8186_pcm_kcontrols;
2794 dai->num_controls = ARRAY_SIZE(mt8186_pcm_kcontrols);
2795 dai->dapm_widgets = mt8186_memif_widgets;
2796 dai->num_dapm_widgets = ARRAY_SIZE(mt8186_memif_widgets);
2797 dai->dapm_routes = mt8186_memif_routes;
2798 dai->num_dapm_routes = ARRAY_SIZE(mt8186_memif_routes);
2819 struct device *dev = &pdev->dev;
2828 return -ENOMEM;
2831 afe->platform_priv = devm_kzalloc(dev, sizeof(*afe_priv), GFP_KERNEL);
2832 if (!afe->platform_priv)
2833 return -ENOMEM;
2835 afe_priv = afe->platform_priv;
2836 afe->dev = &pdev->dev;
2838 afe->base_addr = devm_platform_ioremap_resource(pdev, 0);
2839 if (IS_ERR(afe->base_addr))
2840 return PTR_ERR(afe->base_addr);
2850 afe->memif_32bit_supported = 0;
2851 afe->memif_size = MT8186_MEMIF_NUM;
2852 afe->memif = devm_kcalloc(dev, afe->memif_size, sizeof(*afe->memif), GFP_KERNEL);
2853 if (!afe->memif)
2854 return -ENOMEM;
2856 for (i = 0; i < afe->memif_size; i++) {
2857 afe->memif[i].data = &memif_data[i];
2858 afe->memif[i].irq_usage = memif_irq_usage[i];
2859 afe->memif[i].const_irq = 1;
2862 mutex_init(&afe->irq_alloc_lock); /* needed when dynamic irq */
2865 afe->irqs_size = MT8186_IRQ_NUM;
2866 afe->irqs = devm_kcalloc(dev, afe->irqs_size, sizeof(*afe->irqs),
2869 if (!afe->irqs)
2870 return -ENOMEM;
2872 for (i = 0; i < afe->irqs_size; i++)
2873 afe->irqs[i].irq_data = &irq_data[i];
2878 return dev_err_probe(dev, irq_id < 0 ? irq_id : -ENXIO,
2892 INIT_LIST_HEAD(&afe->sub_dais);
2915 afe_priv->pm_runtime_bypass_reg_ctl = true;
2925 afe->regmap = devm_regmap_init_mmio(dev, afe->base_addr,
2927 if (IS_ERR(afe->regmap)) {
2928 ret = PTR_ERR(afe->regmap);
2933 afe->mtk_afe_hardware = &mt8186_afe_hardware;
2934 afe->memif_fs = mt8186_memif_fs;
2935 afe->irq_fs = mt8186_irq_fs;
2936 afe->get_dai_fs = mt8186_get_dai_fs;
2937 afe->get_memif_pbuf_size = mt8186_get_memif_pbuf_size;
2939 afe->runtime_resume = mt8186_afe_runtime_resume;
2940 afe->runtime_suspend = mt8186_afe_runtime_suspend;
2947 afe->dai_drivers,
2948 afe->num_dai_drivers);
2960 afe_priv->pm_runtime_bypass_reg_ctl = false;
2962 regcache_cache_only(afe->regmap, true);
2963 regcache_mark_dirty(afe->regmap);
2975 { .compatible = "mediatek,mt8186-sound", },
2987 .name = "mt8186-audio",