88 	return 0;  in mt8186_set_audio_int_bus_parent()
149 	return 0;  in apll1_mux_setting()
210 	return 0;  in apll2_mux_setting()
216 	int ret = 0;  in mt8186_afe_enable_cgs()
228 	return 0;  in mt8186_afe_enable_cgs()
243 	int ret = 0;  in mt8186_afe_enable_clock()
301 	return 0;  in mt8186_afe_enable_clock()
350 	return 0;  in mt8186_afe_suspend_clock()
378 	return 0;  in mt8186_afe_resume_clock()
409 	regmap_update_bits(afe->regmap, AFE_APLL1_TUNER_CFG, 0xfff7, 0x832);  in mt8186_apll1_enable()
410 	regmap_update_bits(afe->regmap, AFE_APLL1_TUNER_CFG, 0x1, 0x1);  in mt8186_apll1_enable()
415 	return 0;  in mt8186_apll1_enable()
430 			   AFE_22M_ON_MASK_SFT, 0);  in mt8186_apll1_disable()
432 	regmap_update_bits(afe->regmap, AFE_APLL1_TUNER_CFG, 0x1, 0);  in mt8186_apll1_disable()
462 	regmap_update_bits(afe->regmap, AFE_APLL2_TUNER_CFG, 0xfff7, 0x634);  in mt8186_apll2_enable()
463 	regmap_update_bits(afe->regmap, AFE_APLL2_TUNER_CFG, 0x1, 0x1);  in mt8186_apll2_enable()
468 	return 0;  in mt8186_apll2_enable()
483 			   AFE_24M_ON_MASK_SFT, 0);  in mt8186_apll2_disable()
485 	regmap_update_bits(afe->regmap, AFE_APLL2_TUNER_CFG, 0x1, 0);  in mt8186_apll2_disable()
500 	return ((rate % 8000) == 0) ? MT8186_APLL2 : MT8186_APLL1;  in mt8186_get_apll_by_rate()
505 	if (strcmp(name, APLL1_W_NAME) == 0)  in mt8186_get_apll_by_name()
551 	if (m_sel_id >= 0) {  in mt8186_mck_enable()
582 	return 0;  in mt8186_mck_enable()
592 	if (m_sel_id >= 0)  in mt8186_mck_disable()
600 	int i = 0;  in mt8186_init_clock()
609 	for (i = 0; i < CLK_NUM; i++) {  in mt8186_init_clock()
643 	return 0;  in mt8186_init_clock()