Lines Matching defs:afe
3 // mt8186-afe-clk.c -- Mediatek 8186 afe clock ctrl
12 #include "mt8186-afe-common.h"
13 #include "mt8186-afe-clk.h"
73 int mt8186_set_audio_int_bus_parent(struct mtk_base_afe *afe,
76 struct mt8186_afe_private *afe_priv = afe->platform_priv;
82 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
91 static int apll1_mux_setting(struct mtk_base_afe *afe, bool enable)
93 struct mt8186_afe_private *afe_priv = afe->platform_priv;
99 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
106 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
115 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
122 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
131 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
141 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
152 static int apll2_mux_setting(struct mtk_base_afe *afe, bool enable)
154 struct mt8186_afe_private *afe_priv = afe->platform_priv;
160 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
167 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
176 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
183 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
192 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
202 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
213 int mt8186_afe_enable_cgs(struct mtk_base_afe *afe)
215 struct mt8186_afe_private *afe_priv = afe->platform_priv;
222 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
231 void mt8186_afe_disable_cgs(struct mtk_base_afe *afe)
233 struct mt8186_afe_private *afe_priv = afe->platform_priv;
240 int mt8186_afe_enable_clock(struct mtk_base_afe *afe)
242 struct mt8186_afe_private *afe_priv = afe->platform_priv;
247 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
254 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
261 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
268 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
276 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
280 ret = mt8186_set_audio_int_bus_parent(afe,
288 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
296 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
307 mt8186_set_audio_int_bus_parent(afe, CLK_CLK26M);
320 void mt8186_afe_disable_clock(struct mtk_base_afe *afe)
322 struct mt8186_afe_private *afe_priv = afe->platform_priv;
325 mt8186_set_audio_int_bus_parent(afe, CLK_CLK26M);
332 int mt8186_apll1_enable(struct mtk_base_afe *afe)
334 struct mt8186_afe_private *afe_priv = afe->platform_priv;
338 apll1_mux_setting(afe, true);
342 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
349 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
354 regmap_update_bits(afe->regmap, AFE_APLL1_TUNER_CFG, 0xfff7, 0x832);
355 regmap_update_bits(afe->regmap, AFE_APLL1_TUNER_CFG, 0x1, 0x1);
357 regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE,
370 void mt8186_apll1_disable(struct mtk_base_afe *afe)
372 struct mt8186_afe_private *afe_priv = afe->platform_priv;
374 regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE,
377 regmap_update_bits(afe->regmap, AFE_APLL1_TUNER_CFG, 0x1, 0);
382 apll1_mux_setting(afe, false);
385 int mt8186_apll2_enable(struct mtk_base_afe *afe)
387 struct mt8186_afe_private *afe_priv = afe->platform_priv;
391 apll2_mux_setting(afe, true);
395 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
402 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
407 regmap_update_bits(afe->regmap, AFE_APLL2_TUNER_CFG, 0xfff7, 0x634);
408 regmap_update_bits(afe->regmap, AFE_APLL2_TUNER_CFG, 0x1, 0x1);
410 regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE,
423 void mt8186_apll2_disable(struct mtk_base_afe *afe)
425 struct mt8186_afe_private *afe_priv = afe->platform_priv;
427 regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE,
430 regmap_update_bits(afe->regmap, AFE_APLL2_TUNER_CFG, 0x1, 0);
435 apll2_mux_setting(afe, false);
438 int mt8186_get_apll_rate(struct mtk_base_afe *afe, int apll)
443 int mt8186_get_apll_by_rate(struct mtk_base_afe *afe, int rate)
448 int mt8186_get_apll_by_name(struct mtk_base_afe *afe, const char *name)
485 int mt8186_mck_enable(struct mtk_base_afe *afe, int mck_id, int rate)
487 struct mt8186_afe_private *afe_priv = afe->platform_priv;
488 int apll = mt8186_get_apll_by_rate(afe, rate);
499 dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
506 dev_err(afe->dev, "%s(), clk_set_parent %s-%s fail %d\n",
516 dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
522 dev_err(afe->dev, "%s(), clk_set_rate %s, rate %d, fail %d\n",
530 void mt8186_mck_disable(struct mtk_base_afe *afe, int mck_id)
532 struct mt8186_afe_private *afe_priv = afe->platform_priv;
541 int mt8186_init_clock(struct mtk_base_afe *afe)
543 struct mt8186_afe_private *afe_priv = afe->platform_priv;
544 struct device_node *of_node = afe->dev->of_node;
547 mt8186_audsys_clk_register(afe);
549 afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk),
555 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);
557 dev_err(afe->dev, "%s devm_clk_get %s fail, ret %ld\n",
567 dev_err(afe->dev, "%s() Cannot find apmixedsys controller: %ld\n",
575 dev_err(afe->dev, "%s() Cannot find topckgen controller: %ld\n",
583 dev_err(afe->dev, "%s() Cannot find infracfg: %ld\n",