170 	bool tx = true;  in fsl_sai_set_dai_tdm_slot_tx()  local
172 	sai->slots[tx] = slots;  in fsl_sai_set_dai_tdm_slot_tx()
173 	sai->slot_width[tx] = slot_width;  in fsl_sai_set_dai_tdm_slot_tx()
182 	bool tx = false;  in fsl_sai_set_dai_tdm_slot_rx()  local
184 	sai->slots[tx] = slots;  in fsl_sai_set_dai_tdm_slot_rx()
185 	sai->slot_width[tx] = slot_width;  in fsl_sai_set_dai_tdm_slot_rx()
220 		int clk_id, unsigned int freq, bool tx)  in fsl_sai_set_dai_sysclk_tr()  argument
243 	regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx, ofs),  in fsl_sai_set_dai_sysclk_tr()
305 				unsigned int fmt, bool tx)  in fsl_sai_set_dai_fmt_tr()  argument
315 	sai->is_dsp_mode[tx] = false;  in fsl_sai_set_dai_fmt_tr()
344 		sai->is_dsp_mode[tx] = true;  in fsl_sai_set_dai_fmt_tr()
352 		sai->is_dsp_mode[tx] = true;  in fsl_sai_set_dai_fmt_tr()
392 		sai->is_consumer_mode[tx] = false;  in fsl_sai_set_dai_fmt_tr()
395 		sai->is_consumer_mode[tx] = true;  in fsl_sai_set_dai_fmt_tr()
399 		sai->is_consumer_mode[tx] = false;  in fsl_sai_set_dai_fmt_tr()
403 		sai->is_consumer_mode[tx] = true;  in fsl_sai_set_dai_fmt_tr()
409 	regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx, ofs),  in fsl_sai_set_dai_fmt_tr()
411 	regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),  in fsl_sai_set_dai_fmt_tr()
445 static int fsl_sai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq)  in fsl_sai_set_bclk()  argument
451 	int adir = tx ? RX : TX;  in fsl_sai_set_bclk()
452 	int dir = tx ? TX : RX;  in fsl_sai_set_bclk()
457 	if (sai->is_consumer_mode[tx])  in fsl_sai_set_bclk()
498 			sai->mclk_id[tx] = id;  in fsl_sai_set_bclk()
508 				tx ? 'T' : 'R', freq);  in fsl_sai_set_bclk()
513 			sai->mclk_id[tx], savediv, bestdiff);  in fsl_sai_set_bclk()
526 		reg = FSL_SAI_xCR2(!tx, ofs);  in fsl_sai_set_bclk()
528 		reg = FSL_SAI_xCR2(tx, ofs);  in fsl_sai_set_bclk()
533 			   FSL_SAI_CR2_MSEL(sai->mclk_id[tx]));  in fsl_sai_set_bclk()
540 			regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx, ofs),  in fsl_sai_set_bclk()
543 			regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx, ofs),  in fsl_sai_set_bclk()
560 	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;  in fsl_sai_hw_params()  local
571 	int adir = tx ? RX : TX;  in fsl_sai_hw_params()
576 	if (sai->slot_width[tx])  in fsl_sai_hw_params()
577 		slot_width = sai->slot_width[tx];  in fsl_sai_hw_params()
579 	if (sai->slots[tx])  in fsl_sai_hw_params()
580 		slots = sai->slots[tx];  in fsl_sai_hw_params()
596 		if (dl_cfg[i].type == dl_type && dl_cfg[i].pins[tx] == pins) {  in fsl_sai_hw_params()
602 	if (hweight8(dl_cfg[dl_cfg_idx].mask[tx]) < pins) {  in fsl_sai_hw_params()
620 	if (!sai->is_consumer_mode[tx]) {  in fsl_sai_hw_params()
621 		ret = fsl_sai_set_bclk(cpu_dai, tx, bclk);  in fsl_sai_hw_params()
627 			ret = clk_prepare_enable(sai->mclk_clk[sai->mclk_id[tx]]);  in fsl_sai_hw_params()
635 	if (!sai->is_dsp_mode[tx] && !sai->is_pdm_mode)  in fsl_sai_hw_params()
652 	if (tx)  in fsl_sai_hw_params()
661 	if (!sai->is_consumer_mode[tx] && fsl_sai_dir_is_synced(sai, adir)) {  in fsl_sai_hw_params()
662 		regmap_update_bits(sai->regmap, FSL_SAI_xCR4(!tx, ofs),  in fsl_sai_hw_params()
666 		regmap_update_bits(sai->regmap, FSL_SAI_xCR5(!tx, ofs),  in fsl_sai_hw_params()
679 	if (hweight8(dl_cfg[dl_cfg_idx].mask[tx]) <= 1 || sai->is_multi_fifo_dma)  in fsl_sai_hw_params()
680 		regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),  in fsl_sai_hw_params()
683 		regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),  in fsl_sai_hw_params()
686 	dma_params = tx ? &sai->dma_params_tx : &sai->dma_params_rx;  in fsl_sai_hw_params()
687 	dma_params->addr = sai->res->start + FSL_SAI_xDR0(tx) +  in fsl_sai_hw_params()
688 			   dl_cfg[dl_cfg_idx].start_off[tx] * 0x4;  in fsl_sai_hw_params()
691 		sai->audio_config[tx].words_per_fifo = min(slots, channels);  in fsl_sai_hw_params()
692 		if (tx) {  in fsl_sai_hw_params()
693 			sai->audio_config[tx].n_fifos_dst = pins;  in fsl_sai_hw_params()
694 			sai->audio_config[tx].stride_fifos_dst = dl_cfg[dl_cfg_idx].next_off[tx];  in fsl_sai_hw_params()
696 			sai->audio_config[tx].n_fifos_src = pins;  in fsl_sai_hw_params()
697 			sai->audio_config[tx].stride_fifos_src = dl_cfg[dl_cfg_idx].next_off[tx];  in fsl_sai_hw_params()
699 		dma_params->maxburst = sai->audio_config[tx].words_per_fifo * pins;  in fsl_sai_hw_params()
700 		dma_params->peripheral_config = &sai->audio_config[tx];  in fsl_sai_hw_params()
701 		dma_params->peripheral_size = sizeof(sai->audio_config[tx]);  in fsl_sai_hw_params()
703 		watermark = tx ? (sai->soc_data->fifo_depth - dma_params->maxburst) :  in fsl_sai_hw_params()
705 		regmap_update_bits(sai->regmap, FSL_SAI_xCR1(tx, ofs),  in fsl_sai_hw_params()
713 		if (hweight8(dl_cfg[dl_cfg_idx].mask[tx] & trce_mask) == pins)  in fsl_sai_hw_params()
717 	regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, ofs),  in fsl_sai_hw_params()
719 			   FSL_SAI_CR3_TRCE((dl_cfg[dl_cfg_idx].mask[tx] & trce_mask)));  in fsl_sai_hw_params()
731 	    !sai->is_consumer_mode[tx])  in fsl_sai_hw_params()
732 		regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),  in fsl_sai_hw_params()
735 	regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),  in fsl_sai_hw_params()
739 	regmap_update_bits(sai->regmap, FSL_SAI_xCR5(tx, ofs),  in fsl_sai_hw_params()
745 	    !sai->is_consumer_mode[tx])  in fsl_sai_hw_params()
746 		regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),  in fsl_sai_hw_params()
749 	regmap_write(sai->regmap, FSL_SAI_xMR(tx),  in fsl_sai_hw_params()
759 	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;  in fsl_sai_hw_free()  local
763 	regmap_write(sai->regmap, FSL_SAI_xMR(tx), 0);  in fsl_sai_hw_free()
765 	regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, ofs),  in fsl_sai_hw_free()
768 	if (!sai->is_consumer_mode[tx] &&  in fsl_sai_hw_free()
770 		clk_disable_unprepare(sai->mclk_clk[sai->mclk_id[tx]]);  in fsl_sai_hw_free()
780 	bool tx = dir == TX;  in fsl_sai_config_disable()  local
788 	regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),  in fsl_sai_config_disable()
794 		regmap_read(sai->regmap, FSL_SAI_xCSR(tx, ofs), &xcsr);  in fsl_sai_config_disable()
797 	regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),  in fsl_sai_config_disable()
812 	regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs), FSL_SAI_CSR_SR, FSL_SAI_CSR_SR);  in fsl_sai_config_disable()
814 	regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs), FSL_SAI_CSR_SR, 0);  in fsl_sai_config_disable()
823 	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;  in fsl_sai_trigger()  local
824 	int adir = tx ? RX : TX;  in fsl_sai_trigger()
825 	int dir = tx ? TX : RX;  in fsl_sai_trigger()
846 		regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),  in fsl_sai_trigger()
849 		regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),  in fsl_sai_trigger()
863 			regmap_update_bits(sai->regmap, FSL_SAI_xCSR((!tx), ofs),  in fsl_sai_trigger()
866 		regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),  in fsl_sai_trigger()
872 		regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),  in fsl_sai_trigger()
874 		regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),  in fsl_sai_trigger()
878 		regmap_read(sai->regmap, FSL_SAI_xCSR(!tx, ofs), &xcsr);  in fsl_sai_trigger()
908 	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;  in fsl_sai_startup()  local
918 					   tx ? sai->dma_params_tx.maxburst :  in fsl_sai_startup()
1336 	u32 rx, tx, type;  in fsl_sai_read_dlcfg()  local
1380 		ret = of_property_read_u32_index(np, propname, index++, &tx);  in fsl_sai_read_dlcfg()
1384 		if ((rx & ~soc_dl) || (tx & ~soc_dl)) {  in fsl_sai_read_dlcfg()
1390 		tx = tx & soc_dl;  in fsl_sai_read_dlcfg()
1399 		cfg[i].pins[1] = hweight8(tx);  in fsl_sai_read_dlcfg()
1400 		cfg[i].mask[1] = tx;  in fsl_sai_read_dlcfg()
1401 		dl_mask = tx;  in fsl_sai_read_dlcfg()
1403 		cfg[i].next_off[1] = fsl_sai_calc_dl_off(tx);  in fsl_sai_read_dlcfg()