Lines Matching +full:comp +full:- +full:disable
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
19 #include <linux/dma/imx-dma.h>
115 { .compatible = "fsl,imx8mm-micfil", .data = &fsl_micfil_imx8mm },
116 { .compatible = "fsl,imx8mp-micfil", .data = &fsl_micfil_imx8mp },
117 { .compatible = "fsl,imx93-micfil", .data = &fsl_micfil_imx93 },
141 switch (micfil->quality) { in micfil_set_quality()
162 return regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in micfil_set_quality()
173 ucontrol->value.integer.value[0] = micfil->quality; in micfil_quality_get()
184 micfil->quality = ucontrol->value.integer.value[0]; in micfil_quality_set()
190 "Disable (Record only)",
200 "Cut-off @1750Hz",
201 "Cut-off @215Hz",
202 "Cut-off @102Hz",
208 * Cut-off @21Hz 0 0
209 * Cut-off @83Hz 0 1
210 * Cut-off @152HZ 1 0
213 "Cut-off @21Hz", "Cut-off @83Hz",
214 "Cut-off @152Hz", "Bypass",
234 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in micfil_put_dc_remover_state()
235 struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); in micfil_put_dc_remover_state() local
236 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); in micfil_put_dc_remover_state()
237 unsigned int *item = ucontrol->value.enumerated.item; in micfil_put_dc_remover_state()
243 return -EINVAL; in micfil_put_dc_remover_state()
245 micfil->dc_remover = val; in micfil_put_dc_remover_state()
252 ret = snd_soc_component_update_bits(comp, REG_MICFIL_DC_CTRL, in micfil_put_dc_remover_state()
263 struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); in micfil_get_dc_remover_state() local
264 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); in micfil_get_dc_remover_state()
266 ucontrol->value.enumerated.item[0] = micfil->dc_remover; in micfil_get_dc_remover_state()
274 struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); in hwvad_put_enable() local
275 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in hwvad_put_enable()
276 unsigned int *item = ucontrol->value.enumerated.item; in hwvad_put_enable()
277 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); in hwvad_put_enable()
280 micfil->vad_enabled = val; in hwvad_put_enable()
288 struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); in hwvad_get_enable() local
289 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); in hwvad_get_enable()
291 ucontrol->value.enumerated.item[0] = micfil->vad_enabled; in hwvad_get_enable()
299 struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); in hwvad_put_init_mode() local
300 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in hwvad_put_init_mode()
301 unsigned int *item = ucontrol->value.enumerated.item; in hwvad_put_init_mode()
302 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); in hwvad_put_init_mode()
305 /* 0 - Envelope-based Mode in hwvad_put_init_mode()
306 * 1 - Energy-based Mode in hwvad_put_init_mode()
308 micfil->vad_init_mode = val; in hwvad_put_init_mode()
316 struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); in hwvad_get_init_mode() local
317 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); in hwvad_get_init_mode()
319 ucontrol->value.enumerated.item[0] = micfil->vad_init_mode; in hwvad_get_init_mode()
327 struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); in hwvad_detected() local
328 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); in hwvad_detected()
330 ucontrol->value.enumerated.item[0] = micfil->vad_detected; in hwvad_detected()
381 SOC_ENUM("HWVAD High-Pass Filter", hwvad_hpf_enum),
406 if (!micfil->soc->use_verid) in fsl_micfil_use_verid()
409 ret = regmap_read(micfil->regmap, REG_MICFIL_VERID, &val); in fsl_micfil_use_verid()
415 micfil->verid.version = val & in fsl_micfil_use_verid()
417 micfil->verid.version >>= MICFIL_VERID_MINOR_SHIFT; in fsl_micfil_use_verid()
418 micfil->verid.feature = val & MICFIL_VERID_FEATURE_MASK; in fsl_micfil_use_verid()
420 ret = regmap_read(micfil->regmap, REG_MICFIL_PARAM, &val); in fsl_micfil_use_verid()
426 micfil->param.hwvad_num = (val & MICFIL_PARAM_NUM_HWVAD_MASK) >> in fsl_micfil_use_verid()
428 micfil->param.hwvad_zcd = val & MICFIL_PARAM_HWVAD_ZCD; in fsl_micfil_use_verid()
429 micfil->param.hwvad_energy_mode = val & MICFIL_PARAM_HWVAD_ENERGY_MODE; in fsl_micfil_use_verid()
430 micfil->param.hwvad = val & MICFIL_PARAM_HWVAD; in fsl_micfil_use_verid()
431 micfil->param.dc_out_bypass = val & MICFIL_PARAM_DC_OUT_BYPASS; in fsl_micfil_use_verid()
432 micfil->param.dc_in_bypass = val & MICFIL_PARAM_DC_IN_BYPASS; in fsl_micfil_use_verid()
433 micfil->param.low_power = val & MICFIL_PARAM_LOW_POWER; in fsl_micfil_use_verid()
434 micfil->param.fil_out_width = val & MICFIL_PARAM_FIL_OUT_WIDTH; in fsl_micfil_use_verid()
435 micfil->param.fifo_ptrwid = (val & MICFIL_PARAM_FIFO_PTRWID_MASK) >> in fsl_micfil_use_verid()
437 micfil->param.npair = (val & MICFIL_PARAM_NPAIR_MASK) >> in fsl_micfil_use_verid()
443 /* The SRES is a self-negated bit which provides the CPU with the
445 * slave-bus interface. This bit always reads as zero, and this
453 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
458 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
464 * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined in fsl_micfil_reset()
465 * as non-volatile register, so SRES still remain in regmap in fsl_micfil_reset()
469 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
478 ret = regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, 0xFF, 0xFF); in fsl_micfil_reset()
494 dev_err(dai->dev, "micfil dai priv_data not set\n"); in fsl_micfil_startup()
495 return -EINVAL; in fsl_micfil_startup()
498 micfil->constraint_rates.list = micfil->constraint_rates_list; in fsl_micfil_startup()
499 micfil->constraint_rates.count = 0; in fsl_micfil_startup()
503 clk_rate = clk_get_rate(micfil->clk_src[i]); in fsl_micfil_startup()
505 micfil->constraint_rates_list[k++] = rates[j]; in fsl_micfil_startup()
506 micfil->constraint_rates.count++; in fsl_micfil_startup()
512 if (micfil->constraint_rates.count > 0) in fsl_micfil_startup()
513 snd_pcm_hw_constraint_list(substream->runtime, 0, in fsl_micfil_startup()
515 &micfil->constraint_rates); in fsl_micfil_startup()
520 /* Enable/disable hwvad interrupts */
527 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_configure_hwvad_interrupts()
531 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_configure_hwvad_interrupts()
537 /* Configuration done only in energy-based initialization mode */
541 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_energy_mode()
545 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_energy_mode()
549 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_energy_mode()
553 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_energy_mode()
557 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
561 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
565 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
569 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
575 /* Configuration done only in envelope-based initialization mode */
579 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
583 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
587 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
591 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
595 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
599 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
603 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
607 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
619 * -> Eneveope-based mode (section 8.4.1)
620 * -> Energy-based mode (section 8.4.2)
630 micfil->vad_detected = 0; in fsl_micfil_hwvad_enable()
632 /* envelope-based specific initialization */ in fsl_micfil_hwvad_enable()
633 if (micfil->vad_init_mode == MICFIL_HWVAD_ENVELOPE_MODE) in fsl_micfil_hwvad_enable()
641 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
645 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
654 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
658 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
666 struct device *dev = &micfil->pdev->dev; in fsl_micfil_hwvad_disable()
669 /* Disable HWVAD */ in fsl_micfil_hwvad_disable()
670 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_disable()
673 /* Disable hwvad interrupts */ in fsl_micfil_hwvad_disable()
676 dev_err(dev, "Failed to disable interrupts\n"); in fsl_micfil_hwvad_disable()
685 struct device *dev = &micfil->pdev->dev; in fsl_micfil_trigger()
698 /* DMA Interrupt Selection - DISEL bits in fsl_micfil_trigger()
699 * 00 - DMA and IRQ disabled in fsl_micfil_trigger()
700 * 01 - DMA req enabled in fsl_micfil_trigger()
701 * 10 - IRQ enabled in fsl_micfil_trigger()
702 * 11 - reserved in fsl_micfil_trigger()
704 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
711 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
716 if (micfil->vad_enabled) in fsl_micfil_trigger()
723 if (micfil->vad_enabled) in fsl_micfil_trigger()
726 /* Disable the module */ in fsl_micfil_trigger()
727 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
732 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
739 return -EINVAL; in fsl_micfil_trigger()
746 struct device *dev = &micfil->pdev->dev; in fsl_micfil_reparent_rootclk()
752 clk = micfil->mclk; in fsl_micfil_reparent_rootclk()
754 /* Disable clock first, for it was enabled by pm_runtime */ in fsl_micfil_reparent_rootclk()
755 fsl_asoc_reparent_pll_clocks(dev, clk, micfil->pll8k_clk, in fsl_micfil_reparent_rootclk()
756 micfil->pll11k_clk, ratio); in fsl_micfil_reparent_rootclk()
775 /* 1. Disable the module */ in fsl_micfil_hw_params()
776 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_hw_params()
782 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_hw_params()
783 0xFF, ((1 << channels) - 1)); in fsl_micfil_hw_params()
791 micfil->mclk_flag = true; in fsl_micfil_hw_params()
793 ret = clk_set_rate(micfil->mclk, rate * clk_div * osr * 8); in fsl_micfil_hw_params()
801 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in fsl_micfil_hw_params()
804 FIELD_PREP(MICFIL_CTRL2_CICOSR, 16 - osr)); in fsl_micfil_hw_params()
807 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hw_params()
809 FIELD_PREP(MICFIL_VAD0_CTRL1_CICOSR, 16 - osr)); in fsl_micfil_hw_params()
812 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hw_params()
814 FIELD_PREP(MICFIL_VAD0_CTRL1_CHSEL, (channels - 1))); in fsl_micfil_hw_params()
816 micfil->dma_params_rx.peripheral_config = &micfil->sdmacfg; in fsl_micfil_hw_params()
817 micfil->dma_params_rx.peripheral_size = sizeof(micfil->sdmacfg); in fsl_micfil_hw_params()
818 micfil->sdmacfg.n_fifos_src = channels; in fsl_micfil_hw_params()
819 micfil->sdmacfg.sw_done = true; in fsl_micfil_hw_params()
820 micfil->dma_params_rx.maxburst = channels * MICFIL_DMA_MAXBURST_RX; in fsl_micfil_hw_params()
821 if (micfil->soc->use_edma) in fsl_micfil_hw_params()
822 micfil->dma_params_rx.maxburst = channels; in fsl_micfil_hw_params()
832 clk_disable_unprepare(micfil->mclk); in fsl_micfil_hw_free()
833 micfil->mclk_flag = false; in fsl_micfil_hw_free()
840 struct fsl_micfil *micfil = dev_get_drvdata(cpu_dai->dev); in fsl_micfil_dai_probe()
841 struct device *dev = cpu_dai->dev; in fsl_micfil_dai_probe()
845 micfil->quality = QUALITY_VLOW0; in fsl_micfil_dai_probe()
846 micfil->card = cpu_dai->component->card; in fsl_micfil_dai_probe()
849 regmap_write(micfil->regmap, REG_MICFIL_OUT_CTRL, 0x22222222); in fsl_micfil_dai_probe()
854 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_DC_CTRL, in fsl_micfil_dai_probe()
860 micfil->dc_remover = MICFIL_DC_BYPASS; in fsl_micfil_dai_probe()
863 &micfil->dma_params_rx); in fsl_micfil_dai_probe()
865 /* FIFO Watermark Control - FIFOWMK*/ in fsl_micfil_dai_probe()
866 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_FIFO_CTRL, in fsl_micfil_dai_probe()
868 FIELD_PREP(MICFIL_FIFO_CTRL_FIFOWMK, micfil->soc->fifo_depth - 1)); in fsl_micfil_dai_probe()
879 if (micfil->soc->volume_sx) in fsl_micfil_component_probe()
899 .stream_name = "CPU-Capture",
909 .name = "fsl-micfil-dai",
975 if (micfil->soc->use_verid) in fsl_micfil_readable_reg()
1004 if (micfil->soc->use_verid) in fsl_micfil_writeable_reg()
1055 struct platform_device *pdev = micfil->pdev; in micfil_isr()
1062 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); in micfil_isr()
1063 regmap_read(micfil->regmap, REG_MICFIL_CTRL1, &ctrl1_reg); in micfil_isr()
1064 regmap_read(micfil->regmap, REG_MICFIL_FIFO_STAT, &fifo_stat_reg); in micfil_isr()
1068 /* Channel 0-7 Output Data Flags */ in micfil_isr()
1071 dev_dbg(&pdev->dev, in micfil_isr()
1077 regmap_write_bits(micfil->regmap, in micfil_isr()
1085 dev_dbg(&pdev->dev, in micfil_isr()
1090 dev_dbg(&pdev->dev, in micfil_isr()
1101 struct platform_device *pdev = micfil->pdev; in micfil_err_isr()
1106 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); in micfil_err_isr()
1109 dev_dbg(&pdev->dev, "isr: Decimation Filter is running\n"); in micfil_err_isr()
1112 dev_dbg(&pdev->dev, "isr: FIR Filter Data ready\n"); in micfil_err_isr()
1115 dev_dbg(&pdev->dev, "isr: ipg_clk_app is too low\n"); in micfil_err_isr()
1116 regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, in micfil_err_isr()
1120 regmap_read(micfil->regmap, REG_MICFIL_FIFO_STAT, &fifo_stat_reg); in micfil_err_isr()
1121 regmap_write_bits(micfil->regmap, REG_MICFIL_FIFO_STAT, in micfil_err_isr()
1124 regmap_read(micfil->regmap, REG_MICFIL_OUT_STAT, &out_stat_reg); in micfil_err_isr()
1125 regmap_write_bits(micfil->regmap, REG_MICFIL_OUT_STAT, in micfil_err_isr()
1136 if (!micfil->card) in voice_detected_fn()
1139 kctl = snd_soc_card_get_kcontrol(micfil->card, "VAD Detected"); in voice_detected_fn()
1143 if (micfil->vad_detected) in voice_detected_fn()
1144 snd_ctl_notify(micfil->card->snd_card, in voice_detected_fn()
1146 &kctl->id); in voice_detected_fn()
1154 struct device *dev = &micfil->pdev->dev; in hwvad_isr()
1158 regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg); in hwvad_isr()
1168 regmap_write_bits(micfil->regmap, REG_MICFIL_VAD0_STAT, in hwvad_isr()
1172 micfil->vad_detected = 1; in hwvad_isr()
1177 dev_err(dev, "Failed to disable hwvad\n"); in hwvad_isr()
1185 struct device *dev = &micfil->pdev->dev; in hwvad_err_isr()
1188 regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg); in hwvad_err_isr()
1201 struct device_node *np = pdev->dev.of_node; in fsl_micfil_probe()
1207 micfil = devm_kzalloc(&pdev->dev, sizeof(*micfil), GFP_KERNEL); in fsl_micfil_probe()
1209 return -ENOMEM; in fsl_micfil_probe()
1211 micfil->pdev = pdev; in fsl_micfil_probe()
1212 strscpy(micfil->name, np->name, sizeof(micfil->name)); in fsl_micfil_probe()
1214 micfil->soc = of_device_get_match_data(&pdev->dev); in fsl_micfil_probe()
1219 micfil->mclk = devm_clk_get(&pdev->dev, "ipg_clk_app"); in fsl_micfil_probe()
1220 if (IS_ERR(micfil->mclk)) { in fsl_micfil_probe()
1221 dev_err(&pdev->dev, "failed to get core clock: %ld\n", in fsl_micfil_probe()
1222 PTR_ERR(micfil->mclk)); in fsl_micfil_probe()
1223 return PTR_ERR(micfil->mclk); in fsl_micfil_probe()
1226 micfil->busclk = devm_clk_get(&pdev->dev, "ipg_clk"); in fsl_micfil_probe()
1227 if (IS_ERR(micfil->busclk)) { in fsl_micfil_probe()
1228 dev_err(&pdev->dev, "failed to get ipg clock: %ld\n", in fsl_micfil_probe()
1229 PTR_ERR(micfil->busclk)); in fsl_micfil_probe()
1230 return PTR_ERR(micfil->busclk); in fsl_micfil_probe()
1233 fsl_asoc_get_pll_clocks(&pdev->dev, &micfil->pll8k_clk, in fsl_micfil_probe()
1234 &micfil->pll11k_clk); in fsl_micfil_probe()
1236 micfil->clk_src[MICFIL_AUDIO_PLL1] = micfil->pll8k_clk; in fsl_micfil_probe()
1237 micfil->clk_src[MICFIL_AUDIO_PLL2] = micfil->pll11k_clk; in fsl_micfil_probe()
1238 micfil->clk_src[MICFIL_CLK_EXT3] = devm_clk_get(&pdev->dev, "clkext3"); in fsl_micfil_probe()
1239 if (IS_ERR(micfil->clk_src[MICFIL_CLK_EXT3])) in fsl_micfil_probe()
1240 micfil->clk_src[MICFIL_CLK_EXT3] = NULL; in fsl_micfil_probe()
1247 micfil->regmap = devm_regmap_init_mmio(&pdev->dev, in fsl_micfil_probe()
1250 if (IS_ERR(micfil->regmap)) { in fsl_micfil_probe()
1251 dev_err(&pdev->dev, "failed to init MICFIL regmap: %ld\n", in fsl_micfil_probe()
1252 PTR_ERR(micfil->regmap)); in fsl_micfil_probe()
1253 return PTR_ERR(micfil->regmap); in fsl_micfil_probe()
1260 &micfil->dataline); in fsl_micfil_probe()
1262 micfil->dataline = 1; in fsl_micfil_probe()
1264 if (micfil->dataline & ~micfil->soc->dataline) { in fsl_micfil_probe()
1265 dev_err(&pdev->dev, "dataline setting error, Mask is 0x%X\n", in fsl_micfil_probe()
1266 micfil->soc->dataline); in fsl_micfil_probe()
1267 return -EINVAL; in fsl_micfil_probe()
1272 micfil->irq[i] = platform_get_irq(pdev, i); in fsl_micfil_probe()
1273 if (micfil->irq[i] < 0) in fsl_micfil_probe()
1274 return micfil->irq[i]; in fsl_micfil_probe()
1278 ret = devm_request_irq(&pdev->dev, micfil->irq[0], in fsl_micfil_probe()
1280 micfil->name, micfil); in fsl_micfil_probe()
1282 dev_err(&pdev->dev, "failed to claim mic interface irq %u\n", in fsl_micfil_probe()
1283 micfil->irq[0]); in fsl_micfil_probe()
1288 ret = devm_request_irq(&pdev->dev, micfil->irq[1], in fsl_micfil_probe()
1290 micfil->name, micfil); in fsl_micfil_probe()
1292 dev_err(&pdev->dev, "failed to claim mic interface error irq %u\n", in fsl_micfil_probe()
1293 micfil->irq[1]); in fsl_micfil_probe()
1298 ret = devm_request_threaded_irq(&pdev->dev, micfil->irq[2], in fsl_micfil_probe()
1300 IRQF_SHARED, micfil->name, micfil); in fsl_micfil_probe()
1302 dev_err(&pdev->dev, "failed to claim hwvad event irq %u\n", in fsl_micfil_probe()
1303 micfil->irq[0]); in fsl_micfil_probe()
1308 ret = devm_request_irq(&pdev->dev, micfil->irq[3], in fsl_micfil_probe()
1310 micfil->name, micfil); in fsl_micfil_probe()
1312 dev_err(&pdev->dev, "failed to claim hwvad error irq %u\n", in fsl_micfil_probe()
1313 micfil->irq[1]); in fsl_micfil_probe()
1317 micfil->dma_params_rx.chan_name = "rx"; in fsl_micfil_probe()
1318 micfil->dma_params_rx.addr = res->start + REG_MICFIL_DATACH0; in fsl_micfil_probe()
1319 micfil->dma_params_rx.maxburst = MICFIL_DMA_MAXBURST_RX; in fsl_micfil_probe()
1323 pm_runtime_enable(&pdev->dev); in fsl_micfil_probe()
1324 if (!pm_runtime_enabled(&pdev->dev)) { in fsl_micfil_probe()
1325 ret = fsl_micfil_runtime_resume(&pdev->dev); in fsl_micfil_probe()
1330 ret = pm_runtime_resume_and_get(&pdev->dev); in fsl_micfil_probe()
1335 ret = fsl_micfil_use_verid(&pdev->dev); in fsl_micfil_probe()
1337 dev_warn(&pdev->dev, "Error reading MICFIL version: %d\n", ret); in fsl_micfil_probe()
1339 ret = pm_runtime_put_sync(&pdev->dev); in fsl_micfil_probe()
1340 if (ret < 0 && ret != -ENOSYS) in fsl_micfil_probe()
1343 regcache_cache_only(micfil->regmap, true); in fsl_micfil_probe()
1349 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); in fsl_micfil_probe()
1351 dev_err(&pdev->dev, "failed to pcm register\n"); in fsl_micfil_probe()
1355 fsl_micfil_dai.capture.formats = micfil->soc->formats; in fsl_micfil_probe()
1357 ret = devm_snd_soc_register_component(&pdev->dev, &fsl_micfil_component, in fsl_micfil_probe()
1360 dev_err(&pdev->dev, "failed to register component %s\n", in fsl_micfil_probe()
1368 if (!pm_runtime_status_suspended(&pdev->dev)) in fsl_micfil_probe()
1369 fsl_micfil_runtime_suspend(&pdev->dev); in fsl_micfil_probe()
1371 pm_runtime_disable(&pdev->dev); in fsl_micfil_probe()
1378 pm_runtime_disable(&pdev->dev); in fsl_micfil_remove()
1385 regcache_cache_only(micfil->regmap, true); in fsl_micfil_runtime_suspend()
1387 if (micfil->mclk_flag) in fsl_micfil_runtime_suspend()
1388 clk_disable_unprepare(micfil->mclk); in fsl_micfil_runtime_suspend()
1389 clk_disable_unprepare(micfil->busclk); in fsl_micfil_runtime_suspend()
1399 ret = clk_prepare_enable(micfil->busclk); in fsl_micfil_runtime_resume()
1403 if (micfil->mclk_flag) { in fsl_micfil_runtime_resume()
1404 ret = clk_prepare_enable(micfil->mclk); in fsl_micfil_runtime_resume()
1406 clk_disable_unprepare(micfil->busclk); in fsl_micfil_runtime_resume()
1411 regcache_cache_only(micfil->regmap, false); in fsl_micfil_runtime_resume()
1412 regcache_mark_dirty(micfil->regmap); in fsl_micfil_runtime_resume()
1413 regcache_sync(micfil->regmap); in fsl_micfil_runtime_resume()
1430 .name = "fsl-micfil-dai",
1437 MODULE_AUTHOR("Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>");