Lines Matching +full:0 +full:x1103
110 return 0; \
113 WM8996_REGULATOR_EVENT(0)
118 { WM8996_POWER_MANAGEMENT_1, 0x0 },
119 { WM8996_POWER_MANAGEMENT_2, 0x0 },
120 { WM8996_POWER_MANAGEMENT_3, 0x0 },
121 { WM8996_POWER_MANAGEMENT_4, 0x0 },
122 { WM8996_POWER_MANAGEMENT_5, 0x0 },
123 { WM8996_POWER_MANAGEMENT_6, 0x0 },
124 { WM8996_POWER_MANAGEMENT_7, 0x10 },
125 { WM8996_POWER_MANAGEMENT_8, 0x0 },
126 { WM8996_LEFT_LINE_INPUT_VOLUME, 0x0 },
127 { WM8996_RIGHT_LINE_INPUT_VOLUME, 0x0 },
128 { WM8996_LINE_INPUT_CONTROL, 0x0 },
129 { WM8996_DAC1_HPOUT1_VOLUME, 0x88 },
130 { WM8996_DAC2_HPOUT2_VOLUME, 0x88 },
131 { WM8996_DAC1_LEFT_VOLUME, 0x2c0 },
132 { WM8996_DAC1_RIGHT_VOLUME, 0x2c0 },
133 { WM8996_DAC2_LEFT_VOLUME, 0x2c0 },
134 { WM8996_DAC2_RIGHT_VOLUME, 0x2c0 },
135 { WM8996_OUTPUT1_LEFT_VOLUME, 0x80 },
136 { WM8996_OUTPUT1_RIGHT_VOLUME, 0x80 },
137 { WM8996_OUTPUT2_LEFT_VOLUME, 0x80 },
138 { WM8996_OUTPUT2_RIGHT_VOLUME, 0x80 },
139 { WM8996_MICBIAS_1, 0x39 },
140 { WM8996_MICBIAS_2, 0x39 },
141 { WM8996_LDO_1, 0x3 },
142 { WM8996_LDO_2, 0x13 },
143 { WM8996_ACCESSORY_DETECT_MODE_1, 0x4 },
144 { WM8996_ACCESSORY_DETECT_MODE_2, 0x0 },
145 { WM8996_HEADPHONE_DETECT_1, 0x20 },
146 { WM8996_HEADPHONE_DETECT_2, 0x0 },
147 { WM8996_MIC_DETECT_1, 0x7600 },
148 { WM8996_MIC_DETECT_2, 0xbf },
149 { WM8996_CHARGE_PUMP_1, 0x1f25 },
150 { WM8996_CHARGE_PUMP_2, 0xab19 },
151 { WM8996_DC_SERVO_1, 0x0 },
152 { WM8996_DC_SERVO_3, 0x0 },
153 { WM8996_DC_SERVO_5, 0x2a2a },
154 { WM8996_DC_SERVO_6, 0x0 },
155 { WM8996_DC_SERVO_7, 0x0 },
156 { WM8996_ANALOGUE_HP_1, 0x0 },
157 { WM8996_ANALOGUE_HP_2, 0x0 },
158 { WM8996_CONTROL_INTERFACE_1, 0x8004 },
159 { WM8996_WRITE_SEQUENCER_CTRL_1, 0x0 },
160 { WM8996_WRITE_SEQUENCER_CTRL_2, 0x0 },
161 { WM8996_AIF_CLOCKING_1, 0x0 },
162 { WM8996_AIF_CLOCKING_2, 0x0 },
163 { WM8996_CLOCKING_1, 0x10 },
164 { WM8996_CLOCKING_2, 0x0 },
165 { WM8996_AIF_RATE, 0x83 },
166 { WM8996_FLL_CONTROL_1, 0x0 },
167 { WM8996_FLL_CONTROL_2, 0x0 },
168 { WM8996_FLL_CONTROL_3, 0x0 },
169 { WM8996_FLL_CONTROL_4, 0x5dc0 },
170 { WM8996_FLL_CONTROL_5, 0xc84 },
171 { WM8996_FLL_EFS_1, 0x0 },
172 { WM8996_FLL_EFS_2, 0x2 },
173 { WM8996_AIF1_CONTROL, 0x0 },
174 { WM8996_AIF1_BCLK, 0x0 },
175 { WM8996_AIF1_TX_LRCLK_1, 0x80 },
176 { WM8996_AIF1_TX_LRCLK_2, 0x8 },
177 { WM8996_AIF1_RX_LRCLK_1, 0x80 },
178 { WM8996_AIF1_RX_LRCLK_2, 0x0 },
179 { WM8996_AIF1TX_DATA_CONFIGURATION_1, 0x1818 },
180 { WM8996_AIF1TX_DATA_CONFIGURATION_2, 0 },
181 { WM8996_AIF1RX_DATA_CONFIGURATION, 0x1818 },
182 { WM8996_AIF1TX_CHANNEL_0_CONFIGURATION, 0x0 },
183 { WM8996_AIF1TX_CHANNEL_1_CONFIGURATION, 0x0 },
184 { WM8996_AIF1TX_CHANNEL_2_CONFIGURATION, 0x0 },
185 { WM8996_AIF1TX_CHANNEL_3_CONFIGURATION, 0x0 },
186 { WM8996_AIF1TX_CHANNEL_4_CONFIGURATION, 0x0 },
187 { WM8996_AIF1TX_CHANNEL_5_CONFIGURATION, 0x0 },
188 { WM8996_AIF1RX_CHANNEL_0_CONFIGURATION, 0x0 },
189 { WM8996_AIF1RX_CHANNEL_1_CONFIGURATION, 0x0 },
190 { WM8996_AIF1RX_CHANNEL_2_CONFIGURATION, 0x0 },
191 { WM8996_AIF1RX_CHANNEL_3_CONFIGURATION, 0x0 },
192 { WM8996_AIF1RX_CHANNEL_4_CONFIGURATION, 0x0 },
193 { WM8996_AIF1RX_CHANNEL_5_CONFIGURATION, 0x0 },
194 { WM8996_AIF1RX_MONO_CONFIGURATION, 0x0 },
195 { WM8996_AIF1TX_TEST, 0x7 },
196 { WM8996_AIF2_CONTROL, 0x0 },
197 { WM8996_AIF2_BCLK, 0x0 },
198 { WM8996_AIF2_TX_LRCLK_1, 0x80 },
199 { WM8996_AIF2_TX_LRCLK_2, 0x8 },
200 { WM8996_AIF2_RX_LRCLK_1, 0x80 },
201 { WM8996_AIF2_RX_LRCLK_2, 0x0 },
202 { WM8996_AIF2TX_DATA_CONFIGURATION_1, 0x1818 },
203 { WM8996_AIF2RX_DATA_CONFIGURATION, 0x1818 },
204 { WM8996_AIF2RX_DATA_CONFIGURATION, 0x0 },
205 { WM8996_AIF2TX_CHANNEL_0_CONFIGURATION, 0x0 },
206 { WM8996_AIF2TX_CHANNEL_1_CONFIGURATION, 0x0 },
207 { WM8996_AIF2RX_CHANNEL_0_CONFIGURATION, 0x0 },
208 { WM8996_AIF2RX_CHANNEL_1_CONFIGURATION, 0x0 },
209 { WM8996_AIF2RX_MONO_CONFIGURATION, 0x0 },
210 { WM8996_AIF2TX_TEST, 0x1 },
211 { WM8996_DSP1_TX_LEFT_VOLUME, 0xc0 },
212 { WM8996_DSP1_TX_RIGHT_VOLUME, 0xc0 },
213 { WM8996_DSP1_RX_LEFT_VOLUME, 0xc0 },
214 { WM8996_DSP1_RX_RIGHT_VOLUME, 0xc0 },
215 { WM8996_DSP1_TX_FILTERS, 0x2000 },
216 { WM8996_DSP1_RX_FILTERS_1, 0x200 },
217 { WM8996_DSP1_RX_FILTERS_2, 0x10 },
218 { WM8996_DSP1_DRC_1, 0x98 },
219 { WM8996_DSP1_DRC_2, 0x845 },
220 { WM8996_DSP1_RX_EQ_GAINS_1, 0x6318 },
221 { WM8996_DSP1_RX_EQ_GAINS_2, 0x6300 },
222 { WM8996_DSP1_RX_EQ_BAND_1_A, 0xfca },
223 { WM8996_DSP1_RX_EQ_BAND_1_B, 0x400 },
224 { WM8996_DSP1_RX_EQ_BAND_1_PG, 0xd8 },
225 { WM8996_DSP1_RX_EQ_BAND_2_A, 0x1eb5 },
226 { WM8996_DSP1_RX_EQ_BAND_2_B, 0xf145 },
227 { WM8996_DSP1_RX_EQ_BAND_2_C, 0xb75 },
228 { WM8996_DSP1_RX_EQ_BAND_2_PG, 0x1c5 },
229 { WM8996_DSP1_RX_EQ_BAND_3_A, 0x1c58 },
230 { WM8996_DSP1_RX_EQ_BAND_3_B, 0xf373 },
231 { WM8996_DSP1_RX_EQ_BAND_3_C, 0xa54 },
232 { WM8996_DSP1_RX_EQ_BAND_3_PG, 0x558 },
233 { WM8996_DSP1_RX_EQ_BAND_4_A, 0x168e },
234 { WM8996_DSP1_RX_EQ_BAND_4_B, 0xf829 },
235 { WM8996_DSP1_RX_EQ_BAND_4_C, 0x7ad },
236 { WM8996_DSP1_RX_EQ_BAND_4_PG, 0x1103 },
237 { WM8996_DSP1_RX_EQ_BAND_5_A, 0x564 },
238 { WM8996_DSP1_RX_EQ_BAND_5_B, 0x559 },
239 { WM8996_DSP1_RX_EQ_BAND_5_PG, 0x4000 },
240 { WM8996_DSP2_TX_LEFT_VOLUME, 0xc0 },
241 { WM8996_DSP2_TX_RIGHT_VOLUME, 0xc0 },
242 { WM8996_DSP2_RX_LEFT_VOLUME, 0xc0 },
243 { WM8996_DSP2_RX_RIGHT_VOLUME, 0xc0 },
244 { WM8996_DSP2_TX_FILTERS, 0x2000 },
245 { WM8996_DSP2_RX_FILTERS_1, 0x200 },
246 { WM8996_DSP2_RX_FILTERS_2, 0x10 },
247 { WM8996_DSP2_DRC_1, 0x98 },
248 { WM8996_DSP2_DRC_2, 0x845 },
249 { WM8996_DSP2_RX_EQ_GAINS_1, 0x6318 },
250 { WM8996_DSP2_RX_EQ_GAINS_2, 0x6300 },
251 { WM8996_DSP2_RX_EQ_BAND_1_A, 0xfca },
252 { WM8996_DSP2_RX_EQ_BAND_1_B, 0x400 },
253 { WM8996_DSP2_RX_EQ_BAND_1_PG, 0xd8 },
254 { WM8996_DSP2_RX_EQ_BAND_2_A, 0x1eb5 },
255 { WM8996_DSP2_RX_EQ_BAND_2_B, 0xf145 },
256 { WM8996_DSP2_RX_EQ_BAND_2_C, 0xb75 },
257 { WM8996_DSP2_RX_EQ_BAND_2_PG, 0x1c5 },
258 { WM8996_DSP2_RX_EQ_BAND_3_A, 0x1c58 },
259 { WM8996_DSP2_RX_EQ_BAND_3_B, 0xf373 },
260 { WM8996_DSP2_RX_EQ_BAND_3_C, 0xa54 },
261 { WM8996_DSP2_RX_EQ_BAND_3_PG, 0x558 },
262 { WM8996_DSP2_RX_EQ_BAND_4_A, 0x168e },
263 { WM8996_DSP2_RX_EQ_BAND_4_B, 0xf829 },
264 { WM8996_DSP2_RX_EQ_BAND_4_C, 0x7ad },
265 { WM8996_DSP2_RX_EQ_BAND_4_PG, 0x1103 },
266 { WM8996_DSP2_RX_EQ_BAND_5_A, 0x564 },
267 { WM8996_DSP2_RX_EQ_BAND_5_B, 0x559 },
268 { WM8996_DSP2_RX_EQ_BAND_5_PG, 0x4000 },
269 { WM8996_DAC1_MIXER_VOLUMES, 0x0 },
270 { WM8996_DAC1_LEFT_MIXER_ROUTING, 0x0 },
271 { WM8996_DAC1_RIGHT_MIXER_ROUTING, 0x0 },
272 { WM8996_DAC2_MIXER_VOLUMES, 0x0 },
273 { WM8996_DAC2_LEFT_MIXER_ROUTING, 0x0 },
274 { WM8996_DAC2_RIGHT_MIXER_ROUTING, 0x0 },
275 { WM8996_DSP1_TX_LEFT_MIXER_ROUTING, 0x0 },
276 { WM8996_DSP1_TX_RIGHT_MIXER_ROUTING, 0x0 },
277 { WM8996_DSP2_TX_LEFT_MIXER_ROUTING, 0x0 },
278 { WM8996_DSP2_TX_RIGHT_MIXER_ROUTING, 0x0 },
279 { WM8996_DSP_TX_MIXER_SELECT, 0x0 },
280 { WM8996_DAC_SOFTMUTE, 0x0 },
281 { WM8996_OVERSAMPLING, 0xd },
282 { WM8996_SIDETONE, 0x1040 },
283 { WM8996_GPIO_1, 0xa101 },
284 { WM8996_GPIO_2, 0xa101 },
285 { WM8996_GPIO_3, 0xa101 },
286 { WM8996_GPIO_4, 0xa101 },
287 { WM8996_GPIO_5, 0xa101 },
288 { WM8996_PULL_CONTROL_1, 0x0 },
289 { WM8996_PULL_CONTROL_2, 0x140 },
290 { WM8996_INTERRUPT_STATUS_1_MASK, 0x1f },
291 { WM8996_INTERRUPT_STATUS_2_MASK, 0x1ecf },
292 { WM8996_LEFT_PDM_SPEAKER, 0x0 },
293 { WM8996_RIGHT_PDM_SPEAKER, 0x1 },
294 { WM8996_PDM_SPEAKER_MUTE_SEQUENCE, 0x69 },
295 { WM8996_PDM_SPEAKER_VOLUME, 0x66 },
298 static const DECLARE_TLV_DB_SCALE(inpga_tlv, 0, 100, 0);
299 static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 150, 0);
301 static const DECLARE_TLV_DB_SCALE(out_digital_tlv, -1200, 150, 0);
302 static const DECLARE_TLV_DB_SCALE(out_tlv, -900, 75, 0);
303 static const DECLARE_TLV_DB_SCALE(spk_tlv, -900, 150, 0);
304 static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
329 WM8996_DSP1_TX_FILTERS, 0, hpf_cutoff_text);
332 WM8996_DSP2_TX_FILTERS, 0, hpf_cutoff_text);
344 case 0:
350 iface = 0;
358 iface = 0;
367 best = 0;
369 for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) {
371 wm8996->retune_mobile_texts[cfg]) == 0 &&
392 for (i = 0; i < ARRAY_SIZE(pdata->retune_mobile_cfgs[best].regs); i++)
393 snd_soc_component_update_bits(component, base + i, 0xffff,
402 if (strcmp(name, "DSP1 EQ Mode") == 0)
403 return 0;
404 if (strcmp(name, "DSP2 EQ Mode") == 0)
416 int value = ucontrol->value.enumerated.item[0];
418 if (block < 0)
428 return 0;
438 if (block < 0)
440 ucontrol->value.enumerated.item[0] = wm8996->retune_mobile_cfg[block];
442 return 0;
447 WM8996_RIGHT_LINE_INPUT_VOLUME, 0, 31, 0, inpga_tlv),
449 WM8996_RIGHT_LINE_INPUT_VOLUME, 5, 1, 0),
452 0, 5, 24, 0, sidetone_tlv),
454 0, 5, 24, 0, sidetone_tlv),
455 SOC_SINGLE("Sidetone LPF Switch", WM8996_SIDETONE, 12, 1, 0),
457 SOC_SINGLE("Sidetone HPF Switch", WM8996_SIDETONE, 6, 1, 0),
460 WM8996_DSP1_TX_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
462 WM8996_DSP2_TX_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
465 13, 1, 0),
466 SOC_DOUBLE("DSP1 Capture HPF Switch", WM8996_DSP1_TX_FILTERS, 12, 11, 1, 0),
471 13, 1, 0),
472 SOC_DOUBLE("DSP2 Capture HPF Switch", WM8996_DSP2_TX_FILTERS, 12, 11, 1, 0),
477 WM8996_DSP1_RX_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
481 WM8996_DSP2_RX_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
485 WM8996_DAC1_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
490 WM8996_DAC2_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
494 SOC_SINGLE("Speaker High Performance Switch", WM8996_OVERSAMPLING, 3, 1, 0),
495 SOC_SINGLE("DMIC High Performance Switch", WM8996_OVERSAMPLING, 2, 1, 0),
496 SOC_SINGLE("ADC High Performance Switch", WM8996_OVERSAMPLING, 1, 1, 0),
497 SOC_SINGLE("DAC High Performance Switch", WM8996_OVERSAMPLING, 0, 1, 0),
499 SOC_SINGLE("DAC Soft Mute Switch", WM8996_DAC_SOFTMUTE, 1, 1, 0),
500 SOC_SINGLE("DAC Slow Soft Mute Switch", WM8996_DAC_SOFTMUTE, 0, 1, 0),
502 SOC_SINGLE("DSP1 3D Stereo Switch", WM8996_DSP1_RX_FILTERS_2, 8, 1, 0),
503 SOC_SINGLE("DSP2 3D Stereo Switch", WM8996_DSP2_RX_FILTERS_2, 8, 1, 0),
506 0, threedstereo_tlv),
508 0, threedstereo_tlv),
510 SOC_DOUBLE_TLV("Digital Output 1 Volume", WM8996_DAC1_HPOUT1_VOLUME, 0, 4,
511 8, 0, out_digital_tlv),
512 SOC_DOUBLE_TLV("Digital Output 2 Volume", WM8996_DAC2_HPOUT2_VOLUME, 0, 4,
513 8, 0, out_digital_tlv),
516 WM8996_OUTPUT1_RIGHT_VOLUME, 0, 12, 0, out_tlv),
518 WM8996_OUTPUT1_RIGHT_VOLUME, 7, 1, 0),
521 WM8996_OUTPUT2_RIGHT_VOLUME, 0, 12, 0, out_tlv),
523 WM8996_OUTPUT2_RIGHT_VOLUME, 7, 1, 0),
525 SOC_DOUBLE_TLV("Speaker Volume", WM8996_PDM_SPEAKER_VOLUME, 0, 4, 8, 0,
530 WM8996_RIGHT_PDM_SPEAKER, 2, 1, 0),
532 SOC_SINGLE("DSP1 EQ Switch", WM8996_DSP1_RX_EQ_GAINS_1, 0, 1, 0),
533 SOC_SINGLE("DSP2 EQ Switch", WM8996_DSP2_RX_EQ_GAINS_1, 0, 1, 0),
535 SOC_SINGLE("DSP1 DRC TXL Switch", WM8996_DSP1_DRC_1, 0, 1, 0),
536 SOC_SINGLE("DSP1 DRC TXR Switch", WM8996_DSP1_DRC_1, 1, 1, 0),
537 SOC_SINGLE("DSP1 DRC RX Switch", WM8996_DSP1_DRC_1, 2, 1, 0),
542 SOC_SINGLE("DSP2 DRC TXL Switch", WM8996_DSP2_DRC_1, 0, 1, 0),
543 SOC_SINGLE("DSP2 DRC TXR Switch", WM8996_DSP2_DRC_1, 1, 1, 0),
544 SOC_SINGLE("DSP2 DRC RX Switch", WM8996_DSP2_DRC_1, 2, 1, 0),
551 SOC_SINGLE_TLV("DSP1 EQ B1 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 11, 31, 0,
553 SOC_SINGLE_TLV("DSP1 EQ B2 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 6, 31, 0,
555 SOC_SINGLE_TLV("DSP1 EQ B3 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 1, 31, 0,
557 SOC_SINGLE_TLV("DSP1 EQ B4 Volume", WM8996_DSP1_RX_EQ_GAINS_2, 11, 31, 0,
559 SOC_SINGLE_TLV("DSP1 EQ B5 Volume", WM8996_DSP1_RX_EQ_GAINS_2, 6, 31, 0,
562 SOC_SINGLE_TLV("DSP2 EQ B1 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 11, 31, 0,
564 SOC_SINGLE_TLV("DSP2 EQ B2 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 6, 31, 0,
566 SOC_SINGLE_TLV("DSP2 EQ B3 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 1, 31, 0,
568 SOC_SINGLE_TLV("DSP2 EQ B4 Volume", WM8996_DSP2_RX_EQ_GAINS_2, 11, 31, 0,
570 SOC_SINGLE_TLV("DSP2 EQ B5 Volume", WM8996_DSP2_RX_EQ_GAINS_2, 6, 31, 0,
593 WM8996_BG_ENA, 0);
600 int ret = 0;
628 return 0;
650 return 0;
667 if (time_left == 0)
679 if (time_left == 0)
700 wm8996->dcs_pending = 0;
707 val = 0;
708 mask = 0;
729 val = 0;
730 mask = 0;
770 return 0;
778 WM8996_SIDETONE, 0, sidetone_text);
794 WM8996_LEFT_PDM_SPEAKER, 0, spk_text);
800 WM8996_RIGHT_PDM_SPEAKER, 0, spk_text);
810 WM8996_POWER_MANAGEMENT_8, 0, dsp1rx_text);
840 WM8996_POWER_MANAGEMENT_7, 0, inmux_text);
853 5, 1, 0),
855 4, 1, 0),
856 SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING, 1, 1, 0),
857 SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING, 0, 1, 0),
862 5, 1, 0),
864 4, 1, 0),
865 SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC2_LEFT_MIXER_ROUTING, 1, 1, 0),
866 SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC2_LEFT_MIXER_ROUTING, 0, 1, 0),
871 5, 1, 0),
873 4, 1, 0),
874 SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING, 1, 1, 0),
875 SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING, 0, 1, 0),
880 5, 1, 0),
882 4, 1, 0),
883 SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC1_LEFT_MIXER_ROUTING, 1, 1, 0),
884 SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC1_LEFT_MIXER_ROUTING, 0, 1, 0),
889 1, 1, 0),
891 0, 1, 0),
896 1, 1, 0),
898 0, 1, 0),
903 1, 1, 0),
905 0, 1, 0),
910 1, 1, 0),
912 0, 1, 0),
930 SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD", 20, 0),
931 SND_SOC_DAPM_SUPPLY_S("SYSCLK", 1, WM8996_AIF_CLOCKING_1, 0, 0, NULL, 0),
932 SND_SOC_DAPM_SUPPLY_S("SYSDSPCLK", 2, WM8996_CLOCKING_1, 1, 0, NULL, 0),
933 SND_SOC_DAPM_SUPPLY_S("AIFCLK", 2, WM8996_CLOCKING_1, 2, 0, NULL, 0),
934 SND_SOC_DAPM_SUPPLY_S("Charge Pump", 2, WM8996_CHARGE_PUMP_1, 15, 0, cp_event,
936 SND_SOC_DAPM_SUPPLY("Bandgap", SND_SOC_NOPM, 0, 0, bg_event,
938 SND_SOC_DAPM_SUPPLY("LDO2", WM8996_POWER_MANAGEMENT_2, 1, 0, NULL, 0),
939 SND_SOC_DAPM_SUPPLY("MICB1 Audio", WM8996_MICBIAS_1, 4, 1, NULL, 0),
940 SND_SOC_DAPM_SUPPLY("MICB2 Audio", WM8996_MICBIAS_2, 4, 1, NULL, 0),
941 SND_SOC_DAPM_MICBIAS("MICB2", WM8996_POWER_MANAGEMENT_1, 9, 0),
942 SND_SOC_DAPM_MICBIAS("MICB1", WM8996_POWER_MANAGEMENT_1, 8, 0),
944 SND_SOC_DAPM_PGA("IN1L PGA", WM8996_POWER_MANAGEMENT_2, 5, 0, NULL, 0),
945 SND_SOC_DAPM_PGA("IN1R PGA", WM8996_POWER_MANAGEMENT_2, 4, 0, NULL, 0),
947 SND_SOC_DAPM_MUX("IN1L Mux", WM8996_POWER_MANAGEMENT_7, 2, 0, &in1_mux),
948 SND_SOC_DAPM_MUX("IN1R Mux", WM8996_POWER_MANAGEMENT_7, 3, 0, &in1_mux),
949 SND_SOC_DAPM_MUX("IN2L Mux", WM8996_POWER_MANAGEMENT_7, 6, 0, &in2_mux),
950 SND_SOC_DAPM_MUX("IN2R Mux", WM8996_POWER_MANAGEMENT_7, 7, 0, &in2_mux),
952 SND_SOC_DAPM_SUPPLY("DMIC2", WM8996_POWER_MANAGEMENT_7, 9, 0, NULL, 0),
953 SND_SOC_DAPM_SUPPLY("DMIC1", WM8996_POWER_MANAGEMENT_7, 8, 0, NULL, 0),
955 SND_SOC_DAPM_ADC("DMIC2L", NULL, WM8996_POWER_MANAGEMENT_3, 5, 0),
956 SND_SOC_DAPM_ADC("DMIC2R", NULL, WM8996_POWER_MANAGEMENT_3, 4, 0),
957 SND_SOC_DAPM_ADC("DMIC1L", NULL, WM8996_POWER_MANAGEMENT_3, 3, 0),
958 SND_SOC_DAPM_ADC("DMIC1R", NULL, WM8996_POWER_MANAGEMENT_3, 2, 0),
960 SND_SOC_DAPM_ADC("ADCL", NULL, WM8996_POWER_MANAGEMENT_3, 1, 0),
961 SND_SOC_DAPM_ADC("ADCR", NULL, WM8996_POWER_MANAGEMENT_3, 0, 0),
963 SND_SOC_DAPM_MUX("Left Sidetone", SND_SOC_NOPM, 0, 0, &left_sidetone),
964 SND_SOC_DAPM_MUX("Right Sidetone", SND_SOC_NOPM, 0, 0, &right_sidetone),
966 SND_SOC_DAPM_AIF_IN("DSP2RXL", NULL, 0, WM8996_POWER_MANAGEMENT_3, 11, 0),
967 SND_SOC_DAPM_AIF_IN("DSP2RXR", NULL, 1, WM8996_POWER_MANAGEMENT_3, 10, 0),
968 SND_SOC_DAPM_AIF_IN("DSP1RXL", NULL, 0, WM8996_POWER_MANAGEMENT_3, 9, 0),
969 SND_SOC_DAPM_AIF_IN("DSP1RXR", NULL, 1, WM8996_POWER_MANAGEMENT_3, 8, 0),
971 SND_SOC_DAPM_MIXER("DSP2TXL", WM8996_POWER_MANAGEMENT_5, 11, 0,
973 SND_SOC_DAPM_MIXER("DSP2TXR", WM8996_POWER_MANAGEMENT_5, 10, 0,
975 SND_SOC_DAPM_MIXER("DSP1TXL", WM8996_POWER_MANAGEMENT_5, 9, 0,
977 SND_SOC_DAPM_MIXER("DSP1TXR", WM8996_POWER_MANAGEMENT_5, 8, 0,
980 SND_SOC_DAPM_MIXER("DAC2L Mixer", SND_SOC_NOPM, 0, 0,
982 SND_SOC_DAPM_MIXER("DAC2R Mixer", SND_SOC_NOPM, 0, 0,
984 SND_SOC_DAPM_MIXER("DAC1L Mixer", SND_SOC_NOPM, 0, 0,
986 SND_SOC_DAPM_MIXER("DAC1R Mixer", SND_SOC_NOPM, 0, 0,
989 SND_SOC_DAPM_DAC("DAC2L", NULL, WM8996_POWER_MANAGEMENT_5, 3, 0),
990 SND_SOC_DAPM_DAC("DAC2R", NULL, WM8996_POWER_MANAGEMENT_5, 2, 0),
991 SND_SOC_DAPM_DAC("DAC1L", NULL, WM8996_POWER_MANAGEMENT_5, 1, 0),
992 SND_SOC_DAPM_DAC("DAC1R", NULL, WM8996_POWER_MANAGEMENT_5, 0, 0),
994 SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, WM8996_POWER_MANAGEMENT_4, 9, 0),
995 SND_SOC_DAPM_AIF_IN("AIF2RX0", NULL, 1, WM8996_POWER_MANAGEMENT_4, 8, 0),
997 SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, WM8996_POWER_MANAGEMENT_6, 9, 0),
998 SND_SOC_DAPM_AIF_OUT("AIF2TX0", NULL, 1, WM8996_POWER_MANAGEMENT_6, 8, 0),
1000 SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 5, WM8996_POWER_MANAGEMENT_4, 5, 0),
1001 SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 4, WM8996_POWER_MANAGEMENT_4, 4, 0),
1002 SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 3, WM8996_POWER_MANAGEMENT_4, 3, 0),
1003 SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 2, WM8996_POWER_MANAGEMENT_4, 2, 0),
1004 SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 1, WM8996_POWER_MANAGEMENT_4, 1, 0),
1005 SND_SOC_DAPM_AIF_IN("AIF1RX0", NULL, 0, WM8996_POWER_MANAGEMENT_4, 0, 0),
1007 SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 5, WM8996_POWER_MANAGEMENT_6, 5, 0),
1008 SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 4, WM8996_POWER_MANAGEMENT_6, 4, 0),
1009 SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 3, WM8996_POWER_MANAGEMENT_6, 3, 0),
1010 SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 2, WM8996_POWER_MANAGEMENT_6, 2, 0),
1011 SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 1, WM8996_POWER_MANAGEMENT_6, 1, 0),
1012 SND_SOC_DAPM_AIF_OUT("AIF1TX0", NULL, 0, WM8996_POWER_MANAGEMENT_6, 0, 0),
1015 * things down for now. RXA = 0,1, RXB = 2,3 and so on */
1016 SND_SOC_DAPM_PGA("AIF1RXA", SND_SOC_NOPM, 0, 0, NULL, 0),
1017 SND_SOC_DAPM_PGA("AIF1RXB", SND_SOC_NOPM, 0, 0, NULL, 0),
1018 SND_SOC_DAPM_PGA("AIF1RXC", SND_SOC_NOPM, 0, 0, NULL, 0),
1019 SND_SOC_DAPM_PGA("AIF2RX", SND_SOC_NOPM, 0, 0, NULL, 0),
1020 SND_SOC_DAPM_PGA("DSP2TX", SND_SOC_NOPM, 0, 0, NULL, 0),
1022 SND_SOC_DAPM_MUX("DSP1RX", SND_SOC_NOPM, 0, 0, &dsp1rx),
1023 SND_SOC_DAPM_MUX("DSP2RX", SND_SOC_NOPM, 0, 0, &dsp2rx),
1024 SND_SOC_DAPM_MUX("AIF2TX", SND_SOC_NOPM, 0, 0, &aif2tx),
1026 SND_SOC_DAPM_MUX("SPKL", SND_SOC_NOPM, 0, 0, &spkl_mux),
1027 SND_SOC_DAPM_MUX("SPKR", SND_SOC_NOPM, 0, 0, &spkr_mux),
1028 SND_SOC_DAPM_PGA("SPKL PGA", WM8996_LEFT_PDM_SPEAKER, 4, 0, NULL, 0),
1029 SND_SOC_DAPM_PGA("SPKR PGA", WM8996_RIGHT_PDM_SPEAKER, 4, 0, NULL, 0),
1031 SND_SOC_DAPM_PGA_S("HPOUT2L PGA", 0, WM8996_POWER_MANAGEMENT_1, 7, 0, NULL, 0),
1032 SND_SOC_DAPM_PGA_S("HPOUT2L_DLY", 1, WM8996_ANALOGUE_HP_2, 5, 0, NULL, 0),
1033 SND_SOC_DAPM_PGA_S("HPOUT2L_DCS", 2, WM8996_DC_SERVO_1, 2, 0, dcs_start,
1035 SND_SOC_DAPM_PGA_S("HPOUT2L_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT2L, 0,
1039 SND_SOC_DAPM_PGA_S("HPOUT2R PGA", 0, WM8996_POWER_MANAGEMENT_1, 6, 0,NULL, 0),
1040 SND_SOC_DAPM_PGA_S("HPOUT2R_DLY", 1, WM8996_ANALOGUE_HP_2, 1, 0, NULL, 0),
1041 SND_SOC_DAPM_PGA_S("HPOUT2R_DCS", 2, WM8996_DC_SERVO_1, 3, 0, dcs_start,
1043 SND_SOC_DAPM_PGA_S("HPOUT2R_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT2R, 0,
1047 SND_SOC_DAPM_PGA_S("HPOUT1L PGA", 0, WM8996_POWER_MANAGEMENT_1, 5, 0, NULL, 0),
1048 SND_SOC_DAPM_PGA_S("HPOUT1L_DLY", 1, WM8996_ANALOGUE_HP_1, 5, 0, NULL, 0),
1049 SND_SOC_DAPM_PGA_S("HPOUT1L_DCS", 2, WM8996_DC_SERVO_1, 0, 0, dcs_start,
1051 SND_SOC_DAPM_PGA_S("HPOUT1L_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT1L, 0,
1055 SND_SOC_DAPM_PGA_S("HPOUT1R PGA", 0, WM8996_POWER_MANAGEMENT_1, 4, 0, NULL, 0),
1056 SND_SOC_DAPM_PGA_S("HPOUT1R_DLY", 1, WM8996_ANALOGUE_HP_1, 1, 0, NULL, 0),
1057 SND_SOC_DAPM_PGA_S("HPOUT1R_DCS", 2, WM8996_DC_SERVO_1, 1, 0, dcs_start,
1059 SND_SOC_DAPM_PGA_S("HPOUT1R_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT1R, 0,
1542 for (aif = 0; aif < WM8996_AIFS; aif++) {
1544 case 0:
1555 best = 0;
1556 for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) {
1558 if (cur_val < 0) /* BCLK table is sorted */
1583 WM8996_MICB1_MODE, 0);
1585 WM8996_MICB2_MODE, 0);
1592 if (ret != 0) {
1619 gpiod_set_value_cansleep(wm8996->ldo_ena, 0);
1627 return 0;
1633 int aifctrl = 0;
1634 int bclk = 0;
1635 int lrclk_tx = 0;
1636 int lrclk_rx = 0;
1640 case 0:
1722 return 0;
1736 int aifdata = 0;
1737 int lrclk = 0;
1738 int dsp = 0;
1742 case 0:
1751 dsp_shift = 0;
1770 if (bclk_rate < 0) {
1780 if (bits < 0)
1784 best = 0;
1785 for (i = 0; i < ARRAY_SIZE(dsp_divs); i++) {
1807 return 0;
1815 int lfclk = 0;
1816 int ratediv = 0;
1822 return 0;
1827 WM8996_SYSCLK_ENA, 0);
1832 src = 0;
1851 WM8996_SYSCLK_RATE, 0);
1866 sync = 0;
1887 return 0;
1907 { 0, 64000, 4, 16 },
1911 { 1000000, 13500000, 0, 1 },
1924 fll_div->fll_refclk_div = 0;
1944 fll_div->fll_loop_gain = 0;
1947 fll_div->fll_ref_freq = 0;
1967 for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
1981 if (target % Fref == 0) {
1982 fll_div->theta = 0;
1983 fll_div->lambda = 0;
1998 return 0;
2013 return 0;
2015 if (Fout == 0) {
2018 wm8996->fll_fref = 0;
2019 wm8996->fll_fout = 0;
2022 WM8996_FLL_ENA, 0);
2026 return 0;
2030 if (ret != 0)
2035 reg = 0;
2058 reg = 0;
2111 for (retry = 0; retry < 10; retry++) {
2114 if (time_left != 0) {
2169 if (ret < 0)
2172 return (reg & WM8996_GP1_LVL) != 0;
2205 if (ret != 0)
2246 wm8996->jack_flips = 0;
2249 wm8996->polarity_cb(component, 0);
2253 WM8996_MICB1_DISCH, 0);
2255 WM8996_MICB2_DISCH, 0);
2278 WM8996_IM_MICD_EINT | WM8996_HP_DONE_EINT, 0);
2280 return 0;
2296 if (reg < 0) {
2332 WM8996_HPOUT1R_RMV_SHORT, 0);
2336 WM8996_JD_MODE_MASK, 0);
2360 snd_soc_component_update_bits(component, WM8996_MIC_DETECT_1, WM8996_MICD_ENA, 0);
2401 wm8996->jack_flips = 0;
2402 snd_soc_jack_report(wm8996->jack, 0,
2418 if (val & 0x400) {
2433 snd_soc_jack_report(wm8996->jack, 0, SND_JACK_BTN_0);
2445 if (wm8996->detecting && (val & 0x3f0)) {
2462 (reg & WM8996_MICD_SRC) != 0);
2465 (reg & WM8996_MICD_SRC) != 0);
2473 if (val & 0x3fc) {
2491 if (irq_val < 0) {
2561 wm8996->num_retune_mobile_texts = 0;
2563 for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) {
2564 for (j = 0; j < wm8996->num_retune_mobile_texts; j++) {
2566 wm8996->retune_mobile_texts[j]) == 0)
2597 if (ret != 0)
2648 if (ret == 0) {
2651 WM8996_IM_IRQ, 0);
2660 0);
2668 return 0;
2782 for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++)
2787 if (ret != 0) {
2792 wm8996->disable_nb[0].notifier_call = wm8996_regulator_event_0;
2797 for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) {
2801 if (ret != 0) {
2810 if (ret != 0) {
2828 if (ret < 0) {
2832 if (reg != 0x8915) {
2839 if (ret < 0) {
2849 gpiod_set_value_cansleep(wm8996->ldo_ena, 0);
2853 0x8915);
2854 if (ret != 0) {
2868 for (i = 0; i < ARRAY_SIZE(wm8996->pdata.gpio_default); i++) {
2873 wm8996->pdata.gpio_default[i] & 0xffff);
2931 * slots 0 and 1. */
2936 1 << WM8996_AIF1RX_CHAN0_SLOTS_SHIFT | 0);
2946 1 << WM8996_AIF1RX_CHAN2_SLOTS_SHIFT | 0);
2956 1 << WM8996_AIF1RX_CHAN4_SLOTS_SHIFT | 0);
2967 1 << WM8996_AIF2RX_CHAN0_SLOTS_SHIFT | 0);
2978 1 << WM8996_AIF1TX_CHAN0_SLOTS_SHIFT | 0);
2988 1 << WM8996_AIF1TX_CHAN2_SLOTS_SHIFT | 0);
2998 1 << WM8996_AIF1TX_CHAN4_SLOTS_SHIFT | 0);
3009 1 << WM8996_AIF2TX_CHAN0_SLOTS_SHIFT | 0);
3020 if (ret != 0) {
3031 if (ret != 0) {
3046 if (ret < 0)
3056 gpiod_set_value_cansleep(wm8996->ldo_ena, 0);
3070 gpiod_set_value_cansleep(wm8996->ldo_ena, 0);