669 static int configure_aif_clock(struct snd_soc_component *component, int aif)  in configure_aif_clock()  argument
678 	if (aif)  in configure_aif_clock()
683 	switch (wm8995->sysclk[aif]) {  in configure_aif_clock()
707 		dev_dbg(component->dev, "Dividing AIF%d clock to %dHz\n",  in configure_aif_clock()
708 			aif + 1, rate);  in configure_aif_clock()
711 	wm8995->aifclk[aif] = rate;  in configure_aif_clock()
727 	/* Bring up the AIF clocks first */  in configure_clock()
1445 	int aif;  in wm8995_set_dai_fmt()  local
1461 	aif = 0;  in wm8995_set_dai_fmt()
1464 		aif |= WM8995_AIF1_LRCLK_INV;  in wm8995_set_dai_fmt()
1467 		aif |= (0x3 << WM8995_AIF1_FMT_SHIFT);  in wm8995_set_dai_fmt()
1470 		aif |= (0x2 << WM8995_AIF1_FMT_SHIFT);  in wm8995_set_dai_fmt()
1475 		aif |= (0x1 << WM8995_AIF1_FMT_SHIFT);  in wm8995_set_dai_fmt()
1490 			aif |= WM8995_AIF1_BCLK_INV;  in wm8995_set_dai_fmt()
1504 			aif |= WM8995_AIF1_BCLK_INV | WM8995_AIF1_LRCLK_INV;  in wm8995_set_dai_fmt()
1507 			aif |= WM8995_AIF1_BCLK_INV;  in wm8995_set_dai_fmt()
1510 			aif |= WM8995_AIF1_LRCLK_INV;  in wm8995_set_dai_fmt()
1523 			    WM8995_AIF1_FMT_MASK, aif);  in wm8995_set_dai_fmt()
1625 	dev_dbg(dai->dev, "AIF%dCLK is %dHz, target BCLK %dHz\n",  in wm8995_hw_params()
1642 	dev_dbg(dai->dev, "Selected AIF%dCLK/fs = %d\n",  in wm8995_hw_params()
1858 	/* Gate the AIF clocks while we reclock */  in wm8995_set_fll()
1894 	/* Enable any gated AIF clocks */  in wm8995_set_fll()
1927 		dev_dbg(dai->dev, "AIF%d using MCLK1 at %uHz\n",  in wm8995_set_dai_sysclk()
1933 		dev_dbg(dai->dev, "AIF%d using MCLK2 at %uHz\n",  in wm8995_set_dai_sysclk()
1938 		dev_dbg(dai->dev, "AIF%d using FLL1\n", dai->id + 1);  in wm8995_set_dai_sysclk()
1942 		dev_dbg(dai->dev, "AIF%d using FLL2\n", dai->id + 1);  in wm8995_set_dai_sysclk()