Lines Matching +full:0 +full:x0010
16 #define WM8991_RESET 0x00
17 #define WM8991_POWER_MANAGEMENT_1 0x01
18 #define WM8991_POWER_MANAGEMENT_2 0x02
19 #define WM8991_POWER_MANAGEMENT_3 0x03
20 #define WM8991_AUDIO_INTERFACE_1 0x04
21 #define WM8991_AUDIO_INTERFACE_2 0x05
22 #define WM8991_CLOCKING_1 0x06
23 #define WM8991_CLOCKING_2 0x07
24 #define WM8991_AUDIO_INTERFACE_3 0x08
25 #define WM8991_AUDIO_INTERFACE_4 0x09
26 #define WM8991_DAC_CTRL 0x0A
27 #define WM8991_LEFT_DAC_DIGITAL_VOLUME 0x0B
28 #define WM8991_RIGHT_DAC_DIGITAL_VOLUME 0x0C
29 #define WM8991_DIGITAL_SIDE_TONE 0x0D
30 #define WM8991_ADC_CTRL 0x0E
31 #define WM8991_LEFT_ADC_DIGITAL_VOLUME 0x0F
32 #define WM8991_RIGHT_ADC_DIGITAL_VOLUME 0x10
33 #define WM8991_GPIO_CTRL_1 0x12
34 #define WM8991_GPIO1_GPIO2 0x13
35 #define WM8991_GPIO3_GPIO4 0x14
36 #define WM8991_GPIO5_GPIO6 0x15
37 #define WM8991_GPIOCTRL_2 0x16
38 #define WM8991_GPIO_POL 0x17
39 #define WM8991_LEFT_LINE_INPUT_1_2_VOLUME 0x18
40 #define WM8991_LEFT_LINE_INPUT_3_4_VOLUME 0x19
41 #define WM8991_RIGHT_LINE_INPUT_1_2_VOLUME 0x1A
42 #define WM8991_RIGHT_LINE_INPUT_3_4_VOLUME 0x1B
43 #define WM8991_LEFT_OUTPUT_VOLUME 0x1C
44 #define WM8991_RIGHT_OUTPUT_VOLUME 0x1D
45 #define WM8991_LINE_OUTPUTS_VOLUME 0x1E
46 #define WM8991_OUT3_4_VOLUME 0x1F
47 #define WM8991_LEFT_OPGA_VOLUME 0x20
48 #define WM8991_RIGHT_OPGA_VOLUME 0x21
49 #define WM8991_SPEAKER_VOLUME 0x22
50 #define WM8991_CLASSD1 0x23
51 #define WM8991_CLASSD3 0x25
52 #define WM8991_INPUT_MIXER1 0x27
53 #define WM8991_INPUT_MIXER2 0x28
54 #define WM8991_INPUT_MIXER3 0x29
55 #define WM8991_INPUT_MIXER4 0x2A
56 #define WM8991_INPUT_MIXER5 0x2B
57 #define WM8991_INPUT_MIXER6 0x2C
58 #define WM8991_OUTPUT_MIXER1 0x2D
59 #define WM8991_OUTPUT_MIXER2 0x2E
60 #define WM8991_OUTPUT_MIXER3 0x2F
61 #define WM8991_OUTPUT_MIXER4 0x30
62 #define WM8991_OUTPUT_MIXER5 0x31
63 #define WM8991_OUTPUT_MIXER6 0x32
64 #define WM8991_OUT3_4_MIXER 0x33
65 #define WM8991_LINE_MIXER1 0x34
66 #define WM8991_LINE_MIXER2 0x35
67 #define WM8991_SPEAKER_MIXER 0x36
68 #define WM8991_ADDITIONAL_CONTROL 0x37
69 #define WM8991_ANTIPOP1 0x38
70 #define WM8991_ANTIPOP2 0x39
71 #define WM8991_MICBIAS 0x3A
72 #define WM8991_PLL1 0x3C
73 #define WM8991_PLL2 0x3D
74 #define WM8991_PLL3 0x3E
77 #define WM8991_MAX_REGISTER 0x3F
84 * R0 (0x00) - Reset
86 #define WM8991_SW_RESET_CHIP_ID_MASK 0xFFFF /* SW_RESET_CHIP_ID - [15:0] */
89 * R1 (0x01) - Power Management (1)
91 #define WM8991_SPK_ENA 0x1000 /* SPK_ENA */
93 #define WM8991_OUT3_ENA 0x0800 /* OUT3_ENA */
95 #define WM8991_OUT4_ENA 0x0400 /* OUT4_ENA */
97 #define WM8991_LOUT_ENA 0x0200 /* LOUT_ENA */
99 #define WM8991_ROUT_ENA 0x0100 /* ROUT_ENA */
101 #define WM8991_MICBIAS_ENA 0x0010 /* MICBIAS_ENA */
103 #define WM8991_VMID_MODE_MASK 0x0006 /* VMID_MODE - [2:1] */
104 #define WM8991_VREF_ENA 0x0001 /* VREF_ENA */
105 #define WM8991_VREF_ENA_BIT 0
108 * R2 (0x02) - Power Management (2)
110 #define WM8991_PLL_ENA 0x8000 /* PLL_ENA */
112 #define WM8991_TSHUT_ENA 0x4000 /* TSHUT_ENA */
114 #define WM8991_TSHUT_OPDIS 0x2000 /* TSHUT_OPDIS */
116 #define WM8991_OPCLK_ENA 0x0800 /* OPCLK_ENA */
118 #define WM8991_AINL_ENA 0x0200 /* AINL_ENA */
120 #define WM8991_AINR_ENA 0x0100 /* AINR_ENA */
122 #define WM8991_LIN34_ENA 0x0080 /* LIN34_ENA */
124 #define WM8991_LIN12_ENA 0x0040 /* LIN12_ENA */
126 #define WM8991_RIN34_ENA 0x0020 /* RIN34_ENA */
128 #define WM8991_RIN12_ENA 0x0010 /* RIN12_ENA */
130 #define WM8991_ADCL_ENA 0x0002 /* ADCL_ENA */
132 #define WM8991_ADCR_ENA 0x0001 /* ADCR_ENA */
133 #define WM8991_ADCR_ENA_BIT 0
136 * R3 (0x03) - Power Management (3)
138 #define WM8991_LON_ENA 0x2000 /* LON_ENA */
140 #define WM8991_LOP_ENA 0x1000 /* LOP_ENA */
142 #define WM8991_RON_ENA 0x0800 /* RON_ENA */
144 #define WM8991_ROP_ENA 0x0400 /* ROP_ENA */
146 #define WM8991_LOPGA_ENA 0x0080 /* LOPGA_ENA */
148 #define WM8991_ROPGA_ENA 0x0040 /* ROPGA_ENA */
150 #define WM8991_LOMIX_ENA 0x0020 /* LOMIX_ENA */
152 #define WM8991_ROMIX_ENA 0x0010 /* ROMIX_ENA */
154 #define WM8991_DACL_ENA 0x0002 /* DACL_ENA */
156 #define WM8991_DACR_ENA 0x0001 /* DACR_ENA */
157 #define WM8991_DACR_ENA_BIT 0
160 * R4 (0x04) - Audio Interface (1)
162 #define WM8991_AIFADCL_SRC 0x8000 /* AIFADCL_SRC */
163 #define WM8991_AIFADCR_SRC 0x4000 /* AIFADCR_SRC */
164 #define WM8991_AIFADC_TDM 0x2000 /* AIFADC_TDM */
165 #define WM8991_AIFADC_TDM_CHAN 0x1000 /* AIFADC_TDM_CHAN */
166 #define WM8991_AIF_BCLK_INV 0x0100 /* AIF_BCLK_INV */
167 #define WM8991_AIF_LRCLK_INV 0x0080 /* AIF_LRCLK_INV */
168 #define WM8991_AIF_WL_MASK 0x0060 /* AIF_WL - [6:5] */
169 #define WM8991_AIF_WL_16BITS (0 << 5)
173 #define WM8991_AIF_FMT_MASK 0x0018 /* AIF_FMT - [4:3] */
174 #define WM8991_AIF_TMF_RIGHTJ (0 << 3)
180 * R5 (0x05) - Audio Interface (2)
182 #define WM8991_DACL_SRC 0x8000 /* DACL_SRC */
183 #define WM8991_DACR_SRC 0x4000 /* DACR_SRC */
184 #define WM8991_AIFDAC_TDM 0x2000 /* AIFDAC_TDM */
185 #define WM8991_AIFDAC_TDM_CHAN 0x1000 /* AIFDAC_TDM_CHAN */
186 #define WM8991_DAC_BOOST_MASK 0x0C00 /* DAC_BOOST - [11:10] */
187 #define WM8991_DAC_COMP 0x0010 /* DAC_COMP */
188 #define WM8991_DAC_COMPMODE 0x0008 /* DAC_COMPMODE */
189 #define WM8991_ADC_COMP 0x0004 /* ADC_COMP */
190 #define WM8991_ADC_COMPMODE 0x0002 /* ADC_COMPMODE */
191 #define WM8991_LOOPBACK 0x0001 /* LOOPBACK */
194 * R6 (0x06) - Clocking (1)
196 #define WM8991_TOCLK_RATE 0x8000 /* TOCLK_RATE */
197 #define WM8991_TOCLK_ENA 0x4000 /* TOCLK_ENA */
198 #define WM8991_OPCLKDIV_MASK 0x1E00 /* OPCLKDIV - [12:9] */
199 #define WM8991_DCLKDIV_MASK 0x01C0 /* DCLKDIV - [8:6] */
200 #define WM8991_BCLK_DIV_MASK 0x001E /* BCLK_DIV - [4:1] */
201 #define WM8991_BCLK_DIV_1 (0x0 << 1)
202 #define WM8991_BCLK_DIV_1_5 (0x1 << 1)
203 #define WM8991_BCLK_DIV_2 (0x2 << 1)
204 #define WM8991_BCLK_DIV_3 (0x3 << 1)
205 #define WM8991_BCLK_DIV_4 (0x4 << 1)
206 #define WM8991_BCLK_DIV_5_5 (0x5 << 1)
207 #define WM8991_BCLK_DIV_6 (0x6 << 1)
208 #define WM8991_BCLK_DIV_8 (0x7 << 1)
209 #define WM8991_BCLK_DIV_11 (0x8 << 1)
210 #define WM8991_BCLK_DIV_12 (0x9 << 1)
211 #define WM8991_BCLK_DIV_16 (0xA << 1)
212 #define WM8991_BCLK_DIV_22 (0xB << 1)
213 #define WM8991_BCLK_DIV_24 (0xC << 1)
214 #define WM8991_BCLK_DIV_32 (0xD << 1)
215 #define WM8991_BCLK_DIV_44 (0xE << 1)
216 #define WM8991_BCLK_DIV_48 (0xF << 1)
219 * R7 (0x07) - Clocking (2)
221 #define WM8991_MCLK_SRC 0x8000 /* MCLK_SRC */
222 #define WM8991_SYSCLK_SRC 0x4000 /* SYSCLK_SRC */
223 #define WM8991_CLK_FORCE 0x2000 /* CLK_FORCE */
224 #define WM8991_MCLK_DIV_MASK 0x1800 /* MCLK_DIV - [12:11] */
225 #define WM8991_MCLK_DIV_1 (0 << 11)
227 #define WM8991_MCLK_INV 0x0400 /* MCLK_INV */
228 #define WM8991_ADC_CLKDIV_MASK 0x00E0 /* ADC_CLKDIV - [7:5] */
229 #define WM8991_ADC_CLKDIV_1 (0 << 5)
236 #define WM8991_DAC_CLKDIV_MASK 0x001C /* DAC_CLKDIV - [4:2] */
237 #define WM8991_DAC_CLKDIV_1 (0 << 2)
246 * R8 (0x08) - Audio Interface (3)
248 #define WM8991_AIF_MSTR1 0x8000 /* AIF_MSTR1 */
249 #define WM8991_AIF_MSTR2 0x4000 /* AIF_MSTR2 */
250 #define WM8991_AIF_SEL 0x2000 /* AIF_SEL */
251 #define WM8991_ADCLRC_DIR 0x0800 /* ADCLRC_DIR */
252 #define WM8991_ADCLRC_RATE_MASK 0x07FF /* ADCLRC_RATE - [10:0] */
255 * R9 (0x09) - Audio Interface (4)
257 #define WM8991_ALRCGPIO1 0x8000 /* ALRCGPIO1 */
258 #define WM8991_ALRCBGPIO6 0x4000 /* ALRCBGPIO6 */
259 #define WM8991_AIF_TRIS 0x2000 /* AIF_TRIS */
260 #define WM8991_DACLRC_DIR 0x0800 /* DACLRC_DIR */
261 #define WM8991_DACLRC_RATE_MASK 0x07FF /* DACLRC_RATE - [10:0] */
264 * R10 (0x0A) - DAC CTRL
266 #define WM8991_AIF_LRCLKRATE 0x0400 /* AIF_LRCLKRATE */
267 #define WM8991_DAC_MONO 0x0200 /* DAC_MONO */
268 #define WM8991_DAC_SB_FILT 0x0100 /* DAC_SB_FILT */
269 #define WM8991_DAC_MUTERATE 0x0080 /* DAC_MUTERATE */
270 #define WM8991_DAC_MUTEMODE 0x0040 /* DAC_MUTEMODE */
271 #define WM8991_DEEMP_MASK 0x0030 /* DEEMP - [5:4] */
272 #define WM8991_DAC_MUTE 0x0004 /* DAC_MUTE */
273 #define WM8991_DACL_DATINV 0x0002 /* DACL_DATINV */
274 #define WM8991_DACR_DATINV 0x0001 /* DACR_DATINV */
277 * R11 (0x0B) - Left DAC Digital Volume
279 #define WM8991_DAC_VU 0x0100 /* DAC_VU */
280 #define WM8991_DACL_VOL_MASK 0x00FF /* DACL_VOL - [7:0] */
281 #define WM8991_DACL_VOL_SHIFT 0
283 * R12 (0x0C) - Right DAC Digital Volume
285 #define WM8991_DAC_VU 0x0100 /* DAC_VU */
286 #define WM8991_DACR_VOL_MASK 0x00FF /* DACR_VOL - [7:0] */
287 #define WM8991_DACR_VOL_SHIFT 0
289 * R13 (0x0D) - Digital Side Tone
291 #define WM8991_ADCL_DAC_SVOL_MASK 0x0F /* ADCL_DAC_SVOL - [12:9] */
293 #define WM8991_ADCR_DAC_SVOL_MASK 0x0F /* ADCR_DAC_SVOL - [8:5] */
295 #define WM8991_ADC_TO_DACL_MASK 0x03 /* ADC_TO_DACL - [3:2] */
297 #define WM8991_ADC_TO_DACR_MASK 0x03 /* ADC_TO_DACR - [1:0] */
298 #define WM8991_ADC_TO_DACR_SHIFT 0
301 * R14 (0x0E) - ADC CTRL
303 #define WM8991_ADC_HPF_ENA 0x0100 /* ADC_HPF_ENA */
305 #define WM8991_ADC_HPF_CUT_MASK 0x03 /* ADC_HPF_CUT - [6:5] */
307 #define WM8991_ADCL_DATINV 0x0002 /* ADCL_DATINV */
309 #define WM8991_ADCR_DATINV 0x0001 /* ADCR_DATINV */
310 #define WM8991_ADCR_DATINV_BIT 0
313 * R15 (0x0F) - Left ADC Digital Volume
315 #define WM8991_ADC_VU 0x0100 /* ADC_VU */
316 #define WM8991_ADCL_VOL_MASK 0x00FF /* ADCL_VOL - [7:0] */
317 #define WM8991_ADCL_VOL_SHIFT 0
320 * R16 (0x10) - Right ADC Digital Volume
322 #define WM8991_ADC_VU 0x0100 /* ADC_VU */
323 #define WM8991_ADCR_VOL_MASK 0x00FF /* ADCR_VOL - [7:0] */
324 #define WM8991_ADCR_VOL_SHIFT 0
327 * R18 (0x12) - GPIO CTRL 1
329 #define WM8991_IRQ 0x1000 /* IRQ */
330 #define WM8991_TEMPOK 0x0800 /* TEMPOK */
331 #define WM8991_MICSHRT 0x0400 /* MICSHRT */
332 #define WM8991_MICDET 0x0200 /* MICDET */
333 #define WM8991_PLL_LCK 0x0100 /* PLL_LCK */
334 #define WM8991_GPI8_STATUS 0x0080 /* GPI8_STATUS */
335 #define WM8991_GPI7_STATUS 0x0040 /* GPI7_STATUS */
336 #define WM8991_GPIO6_STATUS 0x0020 /* GPIO6_STATUS */
337 #define WM8991_GPIO5_STATUS 0x0010 /* GPIO5_STATUS */
338 #define WM8991_GPIO4_STATUS 0x0008 /* GPIO4_STATUS */
339 #define WM8991_GPIO3_STATUS 0x0004 /* GPIO3_STATUS */
340 #define WM8991_GPIO2_STATUS 0x0002 /* GPIO2_STATUS */
341 #define WM8991_GPIO1_STATUS 0x0001 /* GPIO1_STATUS */
344 * R19 (0x13) - GPIO1 & GPIO2
346 #define WM8991_GPIO2_DEB_ENA 0x8000 /* GPIO2_DEB_ENA */
347 #define WM8991_GPIO2_IRQ_ENA 0x4000 /* GPIO2_IRQ_ENA */
348 #define WM8991_GPIO2_PU 0x2000 /* GPIO2_PU */
349 #define WM8991_GPIO2_PD 0x1000 /* GPIO2_PD */
350 #define WM8991_GPIO2_SEL_MASK 0x0F00 /* GPIO2_SEL - [11:8] */
351 #define WM8991_GPIO1_DEB_ENA 0x0080 /* GPIO1_DEB_ENA */
352 #define WM8991_GPIO1_IRQ_ENA 0x0040 /* GPIO1_IRQ_ENA */
353 #define WM8991_GPIO1_PU 0x0020 /* GPIO1_PU */
354 #define WM8991_GPIO1_PD 0x0010 /* GPIO1_PD */
355 #define WM8991_GPIO1_SEL_MASK 0x000F /* GPIO1_SEL - [3:0] */
358 * R20 (0x14) - GPIO3 & GPIO4
360 #define WM8991_GPIO4_DEB_ENA 0x8000 /* GPIO4_DEB_ENA */
361 #define WM8991_GPIO4_IRQ_ENA 0x4000 /* GPIO4_IRQ_ENA */
362 #define WM8991_GPIO4_PU 0x2000 /* GPIO4_PU */
363 #define WM8991_GPIO4_PD 0x1000 /* GPIO4_PD */
364 #define WM8991_GPIO4_SEL_MASK 0x0F00 /* GPIO4_SEL - [11:8] */
365 #define WM8991_GPIO3_DEB_ENA 0x0080 /* GPIO3_DEB_ENA */
366 #define WM8991_GPIO3_IRQ_ENA 0x0040 /* GPIO3_IRQ_ENA */
367 #define WM8991_GPIO3_PU 0x0020 /* GPIO3_PU */
368 #define WM8991_GPIO3_PD 0x0010 /* GPIO3_PD */
369 #define WM8991_GPIO3_SEL_MASK 0x000F /* GPIO3_SEL - [3:0] */
372 * R21 (0x15) - GPIO5 & GPIO6
374 #define WM8991_GPIO6_DEB_ENA 0x8000 /* GPIO6_DEB_ENA */
375 #define WM8991_GPIO6_IRQ_ENA 0x4000 /* GPIO6_IRQ_ENA */
376 #define WM8991_GPIO6_PU 0x2000 /* GPIO6_PU */
377 #define WM8991_GPIO6_PD 0x1000 /* GPIO6_PD */
378 #define WM8991_GPIO6_SEL_MASK 0x0F00 /* GPIO6_SEL - [11:8] */
379 #define WM8991_GPIO5_DEB_ENA 0x0080 /* GPIO5_DEB_ENA */
380 #define WM8991_GPIO5_IRQ_ENA 0x0040 /* GPIO5_IRQ_ENA */
381 #define WM8991_GPIO5_PU 0x0020 /* GPIO5_PU */
382 #define WM8991_GPIO5_PD 0x0010 /* GPIO5_PD */
383 #define WM8991_GPIO5_SEL_MASK 0x000F /* GPIO5_SEL - [3:0] */
386 * R22 (0x16) - GPIOCTRL 2
388 #define WM8991_RD_3W_ENA 0x8000 /* RD_3W_ENA */
389 #define WM8991_MODE_3W4W 0x4000 /* MODE_3W4W */
390 #define WM8991_TEMPOK_IRQ_ENA 0x0800 /* TEMPOK_IRQ_ENA */
391 #define WM8991_MICSHRT_IRQ_ENA 0x0400 /* MICSHRT_IRQ_ENA */
392 #define WM8991_MICDET_IRQ_ENA 0x0200 /* MICDET_IRQ_ENA */
393 #define WM8991_PLL_LCK_IRQ_ENA 0x0100 /* PLL_LCK_IRQ_ENA */
394 #define WM8991_GPI8_DEB_ENA 0x0080 /* GPI8_DEB_ENA */
395 #define WM8991_GPI8_IRQ_ENA 0x0040 /* GPI8_IRQ_ENA */
396 #define WM8991_GPI8_ENA 0x0010 /* GPI8_ENA */
397 #define WM8991_GPI7_DEB_ENA 0x0008 /* GPI7_DEB_ENA */
398 #define WM8991_GPI7_IRQ_ENA 0x0004 /* GPI7_IRQ_ENA */
399 #define WM8991_GPI7_ENA 0x0001 /* GPI7_ENA */
402 * R23 (0x17) - GPIO_POL
404 #define WM8991_IRQ_INV 0x1000 /* IRQ_INV */
405 #define WM8991_TEMPOK_POL 0x0800 /* TEMPOK_POL */
406 #define WM8991_MICSHRT_POL 0x0400 /* MICSHRT_POL */
407 #define WM8991_MICDET_POL 0x0200 /* MICDET_POL */
408 #define WM8991_PLL_LCK_POL 0x0100 /* PLL_LCK_POL */
409 #define WM8991_GPI8_POL 0x0080 /* GPI8_POL */
410 #define WM8991_GPI7_POL 0x0040 /* GPI7_POL */
411 #define WM8991_GPIO6_POL 0x0020 /* GPIO6_POL */
412 #define WM8991_GPIO5_POL 0x0010 /* GPIO5_POL */
413 #define WM8991_GPIO4_POL 0x0008 /* GPIO4_POL */
414 #define WM8991_GPIO3_POL 0x0004 /* GPIO3_POL */
415 #define WM8991_GPIO2_POL 0x0002 /* GPIO2_POL */
416 #define WM8991_GPIO1_POL 0x0001 /* GPIO1_POL */
419 * R24 (0x18) - Left Line Input 1&2 Volume
421 #define WM8991_IPVU 0x0100 /* IPVU */
422 #define WM8991_LI12MUTE 0x0080 /* LI12MUTE */
424 #define WM8991_LI12ZC 0x0040 /* LI12ZC */
426 #define WM8991_LIN12VOL_MASK 0x001F /* LIN12VOL - [4:0] */
427 #define WM8991_LIN12VOL_SHIFT 0
429 * R25 (0x19) - Left Line Input 3&4 Volume
431 #define WM8991_IPVU 0x0100 /* IPVU */
432 #define WM8991_LI34MUTE 0x0080 /* LI34MUTE */
434 #define WM8991_LI34ZC 0x0040 /* LI34ZC */
436 #define WM8991_LIN34VOL_MASK 0x001F /* LIN34VOL - [4:0] */
437 #define WM8991_LIN34VOL_SHIFT 0
440 * R26 (0x1A) - Right Line Input 1&2 Volume
442 #define WM8991_IPVU 0x0100 /* IPVU */
443 #define WM8991_RI12MUTE 0x0080 /* RI12MUTE */
445 #define WM8991_RI12ZC 0x0040 /* RI12ZC */
447 #define WM8991_RIN12VOL_MASK 0x001F /* RIN12VOL - [4:0] */
448 #define WM8991_RIN12VOL_SHIFT 0
451 * R27 (0x1B) - Right Line Input 3&4 Volume
453 #define WM8991_IPVU 0x0100 /* IPVU */
454 #define WM8991_RI34MUTE 0x0080 /* RI34MUTE */
456 #define WM8991_RI34ZC 0x0040 /* RI34ZC */
458 #define WM8991_RIN34VOL_MASK 0x001F /* RIN34VOL - [4:0] */
459 #define WM8991_RIN34VOL_SHIFT 0
462 * R28 (0x1C) - Left Output Volume
464 #define WM8991_OPVU 0x0100 /* OPVU */
465 #define WM8991_LOZC 0x0080 /* LOZC */
467 #define WM8991_LOUTVOL_MASK 0x007F /* LOUTVOL - [6:0] */
468 #define WM8991_LOUTVOL_SHIFT 0
470 * R29 (0x1D) - Right Output Volume
472 #define WM8991_OPVU 0x0100 /* OPVU */
473 #define WM8991_ROZC 0x0080 /* ROZC */
475 #define WM8991_ROUTVOL_MASK 0x007F /* ROUTVOL - [6:0] */
476 #define WM8991_ROUTVOL_SHIFT 0
478 * R30 (0x1E) - Line Outputs Volume
480 #define WM8991_LONMUTE 0x0040 /* LONMUTE */
482 #define WM8991_LOPMUTE 0x0020 /* LOPMUTE */
484 #define WM8991_LOATTN 0x0010 /* LOATTN */
486 #define WM8991_RONMUTE 0x0004 /* RONMUTE */
488 #define WM8991_ROPMUTE 0x0002 /* ROPMUTE */
490 #define WM8991_ROATTN 0x0001 /* ROATTN */
491 #define WM8991_ROATTN_BIT 0
494 * R31 (0x1F) - Out3/4 Volume
496 #define WM8991_OUT3MUTE 0x0020 /* OUT3MUTE */
498 #define WM8991_OUT3ATTN 0x0010 /* OUT3ATTN */
500 #define WM8991_OUT4MUTE 0x0002 /* OUT4MUTE */
502 #define WM8991_OUT4ATTN 0x0001 /* OUT4ATTN */
503 #define WM8991_OUT4ATTN_BIT 0
506 * R32 (0x20) - Left OPGA Volume
508 #define WM8991_OPVU 0x0100 /* OPVU */
509 #define WM8991_LOPGAZC 0x0080 /* LOPGAZC */
511 #define WM8991_LOPGAVOL_MASK 0x007F /* LOPGAVOL - [6:0] */
512 #define WM8991_LOPGAVOL_SHIFT 0
515 * R33 (0x21) - Right OPGA Volume
517 #define WM8991_OPVU 0x0100 /* OPVU */
518 #define WM8991_ROPGAZC 0x0080 /* ROPGAZC */
520 #define WM8991_ROPGAVOL_MASK 0x007F /* ROPGAVOL - [6:0] */
521 #define WM8991_ROPGAVOL_SHIFT 0
523 * R34 (0x22) - Speaker Volume
525 #define WM8991_SPKVOL_MASK 0x0003 /* SPKVOL - [1:0] */
526 #define WM8991_SPKVOL_SHIFT 0
529 * R35 (0x23) - ClassD1
531 #define WM8991_CDMODE 0x0100 /* CDMODE */
535 * R37 (0x25) - ClassD3
537 #define WM8991_DCGAIN_MASK 0x0007 /* DCGAIN - [5:3] */
539 #define WM8991_ACGAIN_MASK 0x0007 /* ACGAIN - [2:0] */
540 #define WM8991_ACGAIN_SHIFT 0
542 * R39 (0x27) - Input Mixer1
544 #define WM8991_AINLMODE_MASK 0x000C /* AINLMODE - [3:2] */
546 #define WM8991_AINRMODE_MASK 0x0003 /* AINRMODE - [1:0] */
547 #define WM8991_AINRMODE_SHIFT 0
550 * R40 (0x28) - Input Mixer2
552 #define WM8991_LMP4 0x0080 /* LMP4 */
554 #define WM8991_LMN3 0x0040 /* LMN3 */
556 #define WM8991_LMP2 0x0020 /* LMP2 */
558 #define WM8991_LMN1 0x0010 /* LMN1 */
560 #define WM8991_RMP4 0x0008 /* RMP4 */
562 #define WM8991_RMN3 0x0004 /* RMN3 */
564 #define WM8991_RMP2 0x0002 /* RMP2 */
566 #define WM8991_RMN1 0x0001 /* RMN1 */
567 #define WM8991_RMN1_BIT 0 /* RMN1 */
570 * R41 (0x29) - Input Mixer3
572 #define WM8991_L34MNB 0x0100 /* L34MNB */
574 #define WM8991_L34MNBST 0x0080 /* L34MNBST */
576 #define WM8991_L12MNB 0x0020 /* L12MNB */
578 #define WM8991_L12MNBST 0x0010 /* L12MNBST */
580 #define WM8991_LDBVOL_MASK 0x0007 /* LDBVOL - [2:0] */
581 #define WM8991_LDBVOL_SHIFT 0
584 * R42 (0x2A) - Input Mixer4
586 #define WM8991_R34MNB 0x0100 /* R34MNB */
588 #define WM8991_R34MNBST 0x0080 /* R34MNBST */
590 #define WM8991_R12MNB 0x0020 /* R12MNB */
592 #define WM8991_R12MNBST 0x0010 /* R12MNBST */
594 #define WM8991_RDBVOL_MASK 0x0007 /* RDBVOL - [2:0] */
595 #define WM8991_RDBVOL_SHIFT 0
598 * R43 (0x2B) - Input Mixer5
600 #define WM8991_LI2BVOL_MASK 0x07 /* LI2BVOL - [8:6] */
602 #define WM8991_LR4BVOL_MASK 0x07 /* LR4BVOL - [5:3] */
604 #define WM8991_LL4BVOL_MASK 0x07 /* LL4BVOL - [2:0] */
605 #define WM8991_LL4BVOL_SHIFT 0
608 * R44 (0x2C) - Input Mixer6
610 #define WM8991_RI2BVOL_MASK 0x07 /* RI2BVOL - [8:6] */
612 #define WM8991_RL4BVOL_MASK 0x07 /* RL4BVOL - [5:3] */
614 #define WM8991_RR4BVOL_MASK 0x07 /* RR4BVOL - [2:0] */
615 #define WM8991_RR4BVOL_SHIFT 0
618 * R45 (0x2D) - Output Mixer1
620 #define WM8991_LRBLO 0x0080 /* LRBLO */
622 #define WM8991_LLBLO 0x0040 /* LLBLO */
624 #define WM8991_LRI3LO 0x0020 /* LRI3LO */
626 #define WM8991_LLI3LO 0x0010 /* LLI3LO */
628 #define WM8991_LR12LO 0x0008 /* LR12LO */
630 #define WM8991_LL12LO 0x0004 /* LL12LO */
632 #define WM8991_LDLO 0x0001 /* LDLO */
633 #define WM8991_LDLO_BIT 0
636 * R46 (0x2E) - Output Mixer2
638 #define WM8991_RLBRO 0x0080 /* RLBRO */
640 #define WM8991_RRBRO 0x0040 /* RRBRO */
642 #define WM8991_RLI3RO 0x0020 /* RLI3RO */
644 #define WM8991_RRI3RO 0x0010 /* RRI3RO */
646 #define WM8991_RL12RO 0x0008 /* RL12RO */
648 #define WM8991_RR12RO 0x0004 /* RR12RO */
650 #define WM8991_RDRO 0x0001 /* RDRO */
651 #define WM8991_RDRO_BIT 0
654 * R47 (0x2F) - Output Mixer3
656 #define WM8991_LLI3LOVOL_MASK 0x07 /* LLI3LOVOL - [8:6] */
658 #define WM8991_LR12LOVOL_MASK 0x07 /* LR12LOVOL - [5:3] */
660 #define WM8991_LL12LOVOL_MASK 0x07 /* LL12LOVOL - [2:0] */
661 #define WM8991_LL12LOVOL_SHIFT 0
664 * R48 (0x30) - Output Mixer4
666 #define WM8991_RRI3ROVOL_MASK 0x07 /* RRI3ROVOL - [8:6] */
668 #define WM8991_RL12ROVOL_MASK 0x07 /* RL12ROVOL - [5:3] */
670 #define WM8991_RR12ROVOL_MASK 0x07 /* RR12ROVOL - [2:0] */
671 #define WM8991_RR12ROVOL_SHIFT 0
674 * R49 (0x31) - Output Mixer5
676 #define WM8991_LRI3LOVOL_MASK 0x07 /* LRI3LOVOL - [8:6] */
678 #define WM8991_LRBLOVOL_MASK 0x07 /* LRBLOVOL - [5:3] */
680 #define WM8991_LLBLOVOL_MASK 0x07 /* LLBLOVOL - [2:0] */
681 #define WM8991_LLBLOVOL_SHIFT 0
684 * R50 (0x32) - Output Mixer6
686 #define WM8991_RLI3ROVOL_MASK 0x07 /* RLI3ROVOL - [8:6] */
688 #define WM8991_RLBROVOL_MASK 0x07 /* RLBROVOL - [5:3] */
690 #define WM8991_RRBROVOL_MASK 0x07 /* RRBROVOL - [2:0] */
691 #define WM8991_RRBROVOL_SHIFT 0
694 * R51 (0x33) - Out3/4 Mixer
696 #define WM8991_VSEL_MASK 0x0180 /* VSEL - [8:7] */
697 #define WM8991_LI4O3 0x0020 /* LI4O3 */
699 #define WM8991_LPGAO3 0x0010 /* LPGAO3 */
701 #define WM8991_RI4O4 0x0002 /* RI4O4 */
703 #define WM8991_RPGAO4 0x0001 /* RPGAO4 */
704 #define WM8991_RPGAO4_BIT 0
706 * R52 (0x34) - Line Mixer1
708 #define WM8991_LLOPGALON 0x0040 /* LLOPGALON */
710 #define WM8991_LROPGALON 0x0020 /* LROPGALON */
712 #define WM8991_LOPLON 0x0010 /* LOPLON */
714 #define WM8991_LR12LOP 0x0004 /* LR12LOP */
716 #define WM8991_LL12LOP 0x0002 /* LL12LOP */
718 #define WM8991_LLOPGALOP 0x0001 /* LLOPGALOP */
719 #define WM8991_LLOPGALOP_BIT 0
721 * R53 (0x35) - Line Mixer2
723 #define WM8991_RROPGARON 0x0040 /* RROPGARON */
725 #define WM8991_RLOPGARON 0x0020 /* RLOPGARON */
727 #define WM8991_ROPRON 0x0010 /* ROPRON */
729 #define WM8991_RL12ROP 0x0004 /* RL12ROP */
731 #define WM8991_RR12ROP 0x0002 /* RR12ROP */
733 #define WM8991_RROPGAROP 0x0001 /* RROPGAROP */
734 #define WM8991_RROPGAROP_BIT 0
737 * R54 (0x36) - Speaker Mixer
739 #define WM8991_LB2SPK 0x0080 /* LB2SPK */
741 #define WM8991_RB2SPK 0x0040 /* RB2SPK */
743 #define WM8991_LI2SPK 0x0020 /* LI2SPK */
745 #define WM8991_RI2SPK 0x0010 /* RI2SPK */
747 #define WM8991_LOPGASPK 0x0008 /* LOPGASPK */
749 #define WM8991_ROPGASPK 0x0004 /* ROPGASPK */
751 #define WM8991_LDSPK 0x0002 /* LDSPK */
753 #define WM8991_RDSPK 0x0001 /* RDSPK */
754 #define WM8991_RDSPK_BIT 0
757 * R55 (0x37) - Additional Control
759 #define WM8991_VROI 0x0001 /* VROI */
762 * R56 (0x38) - AntiPOP1
764 #define WM8991_DIS_LLINE 0x0020 /* DIS_LLINE */
765 #define WM8991_DIS_RLINE 0x0010 /* DIS_RLINE */
766 #define WM8991_DIS_OUT3 0x0008 /* DIS_OUT3 */
767 #define WM8991_DIS_OUT4 0x0004 /* DIS_OUT4 */
768 #define WM8991_DIS_LOUT 0x0002 /* DIS_LOUT */
769 #define WM8991_DIS_ROUT 0x0001 /* DIS_ROUT */
772 * R57 (0x39) - AntiPOP2
774 #define WM8991_SOFTST 0x0040 /* SOFTST */
775 #define WM8991_BUFIOEN 0x0008 /* BUFIOEN */
776 #define WM8991_BUFDCOPEN 0x0004 /* BUFDCOPEN */
777 #define WM8991_POBCTRL 0x0002 /* POBCTRL */
778 #define WM8991_VMIDTOG 0x0001 /* VMIDTOG */
781 * R58 (0x3A) - MICBIAS
783 #define WM8991_MCDSCTH_MASK 0x00C0 /* MCDSCTH - [7:6] */
784 #define WM8991_MCDTHR_MASK 0x0038 /* MCDTHR - [5:3] */
785 #define WM8991_MCD 0x0004 /* MCD */
786 #define WM8991_MBSEL 0x0001 /* MBSEL */
789 * R60 (0x3C) - PLL1
791 #define WM8991_SDM 0x0080 /* SDM */
792 #define WM8991_PRESCALE 0x0040 /* PRESCALE */
793 #define WM8991_PLLN_MASK 0x000F /* PLLN - [3:0] */
796 * R61 (0x3D) - PLL2
798 #define WM8991_PLLK1_MASK 0x00FF /* PLLK1 - [7:0] */
801 * R62 (0x3E) - PLL3
803 #define WM8991_PLLK2_MASK 0x00FF /* PLLK2 - [7:0] */
805 #define WM8991_MCLK_DIV 0